AP2007S

AP2007 Synchronous PWM Controller Features - Single 4.5V to 20V Supply Application - 0.8V + 2.0% Voltage Reference - Virtual Frequency ControlTM - Fast Transient Response - Synchronous Operation for High Efficiency (93%) - Short Circuit Protect - Small Size with Minimum External Components - Soft Start and Enable Functions - Under Voltage Lockout Function - SOP-8L Pb-Free Package General Description The AP2007 is a low-cost, full featured, synchronous voltage-mode controller designed for use in single ended power supply applications where efficiency is of primary concern. Synchronous operation allows for the elimination of heat sinks in many applications. The AP2007 is ideal for implementing DC/DC converters needed to power advanced microprocessors in low cost systems or in distributed power applications where efficiency is important. High-side drive circuitry, and preset shoot-thru control, allows the use of inexpensive 1P+1N-channel power switches. AP2007’s features include temperature compensated voltage reference, Virtual Frequency ControlTM method to reduce external component count, an internal 200KHz virtual frequency oscillator, under-voltage lockout protection, soft-start, shutdown function and current sense comparator circuitry. Virtual Frequency Control is a trademark of PWRTEK, LLC. Applications - Microprocessor Core Supply - Low Cost Synchronous Applications - Voltage Regulator Modules (VRM) - Networking Power Supplies - Sequenced Power Supplies - Telecommunication Power Supplies. Pin Assignments (Top View) VCC DRVP GND DRVN 1 2 3 4 8 Pin Descriptions Name 7 6 5 Description Chip supply voltage Reference voltage Input from the phase node between the MOSFETs High side driver output (P MOSFET) Ground Low side driver output (N MOSFET) Feedback input Soft start, a capacitor to ground sets the slow start time / Shutdown function AP2007 VREF PHASE FB SS/SHDN VCC VREF PHASE DRVP GND DRVN FB SS/ SHDN SOP-8L Ordering Information AP2007 X X Package S: SOP-8L Packing Blank : Tube A : Taping This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. 1.0 Apr 1, 2005 1/7 AP2007 Synchronous PWM Controller Block Diagram GND +0.4V + OCSET PHASE VCC VOLTAGE REFERENCE VREF 0.8V + UNDER VOLTAGE FB SS/SHDN ERROR COMP + +0.4V VCC 12ua VCC RQ S CROSS CURRENT CONTROL DRVP DRVP VIRTUAL FREQ OSCILLATOR 2ua + DRVN Q S DRVN - 0.2V QB R + Virtual Frequency Control - Patent Number 6,456,050. 0.9V - AP2007 FUNCTIONAL BLOCK DIAGRAM Absolute Maximum Ratings Symbol VIN VPHASE VDRVP VDRVN θJC θJA TOP TST TLEAD Parameter VCC to GND PHASE to GND DRVP to GND DRVN to GND Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. Range. -1 to 22 -1 to 22 -1 to 22 -1 to 22 90 250 -40 to +85 -65 to +150 300 Unit V V V V o C/W o C/W o C o C o C Anachip Corp www.anachip.com.tw 2/7 Rev. 1.0 Apr 1, 2005 AP2007 Synchronous PWM Controller Electrical Characteristics Unless specified: VCC =12V; GND = 0V;VO = 5V; TJ = 25 C o Symbol Parameter Power Supply Supply Voltage VCC (Recommended) ICC Supply Current ∆VLINE Line Regulation Error Comparator AOL Gain (AOL) IB Input Bias Oscillator FOSC Oscillator Frequency DCMAX Oscillator Max Duty Cycle Mofset Drivers IDRVP IDRVN DRVP Source/Sink DRVN Source/Sink Conditions Min. 4.5 Typ. 9.5 0.5 70 0.2 200 85 1 1 150 0.4 0.8 10 2 4.0 3.8 200 Max. 20 1 1.2 0.816 +2 12 2.7 - Unit V mA % dB uA KHz % A A V V nS V V V % uA uA V V mV DRVP & DRVN are floating VO = 2.5V 80 VCC – VDRVP =3V VDRVP – VGND = 2V VCC – VDRVN = 3V VDRVL – VGND = 2V 0.5 0.5 VCC-1.2 VDRVL DRVP/N Low Level Voltage VDRVH DRVP/N High Level Voltage Protection TDEAD Dead Time Vocset Over Current Setting Voltage DRVP/DRVN System Error VDRVP/N Voltage (Note3) Reference Reference Voltage VREF Accuracy Soft Start ISSC Charge Current ISSD Discharge Current Under voltage lockout (UVLO) VUT Upper Threshold Voltage (VCC) VLWT Lower Threshold Voltage (VCC) VHT Hysteresis (VCC) DRVP & DRVN are floating VSS=Low, VCC＜3.8, over current happen 0 C to 70 C VSS = 1.5V VSS = 1.5V o o VCC-1.2 0.784 -2 8.0 1.3 - Note 1. Specification refers to Typical Application Circuit. Note 2. This device is ESD sensitive. Use of standard ESD handling precautions is required. Note 3. Abnormal condition; Ex: over-current, under-voltage lockout, soft-start disappear. Anachip Corp www.anachip.com.tw 3/7 Rev. 1.0 Apr 1, 2005 AP2007 Synchronous PWM Controller Typical Application Circuit C1 470u/16V R1 12 Ω 1 VCC 2 DRVP 3 GND VREF 8 PHASE 7 FB 6 C2 0.1u + Vin C5 10n Q1 AF9435 (4835) Q2 AF9410 (4412) R2 1K C6 47n R3 3K* + 1Ω Option 1Ω Option 4 DRVN SS/SHDN 5 C3 330n L1 10uH AP2007 C4 330n D1 Option C9 C7 C8 0.1u 470u/16V 470u/16V Vout=3.2V* - * Vout = 0.8 x (1+R3/R2) R2 ≅ 1K ~ 10K Virtual Frequency Control Virtual Frequency Control combines the advantages of constant frequency and constant off-time control in a single mode of operation. This allows fix frequency, precision switching voltage regulator control with fast transient response and the smallest solution size. Switch duty cycle can be adjusted from 0% to 100% on a pulse by pulse basis when responding to transient conditions. Both 0% and 100% duty cycle operation can be maintained for extended periods of time in response to load or line transients. Figure 1 depicts a simplified operation of the Virtual Frequency Control technique: The VFC oscillator generates a pulse of a known duration (VFC_Pulse). The regulator loop responds by returning a complementary feedback pulse (FB_Pulse). The FB_Pulse duration is a result of external conditions such as inductor size, the voltage across the inductor and the duration of the VFC_Pulse. A VFC control loop is then formed whereby the duration of the VFC_Pulse is modified as a result of the FB_Pulse duration. The VFC loop arrives at a state of equilibrium, where the operating frequency remains inherently constant. VIN ERROR COMP Vref + VFC Pulse GATE CONTROL LOGIC Lout Cout Vout Rfb1 VIRTUAL FREQ OSCILLATOR Rfb2 FB Pulse Figure 1: Virtual Frequency Control LoopSynchronous single supply application. Anachip Corp www.anachip.com.tw 4/7 Rev. 1.0 Apr 1, 2005 AP2007 Synchronous PWM with VFC Controller Virtual Frequency Control (Continued) Virtual frequency control is a technique that provides stable, constant frequency of operation for pulse controlled architectures such as constant off-time/on-time. This is all done internal to the IC with minimal number of components and without the need for connections to external terminals such as input and/or output. No external compensation is required, thus providing a low cost, high performance fix frequency solution for switching voltage regulators. Virtual Frequency Control is a trademark of PWRTEK, LLC. (Preliminary) Function Description Synchronous Buck Converter Primary VCORE power is provided by a synchronous, voltage-mode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency synchronous buck converter, including soft-start, shutdown, and cycle-by-cycle current limit. Referring to the functional block diagram FIG 1, the output voltage of the synchronous converter is set and controlled by the output of the error comparator. The external resistive divider reference voltage, is derived from an internal trimmed-bandgap voltage reference. The inverting input of the error comparator receives its voltage from the FB pin. The internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the virtual oscillation frequency to 200KHz. The virtual frequency oscillator sets the PWM latch. This pulls DRVN low, turning off the low-side N_MOSFET and DRVP is pulled low, turning on the high-side P-MOSFET (once the cross-current control allows it). The triangular voltage ramp at the FB pin is then compared against the reference voltage at the inverting input of the error comparator. When the FB voltage increases above the reference voltage, the comparator output goes high. This pulls DRVP high, turning off the high-side P-MOSFET, and DRVN is pulled high, turning on the low-side N-MOSFET (once the cross-current control allows it). The Virtual Frequency Oscillator then generates a programmed off time to allow the FB voltage to return to the valley voltage of the triangular ramp. At the end of the off time the PWM latch is set and the cycle repeats again. Under Voltage Lockout The under voltage lockout circuit of the AP2007 assures that the high-side P-MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if VCC falls below 3.8V. Normal operation resumes once VCC rises above 4.0V. Anachip Corp www.anachip.com.tw 5/7 RDS(ON) Current Limiting The current limit threshold (0.4V) is set by connecting an internal resistor from the VCC supply to OCSET. Vocset is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to avoid false current limit triggering due to uncontributing measurements from the MOSFETs off-voltage. When the voltage at PHASE is less than the voltage at OCSET, an over-current condition occurs and the soft start cycle is initiated. The synchronous switch turns on and SS/ SHDN starts to sink 2uA. When SS/ SHDN reaches 0.2V, it then starts to source 10uA and a new cycle begins. When the soft start voltage is below 0.9V the cycle is controlled with pulse by pulse current limiting. Soft Start Initially, SS/ SHDN pin sources 10uA of current to charge an external capacitor. The inverting input of the error comparator is clamped to a voltage proportional to the voltage on SS/ SHDN . This limits the on-time of the high-side P-MOSFET, thus leading to a controlled ramp-up of the output voltages. Rev. 1.0 Apr 1, 2005 AP2007 Synchronous PWM with VFC Controller Function Description (Continued) Hiccup Mode During power up, the SS/ SHDN pin is internally pulled low until VCC reaches the under-voltage lockout level of 4V. Once VCC has reached 4V, the SS/ SHDN pin is released and begins to source 10uA of current to the external soft-start capacitor. As the soft-start voltage rises, the inverting input of the error comparator is clamped to this voltage. When the error signal reaches the level of the internal 0.8V reference, the output voltage is to have reached its programmed voltage. If an over-current condition has not occurred the soft-start voltage will continue to rise and level off at about 2.5V. An over-current condition occurs when the high-side drive is turned on, but the PHASE node does not reach the voltage level set at the OCSET pin. Once an over-current occurs, the high-side drive is turned off and the low-side drive turns on and the SS/ SHDN pin begins to sink 2uA. The soft-start voltage will begin to decrease as the 2uA of current discharge the external capacitor. When the soft-start voltage reaches 0.2V, the SS/ SHDN pin will begin to source 10uA and begin to charge the external capacitor causing the soft-start voltage to rise again. If the over-current condition is no longer present, normal operation will continue. If the over-current condition is still present, the SS/ SHDN pin will again begin to sink 2uA. This cycle will continue indefinitely until the over-current condition is removed. In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with cathode connected to PHASE and anode connected to GND. (Preliminary) Marking Information (Top View) 8 5 Logo AP2007 YY WW X 1 4 Part No. ID code: internal Xth week: 01~52 Year: "01" =2001 "02" =2002 ~ SOP-8L Anachip Corp www.anachip.com.tw 6/7 Rev. 1.0 Apr 1, 2005 AP2007 Synchronous PWM Controller Package Information Package Type: SOP-8L E H L VIEW "A" D 7 (4X) A2 A 0.015x45 7 (4X) A1 e B y C VIEW "A" Symbol A A1 A2 B C D E e H L y θ Dimensions In Millimeters Min. Nom. Max. 1.40 1.60 1.75 0.10 0.25 1.30 1.45 1.50 0.33 0.41 0.51 0.19 0.20 0.25 4.80 5.05 5.30 3.70 3.90 4.10 1.27 5.79 5.99 6.20 0.38 0.71 1.27 0.10 8O 0O Dimensions In Inches Min. Nom. Max. 0.055 0.063 0.069 0.040 0.100 0.051 0.057 0.059 0.013 0.016 0.020 0.0075 0.008 0.010 0.189 0.199 0.209 0.146 0.154 0.161 0.050 0.228 0.236 0.244 0.015 0.028 0.050 0.004 0O 8O Anachip Corp www.anachip.com.tw 7/7 Rev. 1.0 Apr 1, 2005