APW7047

APW7047 Dual Advanced PWM and Source-Sink Linear Controller Features • 3 Regulated Voltages are provided General Description The APW7047 provides the power controls and protections for three output voltages on AGP/PCI Graphic Card applications. It integrates two PWM controllers , one SOURCE-SINK linear controller, as well as the monitor and protection functions into a single package. One PWM converter (PWM1) regulates the VCORE(1.5V) for the GPU with a SYNC. buck converter. The other standard buck converter (PWM2) regulates the VMEM(2.5V) for the power of DDR memory. The SOURCE-SINK linear controller control two external MOSFETs to be a linear regulator with the capability of sourcing and sinking current. It regulates the VTT (1.25V) power for DDR Termination voltage. Additional built-in over-voltage protection (OVP) will be started when the VCORE or VMEM output is above 115% of each DAC setting (VCORE and VMEM). OVP function will shutdown the all output voltages until re-powering on the IC. For each PWM converter, the over-current function monitors the output current by sensing the voltage drop across the MOSFET‘s rDS(ON) , eliminating the need for a current sensing resistor. − SYNC. Buck Converter for VCORE (1.15V~1.50V) − Standard Buck Converter for VMEM (2.40V~2.75V) −Linear Controller with SOURCE-SINK Regulation for VTT(1.25V) • • Simple Single-Loop Control Design − Voltage-Mode PWM Control Excellent Output Voltage Regulation − VCORE Output : ±2% Over Temperature − VMEM Output : ±2% Over Temperature − VTT Output : 1/2 VIN ±25mV Over Temperature Min. VIN = 1.7V • Fast Transient Response − Built-in Feedback Compensation − Full 0% to 100% Duty Ratio • • • Over-Voltage and Over-Current Fault Monitor Constant Frequency Operation(200kHz) 24 pins, SOIC Package Pin Description VCC 1 UGATE 24 BOOT 2 23 UGATE 2 PHASE2 22 PHASE2 LGATE1 21 PG ND 20 MEM2 19 MEM1 18 MEM0 17 CORE2 16 CORE1 15 CORE0 14 OCSET2 13 VSE N2 UGATE 1 2 Applications • • • M/B DDR Power Regulation AGP/PCI Graphics Power Regulation SSTL-2 Termination PHASE1 3 SS SD 4 5 SO URCE 6 SINK FB VIN 7 8 9 OCSET1 10 VSE N1 11 GND 12 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. C opyright  A NPEC Electronics Corp. Rev.A.1 - May., 2002 1 www.anpec.com.tw APW7047 Ordering and Marking Information APW7047 Handling Code Temp. Range Package Code Package Code K : SOP-24 Temp. Range C : 0 to 70° C Handling Code TU : Tube TR : Tape & Reel APW7047K : APW7047 XXXXX XXXXX - Date Code Block Diagram VCC SS O C S E T1 VCC OC1 28µA PW M1 4 .5 V OVP1 SD EA1 Th erm al P r o t e c t io n S o f t- S ta r t a n d F a u lt L o g ic 200µA PHASE1 V CC IN H IB IT U G A TE 1 Po w e r O n Res et G a te C o n tr o l 115% V c o re V CC LG A T1 VSEN1 V CORE T T L D /A C o n v e r te r CORE0 CORE1 CORE2 VSEN2 O s c illa t o r EA2 V IN H IB IT M EM T T L D /A C o n v e r te r MEM0 MEM1 MEM2 SOURCE IN H IB IT OVP2 115% V M EM OC2 50% R e s is t o r D iv id e r V PW M2 G a te C o n tr o l CC U G A TE 2 PGND PHASE2 GND FB S IN K 200uA B u ffe r V IN O C S E T2 Absolute Maximum Ratings Symbol VCC VI , VO TA TJ TSTG TS Supply Voltage Input , Output or I/O Voltage Operating Ambient Temperature Junction Temperature Storage Temperature Soldering Temperature 2 Parameter Rating 15 GND -0.3 V to VCC +0.3 Range 0 to 70 Range 0 to 125 Range -65 to +150 300 ,10 seconds Unit V V °C °C °C °C www.anpec.com.tw Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 APW7047 Thermal Characteristics Symbol R JA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Value 75 65 Unit °C/W Electrical Characteristics Unless otherwise specified, these specifications apply over VCC=VBOOT=12V and TA=0~70°C. Typical values refer to TA=25°C. Sym bol S u p ply C u rre nt IC C IC C SD N o m ina l S upp ly C urren t S h utdo w n S up p ly C urren t S D = 0V,U G AT E 1,U G AT E 2, LG AT E 1 , S O U R C E , an d S IN K O pen S D = 5V 8 2.7 P a ram ete r Test C o n d itio n s M in . A P W 704 7 Typ . M ax. U n it mA P o w er-o n R eset R isin g V C C T hre sho ld F alling V C C T hresho ld S D In put H ig h Vo lta ge S D In put Low Voltage O scillator F OSC F ree R un ning F req u ency 185 200 1.9 215 kH z V ∆ V O S C R a m p A m plitu de P W M C o ntroller R efe re nce Vo ltag e P W M 1 R efere nce Vo lta g e V CORE A ccu rac y C O R E 0-C O R E 2 Inpu t H igh Vo lta ge C O R E 0-C O R E 2 Inpu t Low Vo lta ge P W M 2 R efere nce Vo lta g e V M EM A ccu rac y M E M 0-M E M 2 Inp ut H ig h Vo lta ge M E M 0-M E M 2 Inp ut L ow Vo lta ge S O U R C E -S IN K L ine ar C o ntro ller V FB F B R e gulation Voltag e V F B a ccuracy M ax. S O U R C E P in D rive C u rrent M ax. S IN K P in D rive C urre nt Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 3 Vocse t=3 V Vocse t=3 V 3.6 2.0 4.2 4.6 V V V 0.8 V -2.0 2.0 +2.0 % V 0.8 -2.0 2.0 0.8 R e gu la tor S o urcing or S inkin g C u rrent -25 ± 0.8 ± 0.8 +2.0 V % V V 0.5V IN +25 V mV mA mA www.anpec.com.tw APW7047 Electrical Characteristics (Cont.) Unless otherwise specified, these specifications apply over VCC=VBOOT=12V and TA=0~70°C. Typical values refer to TA=25°C. Symbol Parameter Test Conditions VIN=2.5V VCC=12V VUGATE1,2=6V VCC=12V,VUGATE1,2=6V Min. APW7047 Typ. Max. 2 Unit uA IVIN VIN Input Bias Current PWM Controllers Gate Drivers IUGATE RGATE Protection VSEN1,2 OVP trip point (VSEN1/VCORE and VSEN2/VMEM ) VSEN1,2 O.V. Hysteresis IOCSET ISS Ocset Current Source Soft start Current UGATE1,2 Source, LGATE1 Source UGATE1,2 Sink, LGATE1 Sink 0.74 3 4 A Ω VSEN Rising 115 2 120 % Vocset=3V 170 200 28 230 uA Functional Pin Description VCC (Pin 1) Provide a +12V bias supply for the IC to this pin. This pin also provides the gate bias charge for the MOSFETs of the SOURCE-SINK regulator. The voltage at this pin is monitored for Power-On Reset (POR) purposes. UGATE1 (Pin 2) Connect this pin to the upper MOSFET gate of the PWM1 converter. This pin provides the gate drive for the MOSFET. PHASE1 (Pin 3) Connect this pin to the PWM1 converter’s upper MOSFET source.This pin is used to monitor the voltage drop across the MOSFET for over-current protection. SS (Pin 4) Connect a capacitor from this pin to ground.This capacitor, along with an internal 28uA current source, Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 4 sets the soft-start interval of all power controls and preventing the outputs from overshoot as well as limiting the input current . SD (Pin 5) The pin shuts down all power outputs. A TTL compatible , logic level high signal applied at this pin immediately discharges the soft-start capacitor,disabling all power outputs. When re-enabled, the IC undergoes a new soft-start cycle. Left open, this pin is pulled low by an internal pull-down resistor, enabling operation. SOURCE (Pin 6) Connect this pin to the upper MOSFET gate drive of the SOURCE-SINK regulator. This pin drives the upper external MOSFET as a sourcing regulator. SINK (Pin 7) Connect this pin to the lower MOSFET gate drive of www.anpec.com.tw APW7047 Functional Pin Description (Cont.) the SOURCE-SINK regulator. This pin drives the lower external MOSFET as a sinking regulator. FB (Pin 8) Connect this pin to output of the SOURCE-SINK regulator. This pin provides the voltage feedback path for the sourcing and sinking regulators. This pin is internally connected to the negative input of the SOURCE controller, and also connected to the positive input of the SINK controller. VIN (Pin 9) Connect this pin to VMEM or a fixed voltage source. Two voltages, about 0.5VIN, are generated by an internal resistor divider as the reference voltages of the sourcing and sinking regulators. The sinking regulation voltage is higher than the sourcing one to prevent a direct current path through the upper and lower MOSFETs. OCSET1 (Pin 10) Connect a resistor (ROCSET ) from this pin to the drain of the PWM1 converter’s MOSFET. ROCSET, an internal 200uA current source (IOCSET ), and the MOSFET’s onresistance(rDS(ON)) set the converter’s over-current (OC) trip point according to the following equation: I OCSET x RO CS ET r DS( ON) GND (Pin 12) Signal ground for the IC. All voltage levels are measured with respect to this pin. VSEN2 (Pin 13) This pin is connected to the PWM2 converter’s output voltage to provide the voltage feedback path. The overvoltage protection(OVP) comparator uses this pin to monitor the output voltage for over- voltage protection. OCSET2 (Pin 14) Connect a resistor (ROCSET ) from this pin to the drain of the PWM2 converter’s MOSFET. The function of this pin is similar to OCSET1(pin 10) for OC detection and POR purposes. CORE0-2 (Pin 15-17) CORE0-2 are TTL-compatible logic level input pins to the 3-bit DAC. The states of the three pins set the internal reference voltage (VCORE) for the PWM1 converter and also set the OVP threshold voltage for PWM1 converter. MEM0-2 (Pin 18-20) MEM0-2 are TTL-compatible logic level input pins to the other 3-bit DAC. The states of the three pins set the internal reference voltage (VMEM) for the PWM2 converter and also set the OVP threshold voltage for PWM2 converter. PGND (Pin 21) Connect this pin to the anode of the flywheel diodes of the two PWM converters. LGATE1 (Pin 22) Connect this pin to the Lower MOSEFT gate of the PWM1 converter. This pin provides the gate drive for the MOSFET. IPEAK = An over-current trip cycles the soft-start function. The voltage at this pin is monitored for Power-On Reset (POR) purposes. VSEN1 (Pin 11) This pin is connected to the PWM1 converter’s output voltage to provide the voltage feedback path. The overvoltage protection(OVP) comparator uses this pin to monitor the output voltage for over- voltage protection Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 5 www.anpec.com.tw APW7047 Functional Pin Description PHASE2 (Pin 23) Connect this pin to the PWM2 converter’s MOSFET source.This pin is used to monitor the voltage drop across the MOSFET for over-current protection. UGATE2 (Pin 24) Connect this pin to the MOSFET gate of the PWM2 converter. This pin provides the gate drive for the MOSFET. Table 1 DAC Table CORE2 0 0 0 0 1 1 1 1 Pin Name CORE1 CORE0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 VCORE Voltage 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 MEM2 0 0 0 0 1 1 1 1 Pin Name MEM1 0 0 1 1 0 0 1 1 MEM0 0 1 0 1 0 1 0 1 VMEM Voltage 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 Simplified Power System Diagram + 5V Q2 Standard Buc k Conv erter (PWM2) VMEM A P W 7047 Q1 + 3.3V SY NC. Buc k Conv erter (PWM1) V CORE Q3 V TT SOURCE-SINK Linear Conv erter Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 6 www.anpec.com.tw APW7047 Typical Application Circuit +12V L1 1uH R1 10 C3 10uF C2 200pF R2 1.5K R3 5.1 10 C1 1uF 1 C11 200pF R8 1.5K OC SET 2 U GA T E2 PH A SE2 14 24 23 L3 1uH +3.3V C5 10uF C4 330uF C12 10uF C13 330uF C14 10uF VCC OC SET 1 +5V L2 4.7uH Q1 A PM4430 Q2 A PM4430 R5 1K R6 10K 2 R9 5.1 U GA T E1 PH A SE1 Q3 A PM9410 D2 MBRD835L L4 7.8uH VCORE C7 330uF C6 330uF R4 3 VMEM 21 R12 22 LGA TE1 PGN D 11 VSEN 1 VSEN 2 13 R10 0 R11 NC C15 330uF 20 M EM 2 9 VIN M EM 1 M EM 0 19 18 VMEM C8 330uF Q4 A PM7313 R7 NC MEM2 MEM1 MEM0 CORE2 CORE1 CORE0 C9 0.1uF 6 C OR E2 SOU R C E C OR E1 C OR E0 17 16 15 VTT C10 330uF 7 SIN K EN 5 SS 4 GND 8 FB C16 0.68uF C4, C6, C7, C8 , C10, C13, C15 : 330uF/6.3V SMD Low ESR tantalum Capacitor 12 Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 7 www.anpec.com.tw APW7047 Typical Performance 1. SOURCE-SINK Linear Regulator Transient Response - The output capacitor is 330uF (Low ESR tantalum capacitor) - Define the output cerrent (IVTT) sourcing from the regulator to be positive. - The interval of current transitions in figures 1 and 2 are all smaller than 1uS. - In figure 1, the IVTT transition is from -0.2A to 4A. - In figure 2, the IVTT transition is from 0.2A to -4A. Figure 1 Figure 2 Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 8 www.anpec.com.tw APW7047 Packaging Information SO – 300mil ( Reference JEDEC Registration MS-013) D N H E GAUGE PLANE 1 23 A e B A1 L 1 Millimeters Dim A A1 B D E e H L N φ1 Min. 2.35 0.10 0.33 7.40 10 0.40 0° Max. 2.65 0.30 0.51 7.60 10.65 1.27 8° Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 10.10 11.35 12.60 15.20 17.70 8.80 Max. 10.50 11.76 13 15.60 18.11 9.20 Dim A A1 B D E e H L N φ1 Inches Min. Variations- D Max. Variation Min. Max. SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 0.398 0.447 0.496 0.599 0.697 0.347 0.413 0.463 0.512 0.614 0.713 0.362 0.093 0.1043 0.004 0.0120 0.013 0.020 See variations 0.2914 0.2992 0.050BSC 0.394 0.016 0° 0.419 0.050 8° See variations 1.27BSC See variations See variations Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 9 www.anpec.com.tw APW7047 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) Reference JEDEC Standard J-STD-020A APRIL 1999 temperature Peak temperature 183°C Pre-heat temperature Time Classification Reflow Profiles Convection or IR/ Convection Average ramp-up rate(183°C to Peak) 3°C/second max. 120 seconds max Preheat temperature 125 ± 25°C) 60 – 150 seconds Temperature maintained above 183°C Time within 5°C of actual peak temperature 10 –20 seconds Peak temperature range 220 +5/-0°C or 235 +5/-0°C Ramp-down rate 6 °C /second max. 6 minutes max. Time 25°C to peak temperature VPR 10 °C /second max. 60 seconds 215-219°C or 235 +5/-0°C 10 °C /second max. Package Reflow Conditions pkg. thickness ≥ 2.5mm and all bgas Convection 220 +5/-0 °C VPR 215-219 °C IR/Convection 220 +5/-0 °C pkg. thickness < 2.5mm and pkg. volume ≥ 350 mm³ pkg. thickness < 2.5mm and pkg. volume < 350mm³ Convection 235 +5/-0 °C VPR 235 +5/-0 °C IR/Convection 235 +5/-0 °C www.anpec.com.tw Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 10 APW7047 Reliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C , 5 SEC 1000 Hrs Bias @ 125 °C 168 Hrs, 100 % RH , 121 °C -65°C ~ 150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 1 00mA Carrier Tape & Reel Dimensions t E Po P P1 D F W Bo Ao D1 T2 Ko J C A B T1 Application A 330±1 B 62 ±1.5 D C 12.75 ± 0.15 D1 J 2 ± 0.6 Po 4.0 ± 0.1 T1 24.4 ± 0.2 P1 T2 2± 0.2 Ao W 24 ± 0.3 Bo P 12 ± 0.1 Ko E 1.75± 0.1 t SOP- 24 F 11.5 ± 0.1 1.55 +0.1 1.5+ 0.25 2.0 ± 0.1 10.9 ± 0.1 15.9± 0.1 3.1± 0.1 0.35±0.05 Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 11 www.anpec.com.tw APW7047 Cover Tape Dimensions Application SOP- 24 Carrier Width 24 Cover Tape Width 21.3 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright  ANPEC Electronics Corp. Rev. A. Rev.A.1 - May., 2002 12 www.anpec.com.tw