APW7078XI-TU

APW7078 Single PWM Switching Controller Features • • • • • • • • • 2.3 to 5.5V Input Voltage Range Adjustable Frequency: Maximum 1MHZ Incorporates Soft-start Function Built-in Short-circuit Detection Circuit (SCP) Low Operating Current: Maximum to 1mA Low Shutdown Current: Maximum to 1mA Package: MSOP-8, TSSOP-8 Under Voltage Lockout Lead Free Available (RoHS Compliant) General Description The A PW 7078 is a single P W M, s tep-up DC-DC c ont roller wit h low operating volt age applic at ion int egr at ing s oft-st art and short circ uit detect ion function. And the oscillator switching frequency on chip can be operated by terminating OSC pin to connect c apac itor and resis t or for adjus t able operating frequency. Soft-start is adjusted with external capacitor, whic h s et s t he input current ramp. Bes ides, the external compensation FB pin will apply the flexibility in the dynamic loop status, which allow using small, low equivalent series res istance (ES R) c eramic output capacitors. Applications • • • • LCD Display Power Source Camcorders VCRs, MP3 and Digital Still Camera Hand-held and Communication Instruments PDAs Pinouts INV SCP VDD CTL 1 2 3 4 8 7 6 5 FB OSC GND OUT Ordering and Marking Information APW7078 Lead Free Code Handling Code Temp. Range Package Code APW7078 X : APW7078 O : APW7078 XXX XX APW7078 XXXXX APW7078 Package Code X : MSOP - 8 O : TSSOP-8 Temp. Range I : -40 to 85 °C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device XXXXX - Date Code XXXXX - Date Code No tes : ANPEC lea d-free produ cts co nta in mol din g comp oun ds/die attach m ate ria ls and 10 0% matte in pla te te rmin atio n fi nish ; wh ich are full y compl iant with Ro HS and compa tibl e wi th both SnPb an d le ad-free sold ieri ng op era tio ns. AN PEC le ad-free produ cts me et or exceed th e l ead -free req uireme nts of IPC /JEDEC J STD -02 0C fo r MSL classi ficati on at lea d-fre e p eak re flo w temp era ture. ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 1 www.anpec.com.tw APW7078 Block Diagram VDD OSC UVLO 0.9 V 0.16V 0.1 V Sawtooth wave oscillator VDD VDD INV + Error Amp. + + + DTC 0.8V PWM Comp. Output drive circuit OUT Vref 0.5V FB Soft start SCP GND SCP CTL Absolute Maximum Ratings Symbol VDD VIO TA TJ T STG TS Supply Voltage Input / Output Pins Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Parameter Value -0.3 to 7 -0.3 to 7 -40 to 85 -40 to 150 -65 to +150 300, 10 seconds Unit V V °C °C °C °C Recommended Operating Condition Symbol VDD VINV VCTL C SCP RT CT FSW Supply Voltage Error Amplifier Invert Input Voltage Control Pin Input Voltage SCP Pin Capacitor Timing Resistance Timing Capacitor Oscillator Frequency 2 Parameter Value Min. 2.3 -0.2 -0.2 1.0 100 200 Typ. 0.1 3.3 600 Max. 5.5 1 VDD 10 270 1000 Unit V V V µF KΩ pF KHz C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 www.anpec.com.tw APW7078 Electrical Characteristics Symbol Entire Device VDD IDD ISD Dmax Supply Voltage Supply Current Shutdown Current Maximum Duty Cycle VDD Startup Threshold Voltage Hysteresis voltage Voltage at Soft-Start completion Soft-Start Charge Current Vscp=0V VDD=2.3V to 5.5V CTL pin open or VDD Rt=3.3K, Ct=270pF 80 2.3 0.7 0.1 85 5.5 1 1 92 V mA µA % Parameter (TA = 25°C, VDD = 3.3V, unless otherwise specified) Test Conditions APW7078 Min Typ Max Unit Under Voltage Lockout Protection VTH VR 1.9 2.0 1.8 2.1 1.9 V V Soft-Start Vss Ics 0.7 -0.7 0.8 -1.0 0.9 -1.5 V µA Short Circuit Protection(SCP) Vscp I scp Fosc Fdv Fdt Threshold Voltage Charge Current Oscillator Frequency Frequency Stability for Voltage Vscp=0V Rt=3.3KΩ, Ct=270pF VDD=2.3V to 5.5V Ta=-40°C to 85°C 0.7 -0.7 500 0.8 -1.0 600 2 5 0.9 -1.5 700 5 V µA KHz % % Sawtooth waveform oscillator(OSC) Frequency Stability for Temperature Error Amplifier Vref Reference Voltage VFB=INV VDD=2.3V to 5.5V Ta=-40°C to 85°C 0.49 0.5 5 1 0.51 20 V mV % Vref/dV Vref stability Vref variation with Vref/dT Temperature gm Transconductance IB VOH VOL Input Bias Current Output Voltage Range Output Source Current Output Sink Current 1000 INV=0V INV=0V,FB=0.5V INV=1V,FB=0.5V -150 140 1.6 1300 1600 1 µA/V µA V V µA µA 1.8 0.01 -180 170 -210 200 C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 3 www.anpec.com.tw APW7078 Electrical Characteristics (Cont.) (TA = 25°C, VDD = 3.3V, unless otherwise specified) Symbol Parameter Test Conditions APW7078 Min -150 150 Typ - 200 200 0.2V DD 0.8VDD M ax Unit PWM Controller Driver ISOURCE Output Source Current ISINK VIL VIH Output Sink Current Control Block Control Voltage Active mode Switch-off mode Duty5%, OUT=5V mA mA Function Pin Description Pin No. 1 2 3 4 5 6 7 8 Symbol INV SCP VDD CTL OUT GND OSC FB I/O I I O O Description Internal 0.5V reference voltage. Use a resistor divider to set the output voltage. Soft-start and short-circuit detection, connects a capacitor from the pin to ground. Power supply input pin for IC voltage. Output control pin. Low = operating mode; High = shutdown mode. External MOSFET driving pin. Ground pins of the IC. Setting capacitor and resister to provide oscillation switching frequency adjustment. Error amplifier output pin. Setting circuit for IC compensation. Application Schematic VIN 2.5V~4.2V L1 10uH C1 22uF 1 INV 2 SCP 3 VDD C2 0.1uF C7 1uF R1 390K 4 CTL R3 R2 91K Q2 2N7002 820K Cp FB 8 OSC 7 GND 6 OUT 5 C3 270pF R4 3.3K C4 0.1uF D1 VOUT 5V 300mA SS12 R5 1K Q1 APM2300A C5 47uF C6 0.1uF *R2≦ 100K Ω is recommended 33pF Fig1: APW7078 Step-up Application for Adjust Voltage C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 4 www.anpec.com.tw APW7078 Application Schematic VIN 2.5V~5.5V L1 10uH C1 22uF R6 2R2 1 INV 2 SCP 3 VDD C2 0.1uF C8 1uF R1 390K 4 CTL FB 8 OSC 7 GND 6 5 OUT C3 270pF D1 VOUT SS12 9V 100mA R5 12K Q1 APM2300A C5 33uF C6 0.1uF R3 R2 9.1K Q2 2N7002 150K Cp 68pF R4 4.3K C4 0.1uF Fig2: APW7078 Step-up Application for Adjust Voltage 26V D2 C10 0.1uF -9V C8 1uF C9 1uF VIN 2.5V~5.5V L1 22uH C1 22uF R6 2R2 1 2 3 D3 C11 0.1uF C12 D4 C13 3.3uF 1uF D1 9V SS12 INV SCP VDD CTL FB OSC GND OUT 8 7 6 5 R5 1K Q1 APM2300A C5 100uF C6 0.1uF C2 0.1uF C7 1uF R10 390K 4 R3 R2 75K 1.2M C3 270pF R4 3.3K C4 0.1uF Q2 2N7002 *R2≦100KΩ is recommended Fig3. APW7078 Multiple-output for TFT LCD Panel Power C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 5 www.anpec.com.tw APW7078 Timing Diagram FB input voltage Short cirucit detect comparator Sawtooth wave output Soft-start setting voltage Output pin waveform SCP detect voltage SCP pin waveform ts Soft start ON Power supply control SW OFF Output short circuit tscp Output short circuit Output short circuit detection Typical Characteristics (TA = 25°C, VDD = 3.3V, unless otherwise specified) Supply Current vs. Supply Voltage 800 700 SHDN and Release Supply Current(µA) 500 400 300 200 100 0 1 2 3 4 5 TA =25° C RT=3.3kΩ CT=270pF Maximum Duty(%) Supply Voltage(V) CH1=VOUT 2V/DIV TIME=20ms/DIV CH2=VCTL 2V/DIV CH3=Vss 0.5V/DIV CH4=IL 1A/DIV 6 www.anpec.com.tw 600 C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 APW7078 Typical Characteristics (Cont.) (TA = 25°C, VDD = 3.3V, unless otherwise specified) Reference Voltage vs. Supply Voltage 520 516 0.54 0.53 Reference Voltage vs. Temperature Reference Voltage(mV) 512 508 504 500 496 492 488 484 480 1 2 3 4 5 Reference Voltage(V) 0.52 0.51 TA =25° C VDD=3.3V 0.50 0.49 0.48 0.47 0.46 -40 -20 0 20 40 60 80 Supply Voltage(V) Temperature(° C) Oscillator Frequency vs. Timing Resistor 1000 Maximum Duty vs. Oscillator Frequency 100 Oscillator Frequency(kHz) 90 800 CT=270pF CT=100pF 600 Maximum Duty(%) 80 CT=200pF 70 CT=100pF 400 CT=270pF 60 200 50 0 0 2 4 6 8 10 40 10 100 1000 Timing Resistor(k Ω ) Oscillator Frequency(kHz) C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 7 www.anpec.com.tw APW7078 Typical Characteristics (Cont.) (TA = 25°C, VDD = 3.3V, unless otherwise specified) Power on and off under light load Power on and off under heavy load IOUT= 5mA, TIME=40ms/DIV CH1=OUT 5VDIV CH2=VOUT=VDD 2V/DIV CH3=IL 0.5A/DIV CH4=Vss 1V/DIV IIOUT= 400mA, TIME=40ms/DIV CH1=OUT 5VDIV CH2=VOUT=VDD 2V/DIV CH3=IL 0.5A/DIV CH4=Vss 1V/DIV Efficiency 100 90 80 Efficiency 100 95 90 VDD=2.5V VDD=3.3V Efficiency(%) VDD=3.3V 70 60 50 40 30 20 1 10 100 Efficiency(%) 85 80 75 70 65 60 10 100 1000 VDD=5V VDD=3.6V VOUT=9V L=10µH CT=270pF RT=4.3K VOUT=5V L=10µH CT=270pF RT=3.3K Output Current(mA) Output Current(mA) C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 8 www.anpec.com.tw APW7078 Typical Characteristics (TA = 25°C, VDD = 3.3V, unless otherwise specified) Frequency Variation Ratio vs. Supply Voltage Frequency Variation Ration Δ f/f(%) 10 8 6 4 2 0 -2 -4 -6 -8 -10 1 2 3 4 5 Frequency Variation Ratio vs. Temperature Frequency Variation Ration Δ f/f(%) 5 4 3 2 1 0 -1 -2 -3 -4 -5 -40 TA =25° C RT=3.3k Ω CT=270pF CT=270pF RT=3.3kΩ -20 0 20 40 60 80 Supply Voltage(V) Temperature(° C) Function Description Setting Oscillating Frequency The oscillator circuit generat e a triangular sawt ooth wave with a peak of 0.9V and through of 0.16V using the timing capacitor(Ct) and the timing resistor(Rt) that are connected to OSC pin. This oscillator can provide oscillating frequency up to 1MHz. i=c ∆V ∆t t1 = C t ⋅ 0.9V − 0.16V 2mA − t Rt Ct = 370 ⋅ C t V (t ) = VH ⋅ e t 2 = R t Ct ln(VH / VL ) = 1.72 ⋅ Rt C t T = t1 + t 2 = C t (370 + 1.72Rt ) 0.9V Vosc VH Setting Output Voltage The out put voltage is set using t he INV pin and a re- V(t) 0.16V sistor divider connected to the output as shown in the typical operating circuit. The internal reference voltage is 0.5V with 2% variation, so the ratio of the feedbac k res istors set s the output voltage according to the following equation: 9 www.anpec.com.tw VL t t1 t2 Time C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 APW7078 Function Description (Cont.) Setting Output Voltage (Cont.) (pin 5) is set low and the SCP pin stays low. Once the protection circuit operates, the circuit can be restored by resetting the power supply. Short circuit detection time can be calculate as follow:  R3  VOUT = 1 +  × 0 .5 V  R2  To avoid the thermal nois e from feedback resistor, Resistance R2 smaller than 100k Ω and 1% variation is recommended. Error amplifier The error amplifier detects the output voltage of the swit ching regulat or and out put s the PW M control signal. The voltage gain is fixed, and connec ting a phase compensation resistor and capacitor to the FB pin (pin 8) provides stable phase compensation for the system. PWM comparator The volt age c omparator has one invert ing and three non-inverting inputs. The comparator is a voltage/pulse width converter that controls the ON time of the output pulse depending on the input voltage. The output level is high (H) when the sawtooth wave is lower than the error amplifier output voltage, soft start setting voltage, and idle period setting voltage. Output circuit The output circuit is a typical push-pull configuration to drive an external NMOS transistor directly. It can provide a 200mA source/sink to/from OUT(pin 6). Soft start and short circuit detection Soft start operation is set by connecting capacitor Cscp to t he SCP pin (pin 2). Soft s tart prevents a current spike on start-up.On completion of soft start operation, the SCP pin (pin 2) s tays low and enters the short circuit detection wait stat e.When an output short circuit occurs, the error amplifier output is fixed at 1.8V and capacitor Cscp starts charging. After charging to approximately 0.8 V, t he output pin C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 10 t SCP = 0 .8 × Cscp(µ F ) Under Voltage Lock Out(UVLO) Trans ient s during powering on or inst ant aneous glitches in the supply voltage can cause system damage or failure. The circuit to prevent malfunction at low input voltage detect s a low input voltage by comparing the supply voltage to the internal reference voltage. On detection, the circuit fixes the output pin to low. The system recovers when the supply voltage rises back above the t hreshold volt age of the malfunc tion prevention circuit. Layout Considerations Switching Noise Decoupling Capacitor A 0.1µF ceramic capacitor should be placed close to the V OUT pin and GND pin of the chip t o filter t he switc hing spikes in t he output voltage monitored by the VOUT pin. Feedback Network On A PW7078 applicat ion, the feedback networks should be connec ted directly to a dedicated analog ground plane and this ground plane must connect to the GND pin. If no analog ground plane is available then this ground must tie directly to the GND pin. The feedback network, resistors R2 and R3, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can inject noise into the system. Input Capacitor The input capacitor CIN in VIN must be placed close to the IC. This will reduce copper trace resistance which www.anpec.com.tw APW7078 Function Description(Cont.) Input Capacitor (Cont.) effects input voltage ripple of the IC. For additional input voltage filtering, a 1µF capac itor can be placed in parallel with CIN , close to the VDD pin, to shunt any high frequency noise to ground. Demo Board Circuit Layout Top Layer Bottom Layer C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 11 www.anpec.com.tw APW7078 Packaging Information MSOP-8 e1 E E1 e1 L1 A1 A3 A2 L2 Dim A1 A2 A3 e e1 E E1 L1 L2 Millimeters Min. 0.06 0.86 TYP 0.25 0.65 TYP 2.90 4.8 2.90 0.25 REF 0.0375 REF 3.1 5.0 3.1 0.114 0.189 0.169 0.4 0.01 Max. 0.15 Min. 0.002 Inches Max. 0.006 0.34 TYP 0.0126 0.0256TYP 0.124 0.197 0.177 0.039REF 0.953 REF C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 12 www.anpec.com.tw APW7078 Packaging Information TSSOP-8 e 87 2x E/2 E1 E S ( 2) GAUGE PLANE 12 e/2 D A2 A b A1 0.25 L (L1) ( 3) 1 Dim A A1 A2 b D e E E1 L L1 R R1 S φ1 φ2 φ3 Millimeters Min. 0.00 0.80 0.19 2.9 0.65 BSC 6.40 BSC 4.30 0.45 1.0 REF 0.09 0.09 0.2 0° 12° REF 12° REF 0.004 0.004 0.008 0° 4.50 0.75 0.169 0.018 Max. 1.2 0.15 1.05 0.30 3.1 Min. 0.000 0.031 0.007 0.114 Inches Max. 0.047 0.006 0.041 0.012 0.122 0.026 BSC 0.252 BSC 0.177 0.030 0.039REF 8° 8° 12° REF 12° REF C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 13 www.anpec.com.tw APW7078 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. (IR/Convection or VPR Reflow) Reflow Condition TP tp Critical Zone T L to T P Ramp-up TL Temperature tL Tsmax Tsmin Ramp-down ts Preheat 25 t 2 5 C to Peak ° Time Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate 3°C/second max. 3°C/second max. (TL to T P) Preheat 100°C 150°C - Temperature Min (Tsmin) 150°C 200°C - Temperature Max (Tsmax) 60-120 seconds 60-180 seconds - Time (min to max) (ts) Time maintained above: 183°C 217°C - Temperature (TL) 60-150 seconds 60-150 seconds - Time (t L) Peak/Classificatioon Temperature (Tp) See table 1 See table 2 Time within 5 °C of actual 10-30 seconds 20-40 seconds Peak Temperature (tp) Ramp-down Rate 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25 °C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface. C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 14 www.anpec.com.tw APW7078 Classification Reflow Profiles(Cont.) Table 1. SnPb Entectic Process – Package Peak Reflow Temperatures 3 3 P ackage Thickness Volume mm Volume mm < 350 ≥ 350 < 2.5 mm 240 +0/-5 °C 225 +0/- 5 ° C ≥ 2.5 mm 225 +0/-5 °C 225 +0/- 5 ° C Table 2. Pb-free Process – Package Classification Reflow Temperatures 3 3 3 P ackage Thickness Volume mm Volume mm Volume mm < 350 3 50 -2000 > 2000 < 1.6 mm 260 +0 ° C * 260 +0° C* 260 +0 ° C * 1 .6 mm – 2.5 mm 260 +0 ° C * 250 +0° C* 245 +0 ° C * ≥ 2.5 mm 250 +0 ° C * 245 +0° C* 245 +0 ° C * * Tolerance: The device manufacturer/supplier s hall a ssure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 °C. For example 260 ° C+0 °C) at the rated MSL level. Reliability Test Program Test item SOLDERABILITY HOLT PCT TST Method MIL-STD-883D-2003 MIL-STD 883D-1005.7 JESD-22-B, A102 MIL-STD 883D-1011.9 Description 245°C,5 SEC 1000 Hrs Bias @ 125°C 168 Hrs, 100% RH, 121°C -65°C ~ 150°C, 200 Cycles Carrier Tape & Reel Dimensions t E Po P P1 D F W Bo Ao D1 Ko C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 15 www.anpec.com.tw APW7078 Carrier Tape & Reel Dimensions(Cont.) T2 J C A B T1 Application A 3 30 ± 1 B 6 2 +1.5 D M S O P- 8 F 5 .5 ± 1 C 1 2.75+ 0.15 D1 J 2 ± 0 .5 Po T1 1 2.4 ± 0 .2 P1 2 .0 ± 0 .1 T1 1 2.4 ± 0 .2 P1 2 .0 ± 0 .1 T2 2 ± 0 .2 Ao 6 .4 ± 0 .1 T2 2 ± 0 .2 Ao 7 .0 ± 0 .1 W 1 2 ± 0. 3 Bo 5 .2 ± 0 . 1 W 1 2 ± 0. 3 Bo 3 .6 ± 0 .3 P 8 ± 0 .1 Ko E 1.75 ± 0.1 t 1 .55 +0.1 1 .55+ 0.25 4 .0 ± 0 .1 B 6 2 +1.5 D C 1 2.75+ 0.15 D1 1 .5 + 0.1 J 2 + 0.5 Po 4 .0 ± 0 .1 2 .1 ± 0 .1 0 .3 ±0.013 P 8 ± 0 .1 Ko E 1.75 ± 0.1 t A pplication A 3 30 ± 1 TSSOP-8 F 5 .5 ± 0 . 1 1 .5 + 0.1 1 .6 ± 0 .1 0 .3 ±0.013 (mm) Cover Tape Dimensions Application M SOP- 8 T SSOP- 8 Carrier Width 12 12 Cover Tape Width 9.3 9.3 Devices Per Reel 2500 2500 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 C opyright © A NPEC Electronics C orp. Rev. A.3 - Nov., 2005 16 www.anpec.com.tw