AOZ1038PI_3

AOZ1038 EZBuck™ 6 A Synchronous Buck Regulator Not Recommended For New Designs General Description Features The AOZ1038 is a high efficiency, easy to use, 6 A synchronous buck regulator. The AOZ1038 works from a 4.5 V to 18 V input voltage range and provides up to 6 A of continuous output current with an output voltage adjustable down to 0.8 V.  4.5 V to 18 V operating input voltage range The AOZ1038 is available in a 5x6 DFN-8 package or an exposed pad SO-8 package. Both are rated over a -40 °C to +85 °C ambient temperature range.  Replacement Part: AOZ3019DI   55 mΩ internal high-side switch and 12 mΩ internal     ns ig Fo r  es  D  ew  N  low-side switch High efficiency up to 95 % Internal soft start Active high power good state Output voltage adjustable to 0.8 V 6 A continuous output current Fixed 450 kHz PWM operation Cycle-by-cycle current limit Pre-bias start-up Short-circuit protection Thermal shutdown Thermally enhanced 5x6 DFN-8 and exposed pad SO-8 packages d Applications en de  Point-of-load DC/DC converters  Set top boxes  DVD / Blu-ray players/recorders om m  Cable modems  PCIe graphics cards ec Typical Application  LCD TV C1 22µF Ceramic VIN EN N ot R VIN L1 2.2µH AOZ1038 R1 COMP RC CC VOUT = 1.2V LX C2, C3, C4 22µF Ceramic FB AGND PGND R2 Figure 1. 3.3 V 6 A Synchronous Buck Regulator Rev. 2.0 December 2014 www.aosmd.com Page 1 of 15 AOZ1038 Ordering Information Part Number Ambient Temperature Range AOZ1038DI Package 5x6 DFN-8 -40 °C to +85 °C AOZ1038PI Environmental Green Product Exposed Pad SO-8 AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information. 2 AGND 3 FB 4 PAD (LX) NC PGND 1 7 NC VIN 2 6 EN AGND 3 5 COMP FB 4 PAD (LX) NC 7 NC 6 EN 5 COMP Exposed Pad SO-8 5x6 DFN-8 (Top View) Fo r N (Top View) Pin Name 1 1 PGND 2 2 3 3 Pin Function en Exposed SO-8 ec 5x6 DFN-8 om m Pin Number de d Pin Description 4 8 es VIN 8 D 1 ew PGND ig ns Pin Configuration VIN AGND Power Ground. PGND needs to be electrically connected to AGND. Supply Voltage Input. When VIN rises above the UVLO threshold and EN is logic high, the device starts up. Analog Ground. AGND is the reference point for the controller section. AGND needs to be electrically connected to PGND. 4 FB Feedback Input. The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND. 5 COMP External Loop Compensation Pin. Connect a RC network between COMP and AGND to compensate the control loop. 6 EN Enable Pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. If on/off control is not needed, connect it to VIN and do not leave it open. 7, 8 7, 8 NC No Connect Pin. Pin 7 and 8 are not internally connected. Connect these two pins externally to LX and use them for better thermal performance. Exposed Pad Exposed Pad LX Switching Node. LX is the drain of the internal PFET. LX is used as the thermal pad of the power stage. ot N 6 R 5 Rev. 2.0 December 2014 www.aosmd.com Page 2 of 15 AOZ1038 Block Diagram VIN UVLO & POR EN Internal +5V 5V LDO Regulator OTP + ISen – Reference & Bias ns Softstart Q1 ig ILimit EAmp FB – – Level Shifter + FET Driver PWM Control Logic PWM Comp ew + D 0.8V es + + 450kHz Oscillator Fo r + Short Circuit Detection Comparator – om m Absolute Maximum Ratings en de d 0.2V Q2 N COMP LX LX to AGND ot LX to AGND R LX to AGND ec Supply Voltage (VIN) Parameter 20 V -0.7 V to VIN+0.3 V Output Voltage Range Ambient Temperature (TA) -5 V (< 50 ns) Package Thermal Resistance (JA) 5x6 DFN-8 Exposed Pad SO-8 FB to AGND -0.3 V to 6 V COMP to AGND -0.3 V to 6 V PGND to AGND -0.3 V to +0.3 V N Supply Voltage (VIN) 23 V (< 50 ns) -0.3 V to VIN+0.3 V Junction Temperature (TJ) +150 °C Storage Temperature (TS) -65 °C to +150 °C ESD The device is not guaranteed to operate beyond the Recommended Operating Conditions. Rating EN to AGND Rating(1) PGND Recommended Operating Conditions Exceeding the Absolute Maximum Ratings may damage the device. Parameter AGND Rating 4.5 V to 18 V 0.8 V to VIN -40 °C to +85 °C 23 °C/W 40 °C/W 2 kV Note: 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model is a 100pF capacitor discharging through a 1.5k resistor. Rev. 2.0 December 2014 www.aosmd.com Page 3 of 15 AOZ1038 Electrical Characteristics TA = 25 °C, VIN = VEN = 12 V, VOUT = 3.3 V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40 °C to +85 °C. Conditions Min. Supply Voltage Typ. 4.5 VUVLO Input Under-Voltage Lockout Threshold VIN rising VIN falling 4.1 3.7 IIN Supply Current (Quiescent) IOUT = 0 V, VFB = 1.2 V, VEN > 1.2 V 1.6 IOFF Shutdown Supply Current VEN = 0 V VFB Feedback Voltage TA = 25 °C 1 0.788 0.8 0.5 Feedback Voltage Input Current VEN EN Input Threshold Off threshold On threshold ew IFB EN Input Hysteresis N 400 Maximum Duty Cycle DMIN Maximum On Time Fo r Frequency DMAX de Error Amplifier Transconductance PROTECTION OUTPUT STAGE ec High-Side Switch On-Resistance 10 μA V 0.812 6.8 % % 200 nA 0.6 V V mV 500 kHz % 150 ns 500 V/V 150 μA / V A °C °C 3 ms VIN = 12 V VIN = 5 V 55 75 mΩ mΩ VIN = 12 V VIN = 5 V 12 15 mΩ mΩ N ot R Low-Side Switch On-Resistance 450 mA 7.2 TJ raising TJ falling om m Soft Start Interval 2.5 150 100 en Current Limit Over-Temperature Shutdown Limit tSS V V 100 100 d Error Amplifier Voltage Gain ILIM V 2 MODULATOR fO 18 1 D Line Regulation VHYS Units es Load Regulation Max. ns VIN Parameter ig Symbol Rev. 2.0 December 2014 www.aosmd.com Page 4 of 15 AOZ1038 Efficiency Efficiency (VIN = 12V) vs. Load Current 95 90 ns 80 70 3.3V OUTPUT 1.8V OUTPUT 1.2V OUTPUT D 65 ig 75 es Efficiency (%) 85 55 50 2 3 Load Current (A) 4 N 1 5 6 de d Fo r 0 ew 60 en Detailed Description R ec om m The AOZ1038 is a current-mode step down regulator with an integrated high-side PMOS switch and a low-side NMOS switch. It operates from a 4.5 V to 18 V input voltage range and supplies up to 6 A of load current. The duty cycle can be adjusted from 6 % to 100 % allowing a wide range of output voltages. Features include enable control, power-on reset, input under voltage lockout, output over voltage protection, active high power good state, fixed internal soft-start, and thermal shut down. ot The AOZ1038 is available in a 5x6 DFN-8 package or an exposed pad SO-8 package. N Enable and Soft Start The AOZ1038 has an internal soft start feature to limit in-rush current and ensure the output voltage smoothly ramps up to regulation voltage. The soft start process begins when the input voltage rises to 4.1 V and the voltage on the EN pin is HIGH. In the soft start process, output voltage is typically ramped to regulation voltage in 4 ms. The 4 ms soft start time is set internally. The EN pin of the AOZ1038 is active high. Connect the EN pin to VIN if the enable function is not used. Pulling Rev. 2.0 December 2014 EN to ground will disable the AOZ1038. Do not leave the EN pin open. The voltage on EN must be above 2 V to enable the AOZ1038. When voltage on the EN pin falls below 0.6 V, the AOZ1038 is disabled. If an application circuit requires the AOZ1038 to be disabled, an open drain or open collector circuit should be used to interface the EN pin. Steady-State Operation Under steady-state conditions, the converter operates in fixed frequency and Continuous-Conduction Mode (CCM). The AOZ1038 integrates an internal P-MOSFET as the high-side switch. Inductor current is sensed by amplifying the voltage drop across the drain to the source of the high side power MOSFET. Output voltage is divided down by the external voltage divider at the FB pin. The difference between the FB pin voltage and reference voltage is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal. The current signal is the sum of the inductor current signal and ramp compensation signal, at the PWM comparator www.aosmd.com Page 5 of 15 AOZ1038 ns VO (V) 0.8 1.2 1.5 R1 (kΩ) R2 (kΩ) 1.0 Open 4.99 10 D Table 1. 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.1 10 5.0 52.3 10 d V O  MAX  = V IN – I O  R DS  ON  es ig Values of R1 and R2 with standard output voltages are listed in Table 1. Fo r The AOZ1038 uses a P-Channel MOSFET as the highside switch. This eliminates the bootstrap capacitor normally seen in a circuit using an NMOS switch. It allows 100 % turn-on of the high-side switch to achieve a linear regulation mode of operation. The minimum voltage drop from VIN to VO is the load current times DC resistance of the MOSFET plus DC resistance of buck inductor. It can be calculated by equation below: R   V O = 0.8   1 + ------1- R 2  ew Compared to regulators using freewheeling Schottky diodes, the AOZ1038 uses freewheeling NMOSFET to realize synchronous rectification. This greatly improves the converter efficiency and reduces power loss in the low-side switch. Output Voltage Programming Output voltage can be set by feeding back the output to the FB pin by using a resistor divider network. Refer to the application circuit shown in Figure 1. The resistor divider network includes R1 and R2. Usually, a design is started by picking a fixed R2 value and calculating the required R1 with equation below. N input. If the current signal is less than the error voltage, the internal high-side switch is on. When on, the inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high-side switch is off. When off, inductor current is freewheeling through the internal low-side N-MOSFET switch to output. The internal adaptive FET driver guarantees no turn on overlap of the high-side and low-side switches. om m en de where; VO_MAX is the maximum output voltage, VIN is the input voltage from 4.5 V to 18 V, IO is the output current from 0 A to 6 A, and RDS(ON) is the on resistance of internal MOSFET. The value is between 55 mΩ and 75 mΩ depending on input voltage and junction temperature. Since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper PMOS and the inductor. N ot R ec Switching Frequency The AOZ1038 switching frequency is fixed and set by an internal oscillator. The practical switching frequency could range from 400 kHz to 500 kHz due to device variation. The combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. Rev. 2.0 December 2014 www.aosmd.com Page 6 of 15 AOZ1038 Application Information The AOZ1038 has multiple protection features to prevent system circuit damage under abnormal conditions. The basic AOZ1038 application circuit is show in Figure 1. Component selection is explained below. Over Current Protection (OCP) The sensed inductor current signal is also used for over current protection. Since the AOZ1038 employs peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage is limited internally to be between 0.4 V and 2.5V. The peak inductor current is automatically limited cycle by cycle. Input Capacitor The input capacitor must be connected to the VIN pin and the PGND pin of the AOZ1038 to maintain steady input voltage and to filter out pulsing input current. The voltage rating of the input capacitor must be greater than maximum input voltage plus ripple voltage. ig The input ripple voltage can be approximated by the equation below: D es VO VO IO  -   1 – --------V IN = -----------------  ---------f  C IN  V IN V IN N ew Since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck circuit, the RMS value of the input capacitor current can be calculated by: VO  VO -  1 – --------- I CIN  RMS  = I O  --------V IN  V IN Thermal Protection An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and high side PMOS if the junction temperature exceeds 150 ºC. The regulator will restart automatically under the control of the soft-start circuit when the junction temperature decreases to 100 ºC. VO ---------= m V IN if we let m equal the conversion ratio: The relationship between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2. It can be seen that when VO is half of VIN, CIN is under the worst current stress. The worst current stress on CIN is 0.5 x IO. 0.5 N ot R ec om m en de d Power-On Reset (POR) A power-on reset circuit monitors the input voltage. When the input voltage exceeds 4.1 V, the converter starts operation. When input voltage falls below 3.7 V, the converter will shut down. Fo r When the output is shorted to ground under fault conditions, the inductor current decays very slowly during a switching cycle because of VO = 0 V. To prevent catastrophic failure, a secondary current limit is designed inside the AOZ1038. The measured inductor current is compared against a preset voltage which represents the current limit. When the output current is more than current limit, the high side switch is turned off. The converter will initiate a soft start once the over-current condition is resolved. ns Protection Features 0.4 ICIN_RMS (m) 0.3 IO 0.2 0.1 0 0 0.5 m 1 Figure 2. ICIN vs. Voltage Conversion Ratio Rev. 2.0 December 2014 www.aosmd.com Page 7 of 15 AOZ1038 ns ig 1  V O = I L   ESR CO + ------------------------- 8f C  O where; CO is output capacitor value, and ESRCO is the Equivalent Series Resistor of output capacitor. ew VO VO  -   1 – --------I L = ----------- f L  V IN Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below: es Inductor The inductor is used to supply constant current to output when it is driven by a switching voltage. For a given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. D For reliable operation and best performance, the input capacitors must have current rating higher than ICIN_RMS at the worst operating conditions. Ceramic capacitors are preferred for input capacitors because of their low ESR and high current rating. Depending on the application circuits, other low ESR tantalum capacitor may also be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors should be used for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufactures are based on A certain life time. Further de-rating may be necessary in practical design applications. N When a low ESR ceramic capacitor is used as the output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to: Fo r The peak inductor current is: d I I Lpeak = I O + --------L 2 om m en de High inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through the inductor and switches, which results in less conduction loss. Usually, peak to peak ripple current on inductor is designed to be 20 % to 30 % of output current. ec When selecting the inductor, make sure it is able to handle the peak current without saturation, even at the highest operating temperature. ot R The inductor takes the highest current in a buck circuit. The conduction loss on the inductor needs to be checked for thermal and efficiency requirements. N Surface mount inductors in different shape and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise. They also cost more than unshielded inductors. The choice depends on EMI requirements, price and size. Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. Rev. 2.0 December 2014 1 V O = I L  -------------------------8f C O If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to: V O = I L  ESR CO For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of ceramic, or other low ESR tantalum capacitors are recommended. In a buck converter, output capacitor current is continuous. The RMS current of the output capacitor is decided by the peak to peak inductor ripple current. It can be calculated by: L L I CO  RMS  = ---------12 www.aosmd.com Page 8 of 15 AOZ1038 ns To design the compensation circuit, a target crossover frequency fC for closed loop must be selected. The system crossover frequency is where the control loop has unity gain. The crossover is the also called the converter bandwidth. Generally a higher bandwidth results in faster response to load transient. However, the bandwidth should not be too high because of system stability concern. When designing the compensation loop, converter stability under all line and load condition must be considered. ew Usually, it is recommended to set the bandwidth to be equal or less than 1/10 of the switching frequency. The AOZ1038 operates at a frequency range from 400 kHz to 500 kHz. It is recommended to choose a crossover frequency equal or less than 40 kHz. Fo r The zero is a ESR zero due to the output capacitor and its ESR. It is can be calculated by: N 1 f P1 = ---------------------------------2  C O  R L 1 f Z1 = -----------------------------------------------2  C O  ESR CO om m en de d f C = 40kHz where; CO is the output filter capacitor, RL is load resistor value, and ESRCO is the equivalent series resistance of output capacitor. R ec The compensation design functions to shape the converter control loop transfer to provide the desired gain and phase. Several different types of compensation networks can be used for the AOZ1038. In most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. N ot In the AOZ1038, FB pin and COMP pin are the inverting input and the output of the internal error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is: G EA f P2 = -----------------------------------------2  C C  G VEA where; GEA is the error amplifier transconductance, which is 150 x 10-6 A/V, Rev. 2.0 December 2014 1 f Z2 = ----------------------------------2  C C  R C D With peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in the frequency domain. The pole is dominant can be calculated by: The zero given by the external compensation network, capacitor CC and resistor RC, is located at: ig Loop Compensation The AOZ1038 employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It also greatly simplifies the compensation loop design. GVEA is the error amplifier voltage gain, which is 500 V/V, and CC is compensation capacitor in Figure 1. es Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. The strategy for choosing RC and CC is to set the cross over frequency with RC and then set the compensator zero with CC. Using selected crossover frequency, fC, to calculate RC: VO 2  C C -  ----------------------------R C = f C  ---------V G G FB EA CS where; fC is desired crossover frequency. For best performance, fC is set to be about 1/10 of switching frequency, VFB is 0.8 V, GEA is the error amplifier transconductance, which is 150 x 10-6 A/V, and GCS is the current sense circuit transconductance, which is 8 A/V. The compensation capacitor CC and resistor RC together make a zero. This zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of the selected crossover frequency. CC can is selected by: 1.5 C C = -----------------------------------2  R C  f P1 www.aosmd.com Page 9 of 15 AOZ1038 In the AOZ1038 buck regulator circuit, the major power dissipating components are the AOZ1038 and the output inductor. The total power dissipation of converter circuit can be measured by input power minus output power. The equation above can also be simplified to: CO  RL C C = --------------------RC An easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com. Thermal Management and Layout Consideration P total  loss  = V IN  I IN – V O  I O The power dissipation of inductor can be approximately calculated by output current and DCR of inductor. ig es D ew T junction =  P total  loss  – P inductor  loss     JA N The maximum junction temperature of AOZ1038 is 150ºC, which limits the maximum load current capability. The thermal performance of the AOZ1038 is strongly affected by the PCB layout. Care should be taken during the design process to ensure that the IC will operate under the recommended environmental conditions. N ot R ec om m en de d In the PCB layout, minimizing the area of the two loops reduces the noise of the circuit and improves efficiency. A ground plane is strongly recommended to connect the input capacitor, output capacitor, and PGND pin of the AOZ1038. The actual junction temperature can be calculated with power dissipation in the AOZ1038 and thermal impedance from junction to ambient. Fo r In the AOZ1038 buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pad, to the filter inductor, to the output capacitor and load, and then return to the input capacitor through ground. Current flows in the first loop when the high side switch is on. The second loop starts from the inductor, to the output capacitors and load, to the low side NMOSFET. Current flows in the second loop when the low side NMOSFET is on. ns P inductor  loss  = I O 2  R inductor  1.1 Rev. 2.0 December 2014 www.aosmd.com Page 10 of 15 AOZ1038 Package Dimensions, Exposed Pad SO-8 Gauge plane 0.2500 D0 C L L1 E1 E ns E3 es ig E2 D D1 Note 5 ew D e B A Fo r A2 A1 d Dimensions in millimeters om m 2.20 ec 5.74 2.71 N ot R 2.87 1.27 Min. 1.40 0.00 1.40 0.31 0.17 4.80 3.20 3.10 5.80 — E1 E2 E3 3.80 2.21 L y θ | L1–L1' | L1 0.40 — en 3.70 Symbols A A1 A2 B C D D0 D1 E e de RECOMMENDED LAND PATTERN 0.80 0.635 UNIT: mm θ N 7 (4x) L1' Nom. 1.55 0.05 1.50 0.406 — 4.96 3.40 3.30 6.00 1.27 1.70 0.10 1.60 0.51 0.25 5.00 3.60 3.50 6.20 — 3.90 4.00 2.41 2.61 0.40 REF 0° — Max. 0.95 — 1.27 0.10 3° 8° 0.04 0.12 1.04 REF Dimensions in inches Symbols A A1 A2 B C D D0 D1 E e E1 E2 E3 L y θ | L1–L1' | L1 Min. 0.055 0.000 0.055 0.012 0.007 0.189 0.126 0.122 0.228 — 0.150 0.087 Nom. Max. 0.061 0.002 0.059 0.067 0.004 0.063 0.016 — 0.195 0.134 0.130 0.236 0.050 0.020 0.010 0.197 0.142 0.138 0.244 — 0.153 0.157 0.095 0.103 0.016 REF 0.016 0.037 0.050 — — 0.004 0° — 3° 8° 0.002 0.005 0.041 REF Notes: 1. Package body sizes exclude mold flash and gate burrs. 2. Dimension L is measured in gauge plane. 3. Tolerance 0.10mm unless otherwise specified. 4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 5. Die pad exposure size is according to lead frame design. 6. Followed from JEDEC MS-012 Rev. 2.0 December 2014 www.aosmd.com Page 11 of 15 AOZ1038 Tape and Reel Dimensions, Exposed Pad SO-8 Carrier Tape P1 D1 P2 T E1 E2 ns P0 Feeding Direction UNIT: mm K0 2.10 ±0.10 D0 1.60 ±0.10 D1 1.50 ±0.10 E 12.00 ±0.10 E1 1.75 ±0.10 E2 5.50 ±0.10 P0 8.00 ±0.10 P1 4.00 ±0.10 P2 2.00 ±0.10 D B0 5.20 ±0.10 T 0.25 ±0.10 N ew A0 6.40 ±0.10 es D0 A0 ig B0 K0 Package SO-8 (12mm) E Reel Fo r W1 d G de N M om m R UNIT: mm K en V S H W W1 17.40 ±1.00 H K ø13.00 10.60 +0.50/-0.20 S 2.00 ±0.50 G — R — V — R ec W N Tape Size Reel Size M 12mm ø330 ø330.00 ø97.00 13.00 ±0.10 ±0.30 ±0.50 N ot Leader/Trailer and Orientation Trailer Tape 300mm min. or 75 empty pockets Rev. 2.0 December 2014 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm min. or 125 empty pockets Page 12 of 15 AOZ1038 Package Dimensions, 5x6 DFN, 8L 0.05 b c θ E1 ns E es ig VIEW ‘A’ A D e TOP VIEW ew SIDE VIEW L1 A1 N D D1 Fo r L E3 d E2 en de VIEW 'A' (SCALE 5:1) om m BOTTOM VIEW RECOMMENDED LAND PATTERN 0.6500 ot R ec 0.5000 N 3.3500 1.6750 4.6000 2.7500 1.2700 UNIT: mm Dimensions in millimeters Symbols A Min. 0.85 A1 b c D D1 0.00 0.30 0.15 Min. 0.033 — 0.05 0.40 0.50 0.20 0.25 5.20 BSC 4.35 BSC A1 b c D D1 0.000 0.012 0.006 E E1 E2 5.55 BSC 6.05 BSC 3.15 BSC E E1 E2 0.219 BSC 0.238 BSC 0.124 BSC E3 e L 1.575 BSC 1.27 BSC 0.45 0.55 0.65 E3 e L 0.062 BSC 0.050 BSC 0.018 0.022 0.026 θ 0 0° — — Max. 1.00 Dimensions in inches Symbols A L1 Nom. 0.95 0.15 10° L1 θ 0 0° Nom. 0.037 Max. 0.039 — 0.002 0.016 0.020 0.008 0.010 0.205 BSC 0.171 BSC — — 0.006 10° N t Rev. 2.0 December 2014 www.aosmd.com Page 13 of 15 AOZ1038 Tape and Reel Dimensions, 5x6 DFN, 8L Carrier Tape P1 D1 T P2 Y E1 E2 E C L ig ns B0 es Y D0 P0 A0 UNIT: MM B0 K0 D0 D1 5.45 ±0.10 1.30 ±0.10 1.50 Min. 1.55 ±0.05 E E1 E2 P0 ew A0 6.30 ±0.10 12.00 1.75 ±0.30 ±0.10 5.50 ±0.10 8.00 ±0.10 Feeding Direction P1 P2 T 4.00 ±0.10 2.00 ±0.10 0.30 ±0.05 Fo r N Package DFN 5x6 (12mm) D K0 Reel d W1 S de G N om m V K en M R Tape Size Reel Size ø330 M W N ø330.0 ø97.00 ±0.50 ±0.10 W W1 H K S G R V 13.00 ±0.30 17.40 ±1.00 ø13.0 10.60 2.0 ±0.5 — — — +0.50/-0.20 ot R 12 mm ec UNIT: MM H N Leader/Trailer and Orientation Trailer Tape 300mm min. or 75 empty pockets Rev. 2.0 December 2014 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm min. or 125 empty pockets Page 14 of 15 AOZ1038 Part Marking 5x6 DFN-8 Z1038DI FAYWLT ns Part Number Code ig Assembly Lot Code Fab & Assembly Location es Year & Week Code ew D Exposed Pad SO-8 N Z1038PI FAYWLT Assembly Lot Code de Fab & Assembly Location d Fo r Part Number Code LEGAL DISCLAIMER om m en Year & Week Code R ec Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or completeness of the information provided herein and takes no liabilities for the consequences of use of such information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes to such information at any time without further notice. This document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third party’s intellectual property rights. ot LIFE SUPPORT POLICY N ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 2.0 December 2014 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 15 of 15