AOZ1341
Dual Channel USB Switch
General Description
Features
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise times and fall times to minimize
current surges during switching. The charge pump
requires no external components and allows operation
from supplies as low as 2.7 V.
z Typical 70 mΩ (NFET)
The AOZ1341 is available in an Exposed Pad MSOP-8
or an SO8 8-pin package and is rated over the
-40 °C to +85 °C ambient temperature range.
z Notebook Computers
z 1 A maximum continuous current
z VIN Range: 2.7 V to 5.5 V
z Open Drain Fault Flag
z Fault Flag deglitched (blanking time)
z Discharge switch for shutdown
z Thermal shutdown
z Reverse current blocking
z Packages: Exposed Pad MSOP-8 and SO-8
Applications
z Desktop Computers
Typical Application
VIN
OUT1
IN
R2
10kΩ
R1
10kΩ
AOZ1341
Cx
LOAD
C3
0.1μF
C1
22μF
C4
0.1μF
C2
22μF
OC1
EN1/EN1
OUT2
OC2
LOAD
EN2/EN2
GND
Rev. 1.1 June 2011
www.aosmd.com
Page 1 of 16
AOZ1341
Ordering Information
Maximum
Continuous
Current
Part Number
Typical
Short-circuit
Current Limit
Enable Setting
AOZ1341AI
Active Low
AOZ1341AI-1
Active High
1A
AOZ1341EI
1.5 A
Package
SO-8
Active Low
AOZ1341EI-1
Environmental
Green Product
RoHS Compliant
Exposed Pad
MSOP-8
Active High
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
GND
1
8
OC1
IN
2
7
EN1/EN1
3
EN2/EN2
4
PAD
GND
1
8
OC1
OUT1
IN
2
7
OUT1
6
OUT2
EN1/EN1
3
6
OUT2
5
OC2
EN2/EN2
4
5
OC2
Exposed Pad MSOP-8
SO-8
(Top View)
(Top View)
Pin Description
Pin Name
Pin Number
GND
1
Ground
IN
2
Input voltage
EN1/EN1
3
Enable input, logic high/logic low turns on power switch IN-OUT1
EN2/EN2
4
Enable input, logic high/logic low turns on power switch IN-OUT2
OC2
5
Overcurrent, open-drain output, active low, IN-OUT2
OUT2
6
Power-switch output, IN-OUT2
OUT1
7
Power-switch output, IN-OUT1
OC1
8
Overcurrent, open-drain output, active low, IN-OUT1
Rev. 1.1 June 2011
Pin Function
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Page 2 of 16
AOZ1341
Absolute Maximum Ratings
Recommended Operating Conditions
Exceeding the Absolute Maximum Ratings may damage the
device.
The device is not guaranteed to operate beyond the
Recommended Operating Conditions.
Parameter
Rating
Parameter
Input Voltage (VIN)
6V
Input Voltage (VIN)
Enable Voltage (VEN)
6V
Junction Temperature (TJ)
Storage Temperature (TS)
-55 °C to +150 °C
Maximum Continuous Current
2 kV
ESD Rating
+2.7 V to +5.5 V
-40 °C to +125 °C
Package Thermal Resistance
1A
(1)
Rating
60 °C/W
Exposed Pad MSOP-8 (ΘJA)
SO-8 (ΘJA)
115 °C/W
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model is a 100 pF capacitor discharging
through a 1.5 kΩ resistor.
Electrical Characteristics
TA = 25 °C, VIN = 5.5 V, VEN = 0 V, unless otherwise specified.
Symbol
Conditions(3)
Parameter
Min.
Typ.
Max.
Units
70
135
mΩ
0.6
1.5
ms
0.4
1
POWER SWITCH
RDS(ON)
tr
Switch On-Resistance
VIN = 5.5 V, IO = 1 A
Rise Time, Output
VIN = 5.5 V
CL = 1 μF, RL = 5 Ω
VIN = 2.7 V
tf
Fall time, output
FET Leakage Current
VIN = 5.5 V
0.05
0.5
VIN = 2.7 V
0.05
0.5
Out connect to ground,
2.7 V ≤ VIN ≤ 5.5 V,
V(ENx) = VIN or V(ENx) = 0 V
-40 °C ≤ TJ ≤ 125 °C(2)
ms
μA
1
ENABLE INPUT EN
VIH
High-level Input Voltage
2.7 V ≤ VIN ≤ 5.5 V
VIL
Low-level Input Voltage
2.7 V ≤ VIN ≤ 5.5 V
2.0
V
-0.5
0.8
V
0.5
μA
ms
II
Input Current
ton
Turn-on Time
CL = 100 μF, RL = 5 Ω
3
toff
Turn-off Time
CL = 100 μF, RL = 5 Ω
10
CURRENT LIMIT
IOS
IOC_TRIP
Short-circuit Output
Current (per Channel)
V(IN) = 2.7 V to 5.5 V, OUT connected to GND,
device enable into short-circuit
1.1
1.5
1.9
A
Overcurrent Trip
Threshold (per Channel)
V(IN) = 5 V, current ramp (≤ 100 A/s) on OUT
1.0
1.6
2.0
A
0.5
1
μA
0.5
5
65
81
65
90
SUPPLY CURRENT
Supply Current, Low-level
Output
No load on OUT,
2.7 V ≤ VIN ≤ 5.5 V,
V(ENx) = VIN or V(ENx) = 0 V
Supply current, High-level
Output
No load on OUT,
V(ENx) = 0 V or V(ENx) = VIN
Reverse Leakage Current
V(OUTx) = 5.5 V, IN = ground
Rev. 1.1 June 2011
TJ = 25°C
-40 °C ≤ TJ ≤ 125
°C(2)
TJ = 25 °C
-40 °C ≤ TJ ≤ 125
www.aosmd.com
°C(2)
0.2
μA
μA
Page 3 of 16
AOZ1341
Electrical Characteristics (Continued)
TA = 25 °C, VIN = 5.5 V, VEN = 0 V, unless otherwise specified.
Symbol
Conditions(3)
Parameter
Min.
Typ.
Max.
Units
2.5
V
UNDERVOLTAGE LOCKOUT
Low-level voltage, IN
2.0
Hysteresis, IN
200
mV
OVERCURRENT OC1 AND OC2
Output Low Voltage
VOL(OCx)
IO(OCx) = 5 mA
Off-state Current
VO(OCx) = 5 V or 3.3 V
OC_L Deglitch
OCx assertion or deassertion
4
8
0.4
V
1
μA
15
ms
THERMAL SHUTDOWN
Thermal Shutdown
Threshold
135
°C
Recovery from Thermal
Shutdown
105
°C
Hysteresis
30
°C
Note:
2. Parameters are guaranteed by design only and not production tested.
3. Pulse testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
Rev. 1.1 June 2011
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Page 4 of 16
AOZ1341
Functional Block Diagram
OC1
Deglitch
Thermal
Shutdown
EN1/EN1
Enable 1
Current
Limit
Gate Driver
OUT1
IN
OUT2
Gate Driver
Current
Limit
EN2/EN2
Thermal
Shutdown
Enable 2
OC2
Deglitch
AOZ1341
Rev. 1.1 June 2011
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Page 5 of 16
AOZ1341
Functional Characteristics
Figure 2. Turn-On Delay and Rise Time
with 1μF Load (Active Low)
Figure 1. Turn-Off Delay and Fall Time
with 1μF Load (Active Low)
EN
5V/div
EN
5V/div
VOUT
2V/div
VOUT
2V/div
200μs/div
200μs/div
Figure 4. Turn-On Delay and Rise Time
with 100μF Load (Active Low)
Figure 3. Turn-Off Delay and Fall Time
with 100μF Load (Active Low)
EN
5V/div
EN
5V/div
VOUT
2V/div
VOUT
2V/div
500μs/div
500μs/div
Figure 5. Short-circuit Current, Device Enable
to Short
Figure 6. 0.6Ω Load Connected to Vout
EN
5V/div
IOUT
1A/div
Rev. 1.1 June 2011
OC
2V/div
IOUT
500mA/div
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Page 6 of 16
AOZ1341
Functional Characteristics (Continued)
Figure 8. Short Circuit Current Limit
Figure 7. Inrush Current with Different Load Capacitance
EN
2V/div
EN
2V/div
220μF
470μF
IOUT
500mA/div
IOUT
500mA/div
100μF
1ms/div
20ms/div
Typical Characteristics
Figure 10. Supply Current, Output Disabled
vs. Junction Temperature
80
0.5
70
0.45
Supply Current (μA)
Supply Current (μA)
Figure 9. Supply Current, Output Enabled
vs. Junction Temperature
60
50
40
30
Vin=5.5V
Vin=5V
Vin=3.3V
Vin=2.7V
20
10
0
-50
0
50
100
Junction Temperature (°C)
Vin=5.5V
Vin=5V
Vin=3.3V
Vin=2.7V
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
-50
150
0
50
100
Junction Temperature (°C)
Figure 12. UVLO Threshold vs. Junction Temperature
Figure 11. Rds(on) vs. Ambient Temperature
2.30
160
2.28
140
Rising
Falling
2.26
Threshold (V)
Rdson (mΩ)
120
100
80
60
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
40
20
0
-40
150
2.24
2.22
2.2
2.18
2.16
2.14
2.12
2.10
-20
Rev. 1.1 June 2011
0
20
40
60
Ambient Temperature (°C)
80
www.aosmd.com
-50
0
50
100
Junction Temperature (°C)
150
Page 7 of 16
AOZ1341
Typical Characteristics (Continued)
Figure 14. Turn On Time vs Input Voltage
1.0
1.8
0.9
1.6
0.8
Turn On Time (ms)
OCP Trip Current (A)
Figure 13. OCP Trip Current vs. Input Voltage
2.0
1.4
1.2
1.0
0.8
0.6
CL = 100μF
RL = 5Ω
TA = 25°C
0.7
0.6
0.5
0.4
0.3
0.4
0.2
0.2
0.1
0
0
2
3
4
Vin (V)
5
2
6
3
5
6
Figure 16. Rise Time vs Input Voltage
Figure 15. Turn Off Time vs Input Voltage
0.6
2.0
CL = 100μF
RL = 5Ω
TA = 25°C
0.5
Rise Time (ms)
1.9
Turn Off Time (ms)
4
Input Voltage (V)
1.8
1.7
1.6
0.4
0.3
0.2
CL = 100μF
RL = 5Ω
TA = 25°C
0.1
0
1.5
2
3
4
Input Voltage (V)
5
6
2
3
4
Input Voltage (V)
5
6
Figure 17. Fall Time vs Input Voltage
0.6
Fall Time (ms)
0.5
0.4
0.3
0.2
CL = 100μF
RL = 5Ω
TA = 25°C
0.1
0
2
Rev. 1.1 June 2011
3
4
Input Voltage (V)
www.aosmd.com
5
6
Page 8 of 16
AOZ1341
Detailed Description
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise and fall times to minimize current
surges during switching. The charge pump requires no
external components and allows operation from supplies
as low as 2.7 V.
Power Switch
The power switch is a N-channel MOSFET with a low
on-state resistance capable of delivering 1 A of
continuous current. Configured as a high-side switch,
the MOSFET will go into high impedance when disabled.
Thus, preventing current flow from OUT to IN and IN to
OUT.
Charge Pump
An internal charge pump supplies power to the circuits
and provides the necessary voltage to drive the gate of
the MOSFET beyond the source. The charge pump is
capable of operating down to a low voltage of 2.7 Volts.
Enable
The logic enable disables the power switch, charge
pump, gate driver, logic device, and other circuitry to
reduce the supply current. When the enable receives a
logic high the supply current is reduced to approximately
1 μA. The enable input is compatible with both TTL and
CMOS logic levels.
Over-current
The over-current open drain output is asserted
(active low) when an over-current condition occurs.
The output will remain asserted until the over-current
condition is removed. A 15 ms deglitch circuit prevents
the over-current from false triggering.
Thermal Shut-down Protection
When the output load exceeds the current-limit threshold
the device limits the output current to a safe level by
switching into a constant-current mode, pulling the
overcurrent (OC) logic output low.
During current limit conditions the increasing power
dissipation in the chip causing the die temperature to
rise. When the die temperature reaches a specified level
the thermal shutdown circuitry will shutdown the device.
The thermal shutdown will cycle repeatedly until the short
circuit condition is resolved.
Driver
The driver controls the voltage on the gate to the power
MOSFET switch. This is used to limit the large current
surges when the switch is being turned On and Off.
Proprietary circuitry controls the rise and fall time of the
output voltages.
Rev. 1.1 June 2011
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Page 9 of 16
AOZ1341
Applications Information
Input Capacitor Selection
Power Dissipation Calculation
The input capacitor prevents large voltage transients
from appearing at the input, and provides the
instantaneous current needed each time the switch turns
on and also to limit input voltage drop. The input
capacitor t also prevents high-frequency noise on the
power line from passing through the output of the power
side. The choice of the input capacitor is based on its
ripple current and voltage ratings rather than its capacitor
value. The input capacitor should be located as close to
the VIN pin as possible. A 0.1 μF ceramic cap is
recommended but higher capacitor values will further
reduce the voltage drop at the input.
Calculate the power dissipation for normal load condition
using the following equation:
PD = RON x (IOUT)2
The worst case power dissipation occurs when the load
current hits the current limit due to over-current or short
circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
PD = (VIN – VOUT) x ILIMIT
Layout Guidelines
Output Capacitor Selection
The output capacitor acts in a similar way. A small 0.1 μF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for a large load that it may encounter
during system transients. This bulk capacitor must be
large enough to supply fast transient load in order to
prevent the output voltage from dropping.
Proper PCB layout is important for improving the thermal
and overall performance of the AOZ1341. To optimize the
switch response time to output short-circuit conditions
keep all traces as short as possible to reduce the effect of
unwanted parasitic inductance.
Place the input and output bypass capacitors as close as
possible to the IN and OUT pins. The input and output
PCB traces should be as wide as possible for the given
PCB space.
Use a ground plane to enhance the power dissipation
capability of the device.
Rev. 1.1 June 2011
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Page 10 of 16
AOZ1341
USB Power Distribution Application
D+
DVBUS
Cx
0.1μF
Cx
22μF
GND
D+
DPower Supply
10kΩ
10kΩ
Cx
0.1μF
AOZ1341
0.1μF
VBUS
OUT1
IN
Cx
22μF
GND
OC1
USB
Controller
EN1/EN1
D+
OC2
DVBUS
OUT2
EN2/EN2
GND
Cx
0.1μF
Cx
22μF
GND
D+
DVBUS
Cx
0.1μF
Cx
22μF
GND
Figure 18. Typical Four-Port USB Host/Self-Powered Hub Applications Circuitry
Rev. 1.1 June 2011
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Page 11 of 16
AOZ1341
Package Dimensions, SO-8
D
Gauge Plane
Seating Plane
e
0.25
8
L
E1
E
h x 45
1
C
θ
7 (4x)
A2 A
0.1
b
RECOMMENDED LAND PATTERN
2.20
5.74
2.87
1.27
A1
Dimensions in millimeters
Symbols
A
A1
A2
b
c
D
E
e
E1
h
L
θ
Min.
1.35
0.10
1.25
0.31
0.17
4.80
3.80
Nom.
1.65
—
1.50
—
—
4.90
3.90
1.27 BSC
5.80
6.00
0.25
—
0.40
—
—
0°
Max.
1.75
0.25
1.65
0.51
0.25
5.00
4.00
6.20
0.50
1.27
8°
Dimensions in inches
Symbols
A
A1
A2
b
c
D
E
e
E1
h
L
θ
Min.
0.053
0.004
0.049
0.012
0.007
0.189
0.150
Nom. Max.
0.065 0.069
—
0.010
0.059 0.065
—
0.020
—
0.010
0.193 0.197
0.154 0.157
0.050 BSC
0.228 0.236 0.244
0.010
—
0.020
0.016
—
0.050
—
0°
8°
0.80
0.635
UNIT: mm
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.1 June 2011
www.aosmd.com
Page 12 of 16
AOZ1341
Tape and Reel Dimensions, SO-8
Carrier Tape
P1
D1
P2
T
E1
E2
E
B0
K0
A0
D0
P0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
SO-8
(12mm)
6.40
±0.10
5.20
±0.10
2.10
±0.10
1.60
±0.10
1.50
±0.10
12.00
±0.10
1.75
±0.10
5.50
±0.10
8.00
±0.10
4.00
±0.10
2.00
±0.10
0.25
±0.10
Reel
W1
S
G
N
M
K
V
R
H
W
UNIT: mm
W
N
Tape Size Reel Size
M
12mm
ø330
ø330.00 ø97.00 13.00
±0.10 ±0.30
±0.50
W1
17.40
±1.00
H
K
ø13.00
10.60
+0.50/-0.20
S
2.00
±0.50
G
—
R
—
V
—
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Rev. 1.1 June 2011
Components Tape
Orientation in Pocket
www.aosmd.com
Leader Tape
500mm min. or
125 empty pockets
Page 13 of 16
AOZ1341
Package Dimensions, Exposed Pad MSOP-8
Gauge Plane
D
Seating Plane
L2
L
2
L1
E2
E
E1
D1
c
1
A
A1
A2
b
e
0.10mm
Dimensions in millimeters
RECOMMENDED LAND PATTERN
0.75
1.9
1.9
0.65
4.35
0.35
Dimensions in inches
Symbols
A
Min.
0.81
Nom.
1.02
Max.
1.12
Symbols
A
Min.
0.032
Nom.
0.040
Max.
0.044
A1
A2
0.05
0.76
—
0.86
0.15
0.97
A1
A2
0.002
0.030
—
0.034
0.006
0.038
b
c
D
0.25
0.13
2.90
0.30
0.15
3.00
0.40
0.23
3.10
b
c
D
0.010
0.005
0.116
0.012
0.006
0.118
0.016
0.010
0.120
D1
e
E
E1
E2
L
1.55
—
0.65 TYP.
3.00
4.90
—
0.55
1.8
0.06
3.10
5.10
1.8
0.70
D1
e
E
E1
E2
L
—
0.07
0.026 TYP.
0.116 0.118 0.120
0.185 0.192
0.20
0.05
—
0.07
0.016 0.022 0.028
L1
L2
θ1
0.90
0.95
1.00
0.25 BSC
—
6°
L1
L2
θ1
0.035
θ2
—
θ2
—
2.90
4.70
1.3
0.40
0°
12°
—
0.037 0.039
0.010 BSC
0°
—
6°
12°
—
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating.
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils each.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.1 June 2011
www.aosmd.com
Page 14 of 16
AOZ1341
Tape and Reel Dimensions, Exposed Pad MSO8-P
Carrier Tape
P1
Section B-B'
P2
D1
D0
K1
E1
E2
R0.3
Max
E
B0
A0
4.2
3.4
K1
T
K0
R0.3 Typ.
Feeding Direction
Section B-B'
UNIT: mm
Package
MSOP-8
P0
T
0.30
±0.05
B0
3.30
±0.10
A0
5.20
±0.10
K1
1.20
±0.10
K0
1.60
±0.10
D0
D1
ø1.50
ø1.50
+0.1/-0.0 Min.
E
12.0
±0.3
E1
1.75
±0.10
E2
5.50
±0.05
P0
8.00
±0.10
P1
4.00
±0.05
P2
2.00
±0.05
Reel
W1
S
G
N
M
K
V
R
H
W
UNIT: mm
Tape Size Reel Size
M
N
W
12mm
ø330
ø330.00 ø97.00 13.00
±0.50
±0.10 ±0.30
W1
17.40
±1.00
H
K
ø13.00
10.60
+0.50/-0.20
S
2.00
±0.50
G
—
R
—
V
—
Leader/Trailer and Orientation
Trailer Tape
300mm min.
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
Notes:
1. 10 sprocket hole pich cumulative tolerance 0.2.
2. Camber not to exceed 1mm in 100mm.
3. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket.
4. K0 measured from a plane on the inside bottom of the pocket to the top surface of the carrier.
5. Pocket position relative to sprocket hole measured as tue position of pocket, not pocket hole.
6. All dimensions in mm.
Rev. 1.1 June 2011
www.aosmd.com
Page 15 of 16
AOZ1341
Part Marking
AOZ1341AI
AOZ1341AI-1
(SO-8)
(SO-8)
Z1341AI
FAYWLT
Z1341AI1
FAYWLT
Part Number Code
Assembly Lot Code
Fab Code & Assembly
Location Code
Year & Week Code
AOZ1341EI-1
AOZ1341EI
(Exposed Pad MSOP-8)
(Exposed Pad MSOP-8)
1341E I
Assembly Lot Code
Fab Code & Assembly
Location Code
Year & Week Code
Part Number Code
1341EI
Part Number Code
Part Number Code
1 FA Y W
FAYW
Year & Week Code
Year & Week Code
LT
LT
Assembly Lot Code
Assembly Lot Code
Fab Code & Assembly
Location Code
Fab Code & Assembly
Location Code
LEGAL DISCLAIMER
Applications or uses as critical components in life support devices or systems are not authorized. AOS does
not assume any liability arising out of such applications or uses of its products. AOS reserves the right to
make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability
of the product for their intended application. Customer shall comply with applicable legal requirements,
including all applicable export control rules, regulations and limitations.
AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.1 June 2011
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
www.aosmd.com
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