AT27LV256A-90RU

Features • Fast Read Access Time – 55 ns • Dual Voltage Range Operation – Low-voltage Power Supply Range, 3.0V to 3.6V or Standard 5V ± 10% Supply Range Pin Compatible with JEDEC Standard AT27C256R Low-power CMOS Operation – 20 µA Max (Less than 1 µA Typical) Standby for VCC = 3.6V – 29 mW Max Active at 5 MHz for VCC = 3.6V JEDEC Standard Packages – 32-lead PLCC – 28-lead SOIC – 28-lead TSOP High-reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity Rapid Programming Algorithm – 100 µs/Byte (Typical) CMOS and TTL Compatible Inputs and Outputs – JEDEC Standard for LVTTL Integrated Product Identification Code Industrial Temperature Range Green (Pb/Halide-free) Packaging Option • • • • 256K (32K x 8) Low-voltage OTP EPROM AT27LV256A • • • • • 1. Description The AT27LV256A is a high-performance, low-power, low-voltage 262,144-bit onetime programmable read-only memory (OTP EPROM) organized as 32K by 8 bits. It requires only one supply in the range of 3.0V to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power. Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consumption of a 3.3V supply. At VCC = 3.0V, any byte can be accessed in less than 55 ns. With a typical power dissipation of only 18 mW at 5 MHz and VCC = 3.3V, the AT27LV256A consumes less than one fifth the power of a standard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V. The AT27LV256A is available in industry-standard JEDEC-approved one-time programmable (OTP) plastic PLCC, SOIC and TSOP packages. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27LV256A operating with VCC at 3.0V produces TTL level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. Atmel’s AT27LV256A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. The AT27LV256A programs exactly the same way as a standard 5V AT27C256R and uses the same programming equipment. 0547G–EPROM–12/07 AT27LV256A 2. Pin Configurations Pin Name A0 - A14 O0 - O7 CE OE NC Function Addresses Outputs Chip Enable Output Enable No Connect 2.1 28-lead SOIC Top View VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 2.3 OE A11 A9 A8 A13 A14 VCC VPP A12 A7 A6 A5 A4 A3 28-lead TSOP (Type 1) Top View 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE O7 O6 O5 O4 O3 GND O2 O1 O0 A0 A1 A2 2.2 32-lead PLCC Top View A7 A12 VPP NC VCC A14 A13 Note: 1. PLCC Package Pins 1 and 17 are Don’t Connect. O1 O2 GND NC O3 O4 O5 14 15 16 17 18 19 20 A6 A5 A4 A3 A2 A1 A0 NC O0 5 6 7 8 9 10 11 12 13 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE A10 CE O7 O6 2 0547G–EPROM–12/07 AT27LV256A 3. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 4. Block Diagram 5. Absolute Maximum Ratings* Temperature Under Bias.................................. -40°C to +85°C Storage Temperature ..................................... -65°C to +125°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ......................................-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground .......................................-2.0V to +14.0V(1) Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may overshoot to +7.0V for pulses of less than 20 ns. *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability 3 0547G–EPROM–12/07 6. Operating Modes Mode/Pin Read(2) Output Disable Standby (2) (2) CE VIL VIL VIH VIL X (3) (1) (3) OE VIL VIH X (1) Ai Ai X X (1) (1) VPP VCC VCC VCC VPP VPP VCC VPP VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC Outputs DOUT High Z High Z DIN DOUT DOUT High Z Identification Code Rapid Program(3) PGM Verify VIH VIL VIL VIH VIL Ai Ai Ai X (1) Optional PGM Verify PGM Inhibit (3) VIL VIH VIL Product Identification(3)(5) Notes: 1. X can be VIL or VIH. A9 = VH(4) A0 = VIH or VIL A1 - A14 = VIL 2. Read, output disable, and standby modes require, 3.0V ≤VCC ≤3.6V, or 4.5V ≤VCC ≤5.5V. 3. Refer to Programming Characteristics. Programming modes require VCC = 6.5V. 4. VH = 12.0 ± 0.5V. 5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. 7. DC and AC Operating Conditions for Read Operation AT27LV256A -55 Industrial Operating Temperature (Case) VCC Power Supply -40°C - 85°C 3.0V to 3.6V 5V ± 10% -90 -40°C - 85°C 3.0V to 3.6V 5V ± 10% 4 AT27LV256A 0547G–EPROM–12/07 AT27LV256A 8. DC and Operating Characteristics for Read Operation Symbol Parameter Condition Min Max Units VCC = 3.0V to 3.6V ILI ILO IPP1(2) ISB ICC VIL VIH VOL VOH Input Load Current Output Leakage Current VPP(1) Read/Standby Current VCC(1) Standby Current VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.0 mA IOH = -2.0 mA 2.4 VIN = 0V to VCC VOUT = 0V to VCC VPP = VCC ISB1 (CMOS), CE = VCC ± 0.3V ISB2 (TTL), CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL -0.6 2.0 ±1 ±5 10 20 100 8 0.8 VCC + 0.5 0.4 µA µA µA µA µA mA V V V V VCC = 4.5V to 5.5V ILI ILO IPP1 ISB ICC VIL VIH VOL VOH Notes: (2) Input Load Current Output Leakage Current VPP(1) Read/Standby Current VIN = 0V to VCC VOUT = 0V to VCC VPP = VCC ISB1 (CMOS), CE = VCC ± 0.3V ISB2 (TTL), CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL -0.6 2.0 IOL = 2.1 mA IOH = -400 µA 2.4 ±1 ±5 10 100 1 20 0.8 VCC + 0.5 0.4 µA µA µA µA mA mA V V V V VCC(1) Standby Current VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. 5 0547G–EPROM–12/07 9. AC Characteristics for Read Operation VCC = 3.0V to 3.6V and 4.5V to 5.5V AT27LV256A -55 Symbol tACC (3) -90 Min Min Max Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, Whichever Occurred First Output Hold from Address, CE or OE, Whichever Occurred First Condition CE = OE = VIL OE = VIL CE = VIL Max Units ns ns ns ns ns 55 55 35 30 0 0 90 90 50 40 tCE(2) tOE(2)(3) tDF(4)(5) tOH 10. AC Waveforms for Read Operation(1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 6 AT27LV256A 0547G–EPROM–12/07 AT27LV256A 11. Input Test Waveforms and Measurement Levels tR, tF < 20 ns (10% to 90%) 12. Output Test Load Note: CL = 100 pF including jig capacitance. 13. Pin Capacitance f = 1 MHz, T = 25°C(1) Symbol CIN COUT Note: Typ 4 8 Max 8 12 Units pF pF Conditions VIN = 0V VOUT = 0V 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 7 0547G–EPROM–12/07 14. Programming Waveforms(1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27LV256A a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage transients. 8 AT27LV256A 0547G–EPROM–12/07 AT27LV256A 15. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Current A9 Product Identification Voltage CE = VIL 11.5 IOL = 2.1 mA IOH = -400 µA 2.4 25 25 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max ±10 0.8 VCC + 0.5 0.4 Units µA V V V V mA mA V 16. AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol tAS tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay VPP Setup Time VCC Setup Time CE Program Pulse Width(3) Data Valid from OE(2) VPP Pulse Rise Time During Programming (2) Test Conditions (1) Min 2 Max Units µs µs µs µs µs Input Rise and Fall Times: (10% to 90%) 20 ns Input Pulse Levels: 0.45V to 2.4V Input Timing Reference Level: 0.8V to 2.0V Output Timing Reference Level: 0.8V to 2.0V 2 2 0 2 0 2 2 95 105 150 50 130 ns µs µs µs ns ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. 17. Atmel’s AT27LV256A Integrated Product Identification Code(1) Pins Codes Manufacturer Device Type Note: A0 0 1 O7 0 1 O6 0 0 O5 0 0 O4 1 0 O3 1 1 O2 1 1 O1 1 0 O0 0 0 Hex Data 1E 8C 1. The AT27LV256A has the same Product Identification Code as the AT27C256R. Both are programming compatible. 9 0547G–EPROM–12/07 18. Rapid Programming Algorithm A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. 10 AT27LV256A 0547G–EPROM–12/07 AT27LV256A 19. Ordering Information 19.1 tACC (ns) 55 Standard Package ICC (mA) Active 8 Standby 0.02 Ordering Code AT27LV256A-55JI AT27LV256A-55RI AT27LV256A-55TI AT27LV256A-90JI AT27LV256A-90RI AT27LV256A-90TI Package 32J 28R(1) 28T 32J 28R(1) 28T Operation Range Industrial (-40° C to 85° C) Industrial (-40° C to 85° C) 90 8 0.02 Note: Not recommended for new designs. Use Green package option. 19.2 tACC (ns) 55 Green Package Option (Pb/Halide-free) ICC (mA) Active 8 Standby 0.02 Ordering Code AT27LV256A-55JU AT27LV256A-55RU AT27LV256A-55TU AT27LV256A-90JU AT27LV256A-90RU AT27LV256A-90TU Package 32J 28R(1) 28T 32J 28R(1) 28T Operation Range Industrial (-40° C to 85° C) Industrial (-40° C to 85° C) 90 8 0.02 Note: 1. The 28-pin SOIC package is not recommended for new designs. Package Type 32J 28R 28T 32-lead, Plastic J-leaded Chip Carrier (PLCC) 28-lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC) 28-lead, Thin Small Outline Package (TSOP) 11 0547G–EPROM–12/07 20. Packaging Information 20.1 32J – PLCC 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER 1.14(0.045) X 45˚ 0.318(0.0125) 0.191(0.0075) E1 B E B1 E2 e D1 D A A2 A1 0.51(0.020)MAX 45˚ MAX (3X) COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL D2 MIN 3.175 1.524 0.381 12.319 11.354 9.906 14.859 13.894 12.471 0.660 0.330 NOM – – – – – – – – – – – 1.270 TYP MAX 3.556 2.413 – 12.573 11.506 10.922 15.113 14.046 13.487 0.813 0.533 NOTE A A1 A2 D D1 D2 Note 2 Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. E E1 E2 B B1 e Note 2 10/04/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING NO. 32J REV. B R 12 AT27LV256A 0547G–EPROM–12/07 AT27LV256A 20.2 28R – SOIC B E1 E PIN 1 e D A A1 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN 2.39 0.050 18.00 11.70 8.59 0.356 0.203 0.94 NOM – – – – – – – – 1.27 TYP MAX 2.79 0.356 18.50 12.50 8.79 0.508 0.305 1.27 Note 1 Note 1 NOTE 0º ~ 8º C A A1 L D E E1 B Note: 1. Dimensions D and E1 do not include mold Flash or protrusion. Mold Flash or protrusion shall not exceed 0.25 mm (0.010"). C L e 5/18/2004 2325 Orchard Parkway San Jose, CA 95131 TITLE 28R, 28-lead, 0.330" Body Width, Plastic Gull Wing Small Outline (SOIC) DRAWING NO. 28R REV. C R 13 0547G–EPROM–12/07 20.3 28T – TSOP PIN 1 0º ~ 5º c Pin 1 Identifier Area D1 D L e b L1 E A2 A SEATING PLANE GAGE PLANE A1 SYMBOL A A1 A2 Notes: 1. This package conforms to JEDEC reference MO-183. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. D D1 E L L1 b c e COMMON DIMENSIONS (Unit of Measure = mm) MIN – 0.05 0.90 13.20 11.70 7.90 0.50 NOM – – 1.00 13.40 11.80 8.00 0.60 0.25 BASIC 0.17 0.10 0.22 – 0.55 BASIC 0.27 0.21 MAX 1.20 0.15 1.05 13.60 11.90 8.10 0.70 Note 2 Note 2 NOTE 12/06/02 2325 Orchard Parkway San Jose, CA 95131 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) DRAWING NO. 28T REV. C R 14 AT27LV256A 0547G–EPROM–12/07 Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Product Contact Web Site www.atmel.com Technical Support eprom@atmel.com Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: T he information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. 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