ATR0601_06

Features • • • • • • • • Very Low Power Design (40 mW) Single IF Architecture Excellent Noise Performance 1.5-bit ADC On Chip Small QFN Package (4 mm × 4 mm, 24 pins) Highly integrated, Few External Components Advanced BiCMOS Technology (UHF6s) RoHS Compliant 1. Description The ATR0601 is a single IF GPS front-end IC, designed to meet the requirements of mobile and automotive applications. Excellent RF performance combined with low noise figure enables high quality GPS solutions and it's very low power consumption fits perfectly to portable devices. Featuring a balanced XTO and a fully integrated balanced frequency synthesizer, only few external components are required. The ATR0601 offers a complete autonomous mode, utilizing the on chip AGC in closed loop operation, to set the gain of the IF VGA. Alternatively, in combination with the Antaris™4 baseband processor family, the optimum gain of the IF VGA can be computed and set by software, using the digital SDI interface. Figure 1-1. VCC GPS Front-end IC ATR0601 Block Diagram VDIG NBPI AGCO BPI EGC VCC BP NBP PUXTO PURF PMSS Logic ≥1 SDI A RF NRF A D VCO PLL XTO NXTO XTO X NX D SL SH SC GND TEST MO 4866G–GPS–11/06 2. Pin Configuration Figure 2-1. Pinning QFN24 SC SH SL SDI EGC VCC 24 23 22 21 20 19 VDIG AGCO NXTO NX X XTO 1 2 3 4 5 6 18 17 16 15 14 13 PURF PUXTO NBPI BPI NBP BP Paddle GND 7 8 9 10 11 12 VCC MO TEST NRF RF NC Table 2-1. Pin Paddle 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Note: Pin Description Symbol GND VDIG AGCO NXTO NX X XTO VCC MO TEST NRF RF NC BP NBP BPI NBPI PUXTO PURF VCC EGC SDI SL SH SC Type(1) S S A_I/O A_I A_O A_O A_I S A_O A_I A_I A_I – A_O A_O A_I A_I D_I D_I S D_I D_I D_O D_O D_O Function Common ground Digital supply AGC: gain control voltage output/corner frequency determination XTO interface (optional: TCXO input) XTO interface XTO interface XTO interface (optional: TCXO input) Analog supply Testbuffer output (fIF) Enable testbuffer RF input complementary RF input Not connected IF-Filter interface (mixer output, open collector) IF-Filter interface (mixer output complementary, open collector) IF-Filter interface (IF-input) IF-Filter interface (IF-input complementary) Power-up XTO Power-up RF Analog supply Enable external gain control (high = external; low = internal) Input for external gain control signal (Σ∆ modulation) Data output: “low” Data output: “high” Sample clock 1. Type: A_I Analog input, A_O Analog output, D_I Digital input, D_O Digital output, S Supply 2 ATR0601 4866G–GPS–11/06 ATR0601 3. Functional Description 3.1 General Description The ATR0601 GPS receiver IC has been especially designed for GPS applications in both mobile phone and automotive applications. From this system point of view, it incorporates highest isolation between GPS and cellular bands, as well as very low power consumption. The L1 input signal (fRF) is a Direct Sequence Spread Spectrum (DSSS) signal with a centre frequency of: fRF = 1575.42 MHz. The digital modulation scheme is Bi-Phase-Shift-Keying (BPSK) with a chip rate of 1.023 Mbps. As the input signal power at the antenna is approximately –140 dBm, the desired signal is below the thermal noise floor. 3.2 PMSS Logic The Power Management, Startup and Shutdown Logic ensures reliable operation within the recommended operating and timing conditions. The external power control signals PUrf and PUxto are passed thru Schmitt-trigger inputs, digital and analog supply voltages are analyzed by monitoring circuits. 3.3 XTO The XTO is designed for minimum phase noise and frequency perturbations. The balanced topology gives maximum isolation from external and ground coupled noise. The built-in jump start circuitry ensures reliable start-up behaviour of any specified crystal. For use with an external TCXO, the XTO circuitry can be used as a single-ended or balanced input buffer. The recommended reference frequency is: fXTO = 23.104 MHz. 3.4 VCO/PLL The frequency synthesizer features a balanced VCO and a fully integrated loop filter, thus no external components are required. The VCO combines very good phase noise behaviour and excellent spurious suppression. The relation between the reference frequency (fXTO) and the VCO centre frequency (fVCO) is given by: fVCO = fXTO × 64 = 23.104 MHz × 64 = 1478.656 MHz. 3.5 RF-Mixer/Image-filter Combined with the antenna an external LNA provides a first band-pass filtering of the signal. For the LNA, Atmel’s ATR0610 is recommended, due to it’s low Noise Figure, high linearity an low power consumption. The output of the LNA drives an SAW filter, which provides image rejection for the mixer and the required isolation of all GSM bands. The output of the SAW filter is fed into a highly linear mixer with high conversion gain and excellent noise performance. The IF frequency (fIF) is given by: fIF = fRF – fVCO = 1575.42 MHz – 1478.656 MHz = 96.764 MHz. 3.6 IF-filter The mixer directly drives an external LC band-pass filter via open collector outputs. In order to provide highest selectivity and conversion gain, it is recommended to design the external filter, according to the application proposal, as a 2-pole filter with a quality factor Q > 25. 3 4866G–GPS–11/06 3.7 VGA/AGC The output of the IF-Filter drives an on-chip Variable Gain Amplifier (VGA) which is combined with additional low-pass filtering. The on-chip Automatic Gain Control (AGC) stage sets the gain of the VGA in order to optimally charge the input of the following analog-to-digital converter. The AGC control loop can be selected for on-chip closed loop operation or for external gain control mode. For external gain control mode, the loop needs to be closed by the baseband IC ATR0621. 3.8 A/D Converter The analog-to-digital converter stage has a total resolution of 1.5 bit. It comprises balanced comparators and a sub sampling unit, clocked by the reference frequency (fXTO). The frequency spectrum of the digital output signal (fOUT), present at the data outputs SL and SH, is then given by: fOUT = ⏐ fIF – fXTO × n⏐ . The selected sub sampling factor (n = 4) leads to the designated digital output signal, with a centre frequency given by: fOUT = fIF – fXTO × 4 = 96.764 MHz – 23.104 MHz – 4 = 4.348 MHz. 3.9 Clock and Data Driver CMOS output drivers are providing 1.5 bit data (SH, SL) and the system clock (SC). The rail-to-rail output signal level is determined by the digital supply voltage (VDIG). 4 ATR0601 4866G–GPS–11/06 ATR0601 4. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Analog supply voltage Digital supply voltage Input voltage Operating temperature Storage temperature Symbol VCC VDIG Vin Top Tstg Value –0.3 to +3.7 –0.3 to +3.7 –0.3 to +3.7 –40 to +85 –55 to +125 Unit V V V °C °C 5. Thermal Resistance Parameters Junction ambient Symbol Rth Value 125 Unit K/W 6. Operating Range Parameters Analog supply voltage Digital supply voltage Supply voltage difference (V∆ = VCC – VDIG) Temperature range Input frequency Reference frequency Symbol VCC VDIG V∆ Temp fRF fXTO Value 2.70 to 3.30 1.65 to 2.00 ≥ 0.80 –40 to +85 1575.42 23.104 Unit V V V °C MHz MHz 7. ESD Characteristics Parameters ESD level HBM (Human Body Model) ESD level MM (Machine Machine Model) ESD level CDM (Charged Device Model) Symbol VHBM VMM VCDM Norm ANSI/ESD STM.5.1-2001 EIA/JESD22 A115 A ESD STM.5.3.1-1999 Value 2500 250 1250 Unit V V V 8. Electrical Characteristics No. 1 1.1 1.2 1.3 Parameters Common Analog supply current(1) Digital supply current (1),(2) Test Conditions VPUxto = VPUrf = VPU,on VPUxto = VPUrf = VPU,on VPUxto = VPU,on, VPUrf = VPU,off Pin 7, 19 1 7, 19 Symbol IS IDIG IS_XTO Min. Typ. 14.2 700 2.9 Max. Unit mA µA mA Type* A A A Analog supply current in XTO mode(1) *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Notes: 1. Conditions: VCC = 2.7V; VDIG = 1.65V; Temperature = 27°C 2. Capacitive load (CL = 3.3 pF) at pins 22, 23, 24 3. Capacitive load (CL = 3.3 pF) at pin 24 5 4866G–GPS–11/06 8. Electrical Characteristics (Continued) No. 1.4 1.5 1.6 1.7 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 3.4 3.5 3.6 4 4.1 4.2 5 5.1 5.2 5.3 5.4 5.5 6 6.1 6.2 Notes: Parameters Digital supply current in XTO mode(1),(3) Supply current in power down mode(1) Maximum total gain Noise figure (SSB) Mixer Output frequency Input impedance (balanced) Conversion Gain Noise figure (SSB) VGA/AGC Minimum gain Maximum gain Control-voltage sensitivity AGC cut-off frequency AGC cut-off frequency Gain-control output voltage Reference Oscillator XTO phase noise at 100 Hz Clock and Data Driver Clock driver frequency Clock output level Clock output level Data output level Data output level PMSS Voltage level power-on Voltage level power-off 17, 18 17, 18 VPU,on VPU,off 1.3 0.5 V V A A fXTO = 23.104 MHz Cload,max = 10 pF Cload.max = 10 pF Cload,max = 10 pF Cload,max = 10 pF 24 24 24 22, 23 22, 23 fCLK VCLK,high VCLK,low VData,high VData,low 23.104 0.9 × VDIG 0.1 × VDIG 0.9 × VDIG 0.1 × VDIG MHz V V V V A B B B B With specified crystal 24 24 Pn100 Pn1k –80 –100 dBc/Hz dBc/Hz C C VAGCO = 1.0V VAGCO = 2.2V VAGCO = 2.2V VAGCO = 1.0V Cext = open Cext = 100 pF 2 2 2 GVGA,min GVGA,max NVGA,min NVGA,max f3dB_AGC f3dB_AGC VAGCO 0.9 0 70 6.6 150 250 33 2.3 dB dB dB/V dB/V kHz kHz V B B D D D D B fXTO = 23.104 MHz fRF = 1575.42 MHz Recommended IF-filter 13, 14 10, 11 8 8 fIF Z11 GMIX NFMIX 96.764 10-j80 20 5.8 MHz Ω dB dB A C B C Test Conditions VPUxto = VPU,on, VPUrf = VPU,off VPUxto = VPUrf = VPU,off VAGCO = 2.2V Pin 1 1, 7, 19 Symbol IDIG_XTO IPD Gmax_tot NFtot 90 6.8 Min. Typ. 500 2 Max. Unit µA µA dB dB Type* A A B C XTO phase noise at 1 kHz With specified crystal *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 1. Conditions: VCC = 2.7V; VDIG = 1.65V; Temperature = 27°C 2. Capacitive load (CL = 3.3 pF) at pins 22, 23, 24 3. Capacitive load (CL = 3.3 pF) at pin 24 6 ATR0601 4866G–GPS–11/06 ATR0601 9. Timing Figure 9-1. VCC VDIG PUxto PUrf tmin = 0s tmin = 0s tmin = 0s tmin = 5ms tmin = 0s tmin=0s tmin = 0s Recommended Power-up/down Sequence Figure 9-2. Recommended Sleep-mode Sequence VCC VDIG PUxto PUrf tmin = 0s tmin = 4 µs tmin = 0s Figure 9-3. Recommended XTO Start-up/Shut-down Sequence VCC VDIG PUxto tmin = 1 ms tmin = 4 µs Figure 9-4. Sample Clock Start-up Delay VCC VDIG PUxto SC tmax = 500 µs T = 1/23.104 MHz 7 4866G–GPS–11/06 Figure 9-5. Synchronous Shut-down Behavior of SC with Respect to PUxto VCC VDIG PUxto SC T = 1/23.104 MHz tmin = 0s tmax = 25ns tmax = 0s Figure 9-6. Data Outputs SL and SH are Valid with Rising Edge of Sample Clock SC SL SH SC T = 1/23.104 MHz 8 ATR0601 4866G–GPS–11/06 ATR0601 10. Application Circuit Figure 10-1. Application Example Using a GPS Crystal with ESRtyp = 12Ω (Please see Table 10-1 on page 11) VCC VCC VCC VDIG 68 4.7nF 220nH 220nH 220nH 100nF 100nF BP 13 VCC 19 VCC 7 VDIG 1 220nH 100nF 5pF NBP 14 BPI 15 5pF NBPI 16 100pF AGCO EGC 20 2 PU XTO VCC PU RF PU RF 17 PUxto 18 PUrf PMSS Logic ≥1 SDI 21 10nF 1.3pF 47pF 4.7nH 1.5pF ATR0610 LNA section (opt.) SAW B4060 11 RF 5.6nH 1.3pF 10 NRF VCO PLL A D A D SL 22 Data out "low" SH 23 Data out "high" SC 24 6 XTO 3 NXTO 47pF 27 82pF X1 47pF 5X 4 NX Sample clock XTO 9 TEST GND 8 MO Reference frequency: Application #1 Note: Please consider the recommended IF-filter layout, shown in Figure 10-5 on page 11. Figure 10-2. Application Example Using a GPS Crystal with ESRtyp ≈ 12Ω (Please see Table 10-2 on page 12) 6 XTO 3 NXTO 47pF R1 82pF X1 47pF 5 X 4 NX Reference frequency: Application #2 Note: The external series resistor R1 has to be selected depending on the typical value of the crystal ESR. Please refer to Application Note “ATR0601: Crystal and TXCO selection”. 12 NC 9 4866G–GPS–11/06 Figure 10-3. Equivalent Application Examples Using a GPS TCXO (Please see Table 10-3 on page 12) 22 pF 12 pF TCXO 4.7 pF Do not connect Reference frequency: Application #4a 6 XTO 3 NXTO 5 X 4 NX 6 12 pF TCXO 4.7 pF Do not connect Reference frequency: Application #4b 4 NX 22 pF XTO 3 NXTO 5 X Figure 10-4. Application Example Using an External Reference and Balanced Inputs (Please see Table 10-4 on page 12) 1:1 Vin 6 XTO 3 NXTO 5 Do not connect X 4 NX Reference frequency: Application #5 10 ATR0601 4866G–GPS–11/06 ATR0601 Figure 10-5. Recommended IF-filter: Layout versus Schematic 13 14 15 16 13 Lc Ld B Le Lf 14 15 16 Ca Lc Ld Le Cb Lf A 4.7nF 68 VCC Note: Mutual inductance between the four inductors Lc - Lf plays an important role in the IF-filter characteristics. In any design, the layout arrangement shown in Figure 10-5 on page 11 should be resembled as close as possible. Measures: A = 2.8 mm; B = 1.4 mm; Lc - Lf: Wirewound SMD inductors, 0603 size. (Please see Table 11-1). Table 10-1. Parameter Specification of GPS Crystals Appropriate for the Application Example Shown in Figure 10-1 on page 9 Comment Nominal frequency referenced to 25°C Frequency at 23°C ±2°C Over operating temperature range Operating temperature range –40.0 18.5 Specification 7 12 Min. Typ. Max. Units Frequency Characteristics Fundamental Frequency Calibration tolerance Frequency deviation Temperature range Electrical Load capacitance (CL) Equivalent Series Resistance (ESR) Fundamental 23 Ω 19.5 pF 23.104 7.0 15.0 +85.0 MHz ±ppm ±ppm °C NBPI NBP BPI Ca Cb BP 11 4866G–GPS–11/06 Table 10-2. Parameter Fundamental Note: Specification of GPS Crystals Appropriate for the Application Example Shown in Figure 10-2 on page 9 Comment Specification Min. 7 Typ. Max. 40 Units Ω Equivalent Series Resistance (ESR) All other parameters as specified in Table 10-1. Table 10-3. Parameter Specification of GPS TCXOs Appropriate for the Application Example Shown in Figure 10-3 on page 10 (For Baseband with SuperSense™ Software) Comment Nominal frequency referenced to 25°C Over operating temperature range Including calibration, temperature, soldering and ageing effects Operating temperature range DC coupled clipped sinewave Operating range Tolerable load capacitance 0.8 10 1.5 V pF –40.0 Min. Typ. Max. Units Frequency Characteristics Nominal Frequency 23.104 0.5 8 +85.0 MHz ±ppm ±ppm °C Frequency deviation Temperature range Electrical Output waveform Output voltage (peak-to-peak) Output load capacitance Table 10-4. Parameter Specification of an External Reference Signal for the Application Example Shown in Figure 10-4 on page 10 Comment Min. Typ. 23.104 Sinewave or clipped sinewave Voltage peak-to-peak 0.6 0.9 1.2 V Max. Units MHz Signal Characteristics Nominal Frequency Waveform Amplitude 12 ATR0601 4866G–GPS–11/06 ATR0601 11. Demonstration Board Figure 11-1. Schematic of Demonstration Board R8 VCC C23 L3 L4 C21 L5 L6 C22 P1 J3 2 C3 1 VDD1.8 1 2 3 C10 13 14 15 16 8 2 20 BP C7 J2 1 2 3 NBP BPI NBPI MO AGCO EGC 21 SDI P4 R1 9 TEST C17 5 6 P2 NIN IN FI1 NOUT OUT 1 L2 2 C15 23 11 RF SH 22 SL 10 NRF 24 SC 1 2 1 2 1 2 J5 J6 J4 X 5 C5 J1 XTO 6 NXTO 3 C6 R7 NX 4 NC 12 PURF 18 PUXTO 17 VCC FB1 C1 VDD1.8 1 2 3 X1 123 J8 123 J9 VDD1.8 C4 VCC 19 VCC 7 VDIG 1 FB2 C2 C19 C9 C8 13 4866G–GPS–11/06 Figure 11-2. Illustration of Demonstration Board Table 11-1. Qty 4 5 1 1 1 2 1 2 2 1 1 2 1 4 1 3 4 2 1 1 1 BOM of Demonstration Board Value Device JP2E JP3E 0 68Ω 2n2 1p3 5n6 2% Multilayer 5p0 ±0p1 10µ 4.7n 27 47p 82p 100n 100p RESISTOR-0402 RESISTOR-0402 CAPACITOR-0402 CAPACITOR-0402 INDUCTOR-0402 CAPACITOR-0402 ELKO-B CAPACITOR-0402 RESISTOR-0402 CAPACITOR-0402 CAPACITOR-0402 CAPACITOR-0402 CAPACITOR-0402 Parts J3, J4, J5, J6 J1, J2, J7, J8, J9 R1 R8 C3 C15, C17 L2 C21, C22 C1, C2 C23 R7 C5, C6 C4 C7, C8, C9, C19 C10 P1, P2, P4 L3, L4, L5, L6 FB1, FB2 IC1 FI1 X1 2% 5% 5% 5% 5% 0.1 pF 2% ±0p1 20% 5% 5% 5% Tolerance Manufacturer Molex Molex Vishay® Vishay Vishay Taiyo Yuden® Würth Elektronik Yageo America Vishay Vishay Vishay Vishay Vishay Vishay Vishay Johnson Components™ ® ® Mfr. Order Code 90120-0762 90120-0763 CRCW0402000Z CRCW040268RJ VJ0402Y222JXJA EVK105CH1R3BW 744784056G 0402CG509C9B200 293D106X0016B2 VJ0402Y472JXJA CRCW040227RJ VJ0402A470JXXA. VJ0402A820JXXA VJ0402V104JXJ VJ0402A101JXXA. 142-0711-841 142-0711-841 COAX-SMA 220n 2% 74279266 ATR0601-1 B4060 RSX-5 23.104 MHz INDUCTOR_WIREWOUND-0603 FERRITE_BEAD-0603 ATR0601-1 FILTER-BALANCED XTAL-4PIN-6035 Würth Elektronik 744761222G Würth Elektronik 74279266 Atmel® Epcos ® ATR0601 B4060 XZC736 IEC19RSX-5 23.104 MHz Rakon 14 ATR0601 4866G–GPS–11/06 ATR0601 12. Recommended Footprint Figure 12-1. Recommended Footprint (QFN24 - 4 mm × 4 mm) 15 4866G–GPS–11/06 13. Ordering Information Extended Type Number ATR0601-PFQW Package QFN24, 4 × 4 Remarks Taped and reeled, Pb-free, RoHS compliant 14. Package Information Package: QFN 24 - 4 x 4 Exposed pad 2.6 x 2.6 (acc. JEDEC OUTLINE No. MO-220) Dimensions in mm Not indicated tolerances±0.05 0.9±0.1 0.05-0.05 24 1 0.4 18 19 +0 4 2.6 24 1 technical drawings according to DIN specifications 6 0.25 13 12 7 6 0.5 nom. 0.2 2.5 Drawing-No.: 6.543-5101.02-4 Issue: 2; 29.11.05 Moisture sensitivity level (MSL) = 2 16 ATR0601 4866G–GPS–11/06 ATR0601 15. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4866G-GPS-11/06 History • Figure 10-1 “Application Example Using a GPS Crystal with ESRtyp = 12Ω” on page 9 changed” • Figure 10-3 “Equivalent Application Examples Using a GPS TCXO” on page 10 changed • Table 10-3 “Specification of GPS TCXOs Appropriate for the Application Example” on page 12 changed • Table 10-4 “Specification of an External Reference Signal for the Application Example” on page 12 changed. 4866F-GPS-06/06 17 4866G–GPS–11/06 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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A tmel ®, logo and combinations thereof, Everywhere You Are® a nd others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 4866G–GPS–11/06