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MGA-16116-TR1G

MGA-16116-TR1G

  • 厂商:

    AVAGO(博通)

  • 封装:

    VQFN16

  • 描述:

    IC AMP

  • 数据手册
  • 价格&库存
MGA-16116-TR1G 数据手册
MGA-16116 Dual LNA for Balanced Application 450 – 1450 MHz Data Sheet Description Features Avago Technologies’ MGA-16116 is an ultra low-noise high linearity amplifier pair with built-in active bias and shutdown features for balanced applications in the 900MHz band. Shutdown functionality is achieved using a single DC voltage input pin.High linearity is achieved through the use of Avago Technologies’ proprietary GaAs Enhancement-mode pHEMT process [1]. It is housed in a miniature 4.0 x 4.0 x 0.85mm 16-pinQuad Flat No-lead (QFN). The compact footprint coupled with ultra low noise and high linearity makes MGA-16116 an ideal choice for basestation transmitters and receivers.  Ultra Low Noise Figure For applications > 1450 MHz , it is recommended to use MGA-16216 1440-2350 MHz or MGA-16316 1950-2700 MHz. All 3 products share the same package and pin out configuration.  Variable Bias and Shutdown functionality  High IIP3:+20dBm typ.  GaAs E-pHEMT Technology [1]  Small package size: 4.0 x 4.0 x 0.85 mm3  RoHS and MSL1 compliant. Typical Performances 900 MHz @ 4.8V, 60mA (typ per amplifier)  Gain: 18.6 dB  NF : 0.25dB [2]  IIP3 : 20.1 dBm  P1dB : 21.2 dBm Component Image  Shutdown voltage Vsd > 1.6V 4.0 x 4.0 x 0.85 mm3 16-Lead QFN  Total shutdown current (Vsd1, Vsd2 = 3V) : 1.84mA Applications  Basestation receivers and transmitters in balanced configuration. AVAGO 16116 YYWW XXXX  Ultra low-noise RF amplifiers. Note: Package marking provides orientation and identification “16116 “ = Device Code “YYWW” = Date Code identifies year and work week of manufacturing “XXXX” = Last 4 digit of assembly lot number 13 14 15 16 Pin Configuration 10 4 9 8 3 7 11 6 12 2 5 1 Pin Use Pin Use 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RFIN1 GND GND RFIN2 Bias_out2 Vsd2 Bias_in2 Not used RFOUT2 GND GND RFOUT1 Not used Bias_in1 Vsd1 Vias_out2 Notes: 1. Enhancement mode technology employs positive Vgs, thereby eliminating the need of negative gate voltage associated with conventional depletion mode devices. 2. Measured at RFin pin of packaged part, other losses deembedded. 3. Good RF practice requires all unused pins to be grounded. Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 90 V ESD Human Body Model = 600 V Refer to Avago Application Note A004R: Electrostatic Discharge, Damage and Control. Absolute Maximum Rating [1] TA=25C Symbol Thermal Resistance [3] Parameter Units Absolute Maximum Vdd Drain Voltage, RF output to ground V 5.5 Idd Drain Current mA 100 Vsd Shutdown Voltage V 5.5 Pin CW RF Input Power with Vsd=0V dBm 27 Pin CW RF Input Power with Vsd=3V dBm 27 Pd Power Dissipation mW 550 Tj Junction Temperature C 150 Tstg Storage Temperature C -65 to 150 (Vd=4.8V, Id= 53 mA, Tc=100 C) jc = 58.58 °C/W Notes: 1. Operation of this device is excess of any of these limits may cause permanent damage. 2. Source lead temperature is 25 °C. Derate 17 mW/°C for Tc > 118 °C. 3. Thermal resistance measured using 150 °C Infra-Red Microscopy Technique. Package Dimensions Pin 1 Dot By marking 0.20 Ref. 4.00 ±0.10 2.10 Pin #1 Identification Chamfer 0.30 X 45° 0.55 4.00 ±0.10 AVAGO 16116 YYWW XXXX 0.30 2.10 0.00 –0.05 0.65 Bsc 0.85 ±0.10 TOP VIEW BOTTOM VIEW SIDE VIEW Part Number Ordering Information Part Number No. of Devices Container MGA-16116 - TR1G 1000 7 inch Reel MGA-16116- BLKG 100 Antistatic Bag For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. AV02-3543EN - May 22, 2012
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