AP2302LMTR-E1

Preliminary Datasheet 2A DDR TERMINATION REGULATOR General Description The AP2302L linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 2A current continuously, providing enough current for most DDR applications. Output voltage is designed to track the reference voltage within a ± 20mV tolerance for load regulation while preventing shooting through on the output stage. Onchip thermal limiting provides protection against a combination of high current and ambient temperature which would create an excessive junction temperature. The AP2302L, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. The AP2302L is available in SOIC-8 and TO-252-5L packages. AP2302L Features · · · · · Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements Source and Sink Current up to 2A High Accuracy Output Voltage at Full-load Adjustable VOUT by External Resistors Shutdown for Standby or Suspend Mode Operation with High-impedance Output Applications · · · DDR-SDRAM Termination DDR-II Termination SSTL-2 Termination SOIC-8 TO-252-5L Figure 1. Package Types of AP2302L Jul. 2006 Rev. 1. 2 1 BCD Semiconductor Manufacturing Limited Preliminary Datasheet 2A DDR TERMINATION REGULATOR Pin Configuration AP2302L M Package (SOIC-8) VIN GND REFEN VOUT 1 2 3 4 8 7 6 5 VCNTL VCNTL VCNTL VCNTL D Package (TO-252-5L) 5 4 3 2 1 VOUT REFEN VCNTL (TAB) GND VIN Figure 2. Pin Configuration of AP2302L (Top View) Pin Description Pin Number Pin Name SOIC-8 1 2 3 4 5, 6, 7, 8 TO-252-5L 1 2 4 5 3 VIN GND REFEN VOUT VCNTL Power Input. Ground. Reference Voltage Input and Chip Enable. Output Voltage. Supply Voltage for Internal Circuit (Internally Connected for SOIC-8), (TAB for TO-252-5L). Function Jul. 2006 Rev. 1. 2 2 BCD Semiconductor Manufacturing Limited Preliminary Datasheet 2A DDR TERMINATION REGULATOR Functional Block Diagram VCNTL(TAB) 5,6,7,8 (3) AP2302L VIN 1 (1) CURRENT LIMIT BANDGAP A(B) A for SOIC-8 B for TO-252-5L OUTPUT CONTROL REFEN 3 (4) 4 (5) VOUT START UP THERMAL PROTECT 2 (2) GND Figure 3. Functional Block Diagram of AP2302L Ordering Information AP2302L Circuit Type Package M: SOIC-8 D: TO-252-5L E1: Lead Free Blank: Tin Lead TR: Tape and Reel Blank: Tube Package SOIC-8 Temperature Range 0 to 125oC Part Number AP2302LM-E1 AP2302LMTR-E1 AP2302LD-E1 Marking ID 2302LM-E1 2302LM-E1 AP2302LD-E1 AP2302LD-E1 Packing Type Tube Tape ＆ Reel Tube Tape ＆ Reel TO-252-5L 0 to 125oC AP2302LDTR-E1 BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Jul. 2006 Rev. 1. 2 3 BCD Semiconductor Manufacturing Limited Preliminary Datasheet 2A DDR TERMINATION REGULATOR Absolute Maximum Ratings (Note 1) Parameter Supply Voltage for Internal Circuit Power Dissipation ESD (Human Body Model) Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10sec) Symbol VCNTL PD ESD TJ TSTG TLEAD θJA SOIC-8 TO-252-5L Value 7 Internally Limited 2 150 -65 to 150 260 160 oC/W AP2302L Unit V W KV oC oC oC Package Thermal Resistance (Free Air) 130 Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device reliability. Recommended Operating Conditions Parameter Supply Voltage for Internal Circuit DDR I Power Input DDR II Junction Temperature TJ 0 VIN 1.6 1.8 125 o Symbol VCNTL (Note 2, 3)　 Min Typ 3.3 2.5 Max 6 VCNTL Unit V V C Note 2: Keep VCNTL ≥ VIN in operation power on and power off sequences. Note 3: For safe operation, VCNTL MUST be tied to 3.3V rather than 5V. Jul. 2006 Rev. 1. 2 4 BCD Semiconductor Manufacturing Limited Preliminary Datasheet 2A DDR TERMINATION REGULATOR Electrical Characteristics (TJ=25oC, VIN=2.5V, VCNTL=3.3V, VREFEN=1.25V, COUT=10µF (Ceramic), unless otherwise specified.) Parameter Output Offset Voltage DDR I Load Regulation DDR II Quiescent Current of VCNTL Leakage Current in Shutdown Mode Protection Current Limit Thermal Shutdown Temperature Thermal Shutdown Hysteresis Shutdown Function Shutdown Threshold Trigger Output=High Output=Low Note 4: VOS is the voltage measurement defined as VOUT subtracted from VREFEN. 0.8 0.2 V ILIMIT TSHDN 3.3V ≤VCNTL ≤5V 2.6 150 50 A oC oC AP2302L Symbol VOS Conditions ΙL=0Α (Note 4) IL=0 to 2A IL=0 to -2A IL=0 to 2A IL=0 to -2A Min -20 -20 Typ 0 0 Max 20 20 Unit mV ∆VOUT mV -20 0 3 3 20 5 6 mA IQ ISHDN No Load VREFEN