PI3A3160ZEEX

PI3A3160 3.3V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Features Description • CMOS Technology for Bus and Analog Applications The PI3A3160 is a fast Dual single-pole double-throw (SPDT) CMOS switch. It can be used as an analog switch or as a lowdelay bus switch. Speci¿ed over a wide operating power supply voltage range, +1.5V to +4.2V, the switch has an On-Resistance of 0.4Ÿ at 3.0V. • Low On-Resistance: 0.4Ÿ (+2.7V Supply) • Wide VDD Range: +1.5V to +4.2V • Low Power Consumption : 5—W • Rail-to-Rail switching throughout Signal Range Control inputs, IN, tolerates input drive signals up to 3.3V, independent of supply voltage. • Fast Switching Speed: 20ns max. at 3.3V • High Off Isolation: –27dB at 100 kHz PI3A3160 is a lower voltage and On-Resistance replacement for the PI5A3158. • –41dB (100 kHz) Crosstalk Rejection Reduces Signal Distortion • Extended Industrial Temperature Range: –40°C to 85°C Block Diagram / Pin Con¿guration • Packaging: – Pb-free & Green, 12-pin TDFN (ZE) COM0 1 Applications 12 VDD1 • Cell Phones • PDAs • Portable Instrumentation NC0 2 11 NO0 GND 3 10 IN0 • Battery Powered Communications • Computer Peripherals COM1 4 Pin Description Pin Number 8, 11 3, 6 2, 5 1, 4 9, 12 7, 10 Name NOx GND NCx COMx VDDx INx Description Data Port (Normally Open) Ground Data Port (Normally Closed) Common Output/Data Port Postive Power Supply(2) Logic Control Notes: 1. x = 0 or 1 2. VDD0 ad VDD1 are not internally connected. Each must be powered seperately. NC1 5 8 NO1 GND 6 7 IN1 Function Table Logic Input 0 1 09-0003 9 VDD1 1 Function NCx Connected to COMx NOx Connected to COMx PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Absolute Maximum Ratings Thermal Information Voltages Referenced to GND VDD .................................................................... –0.5V to +4.4V Continuous Power Dissipation SOT23 (derate 7.1mW/ºC above +70ºC) ............................ 0.5W VIN, VCOM, VNC, VNO (1) ............................–0.5V to V+ +0.3V or 30mA, whichever occurs ¿rst Current (any terminal)................................................... ±200mA Peak Current, COM, NO, NC (Pulsed at 1ms, 10% duty cycle) ................................... ±400mA Storage Temperature ........................................ –65ºC to +150ºC Lead Temperature (soldering, 10s) ................................. +300ºC Note 1: Signals on NC, NO, COM, or IN exceeding VDD or GND are clamped by internal diodes. Limit forward diode current to 30mA. Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Electrical Speci¿cations - Single +4.2V Supply (VDD = +4.2V ± 5%, GND = 0V, VIH = 1.6V, VIL = 0.7V) Parameter Symbol Conditions Temp. (°C) Min.(1) Typ. (2) Max. (1) Units Full 0 VDD V Analog Switch Analog Signal Range (3) VANALOG On Resistance RON On-Resistance Match Between Channels(4) ¨RON On-Resistance Flatness(5) RFLAT(ON) VDD = 4.0V, ICOM = 100mA NO or NC Off Leakage Current(6) INO(OFF) or INC(OFF) VDD =4.2V COM On Leakage Current(6) ICOM(ON) 25 VDD = 4.0V, ICOM = 99mA, VIN = 0V to VDD VDD = 4.2V 0.4 0.45 Full 0.6 25 0.08 Full 0.09 25 0.1 Full 0.1 25 -100 100 Full -400 400 25 -200 200 Full -400 400 Ÿ nA Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 8. Between any two switches. See Figure 5. 09-0003 2 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Electrical Speci¿cations - Single +3.3V Supply (VDD = +3.3V ± 10%, GND = 0V, VIH = 1.4V, VIL = 0.5V) Parameter Symbol Conditions Temp. (°C) Min.(1) Typ. (2) Max. (1) Units Full 0 VDD V Analog Switch Analog Signal Range (3) VANALOG On Resistance RON On-Resistance Match Between Channels(4) ¨RON On-Resistance Flatness(5) RFLAT(ON) NO or NC Off Leakage Current(6) COM On Leakage Current(6) 25 VDD = 2.7V, ICOM = 100mA, VNO or VNC = +1.5V 0.4 0.45 Full 0.6 25 0.08 Full 0.09 VDD = 2.7V, ICOM = 100mA, VNO or VNC = 0.8V, 2.0V 25 0.1 Full 0.1 INO(OFF) or INC(OFF) VDD = 3.3V, VCOM = 0V, VNO or VNC = +2.0V 25 -100 100 Full -400 400 25 -200 200 ICOM(ON) VDD = 3.3V, VCOM = +2.0V, VNO or VNC = +2.0V Full -400 400 Ÿ nA Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 8. Between any two switches. See Figure 5. 09-0003 3 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Electrical Speci¿cations - Single +4.2V Supply (VDD = +4.2V ± 5%, GND = 0V, VIH = 1.6V, VIL = 0.7V) Parameters Test Conditions Temp (ºC) Min.(1) Input High Voltage VIH Guaranteed logic High Level Full Input Low Voltage VIL Guaranteed logic Low Level Input Current with Voltage High IINH VIN = 1.4V, all others = 0.5V –1 1 Input Current with Voltage Low IINL VIN = 0.5V, all other = 1.4V –1 1 Description Typ.(2) Max.(1) Units Logic Input 1.6 0.7 V —A Dynamic Turn-On Time Turn-Off Time tON tOFF VDD = 4.2V, VNO or VNC = 2.0V, Figure 1 Break-Before-Make tBBM VNO or VNC = 1.5V, RL = 50Ÿ, CL = 35pF, See Figure 8 Charge Injection(3) Q CL = 1nF, VGEN = 0V, RGEN = 0Ÿ, Figure 2 Off Isolation(7) 25 20 Full 25 25 12 Full 15 25 1 Full 1 25 ns 12 100 OIRR RL = 50Ÿ, f = 100kHz, Figure 3 -27 (8) Cross Talk XTALK RL = 50Ÿ, f = 100kHz, Figure 4 -41 NC or NO Capacitance C(OFF) COM Off Capacitance CCOM(OFF) COM On Capacitance CCOM(ON) pC dB 56 f = 1MHz, Figure 5 pF 56 f = 1MHz, Figure 6 160 Supply Power-Supply Range VDD Positve Supply Current ICC Full VDD = 3.6V, VIN = 0V or VDD 25 1.5 3.6 V 0.3 —A Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 8. Between any two switches. See Figure 5. 09-0003 4 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Electrical Speci¿cations - Single +3.3V Supply (VDD = +3.3V ± 10%, GND = 0V, VIH = 1.4V, VIL = 0.5V) Parameters Test Conditions Temp (ºC) Min.(1) Input High Voltage VIH Guaranteed logic High Level Full Input Low Voltage VIL Guaranteed logic Low Level Input Current with Voltage High IINH VIN = 1.4V, all others = 0.5V –1 1 Input Current with Voltage Low IINL VIN = 0.5V, all other = 1.4V –1 1 Description Typ.(2) Max.(1) Units Logic Input 1.4 0.5 V —A Dynamic Turn-On Time Turn-Off Time tON tOFF VDD = 3.3V, VNO or VNC = 2.0V, Figure 1 Break-Before-Make tBBM VNO or VNC = 1.5V, RL = 50Ÿ, CL = 35pF, See Figure 8 Charge Injection(3) Q CL = 1nF, VGEN = 0V, RGEN = 0Ÿ, Figure 2 Off Isolation(7) 25 20 Full 25 25 12 Full 15 25 1 Full 1 25 ns 12 100 OIRR RL = 50Ÿ, f = 100kHz, Figure 3 -27 (8) Cross Talk XTALK RL = 50Ÿ, f = 100kHz, Figure 4 -41 NC or NO Capacitance C(OFF) COM Off Capacitance CCOM(OFF) COM On Capacitance CCOM(ON) pC dB 56 f = 1MHz, Figure 5 pF 56 f = 1MHz, Figure 6 160 Supply Power-Supply Range VDD Positve Supply Current ICC Full VDD = 3.6V, VIN = 0V or VDD 25 1.5 3.6 V 0.3 —A Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 [ VCOM / (VNO or VNC) ]. See Figure 4. 8. Between any two switches. See Figure 5. 09-0003 5 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Electrical Speci¿cations - Single +2.5V Supply (VDD = +2.5V ± 10%, GND = 0V, VIH = 1.4V, VIL = 0.5V) Description Parameters Test Conditions Temp.(°C) Min.(1) Typ.(2) Max.(1) Units VDD V Analog Switch Analog Signal Range(3) VANALOG On Resistance RON On-Resistance Match Between Channels (4) ¨RON On-Resistance Flatness(5) RFLAT(ON) 0 VDD = 2.5V, ICOM = 80mA, VNO or VNC = 1.8V VDD = 2.5V, ICOM = 80mA, VNO or VNC = 0.8V 1.8V 25 0.5 Full 0.55 25 0.09 Full 0.09 25 0.1 Full 0.1 25 20 Full 30 25 12 Full 15 Ÿ Dynamic Turn-On Time tON VDD = 2.5V, VNO or VNC = 1.8V, Figure 1 Turn-Off Time tOFF Break-Before-Make tBBM VNO or VNC = 1.5V, RL = 50Ÿ, CL = 35pF, See Figure 8 25 Charge Injection(3) Q CL = 1nF, VGEN = 0V, RGEN = 0V, Figure 2 25 Input HIGH Voltage VIH Guaranteed logic high level Full Input LOW Voltage VIL Guaranteed logic Low level Full Input HIGH Current IINH VIN = 1.4V, all others = 0.5V Full –1 1 Input HIGH Current IINL VIN = 0.5V, all others = 1.4V Full –1 1 1 ns 15 60 pC Logic Input 1.4 V 0.5 —A Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 09-0003 6 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Electrical Speci¿cations - Single +1.8V Supply (VDD = +1.8V ± 10%, GND = 0V, VINH = 1.4V, VINL = 0.5V) Description Parameters Test Conditions Temp.(°C) Min.(1) Typ.(2) Max.(1) Units VDD V Analog Switch Analog Signal Range(3) VANALOG On-Resistance RON On-Resistance Match Between Channels (4) ¨RON On-Resistance Flatness(5) RFLAT(ON) 0 VDD = 1.8V, ICOM = 60mA, VNO or VNC = 1.5V VDD = 1.8V, ICOM = 60mA, VNO or VNC = 0.8V, 1.5V 25 0.55 Full 0.7 25 0.03 Full 0.03 25 0.9 Full 1.1 25 40 Ÿ Dynamic Turn-On Time tON Turn-Off Time tOFF Break-Before-Make tBBM VNO or VNC = 1.5V, RL = 50Ÿ, CL = 35pF, See Figure 8 25 Charge Injection(3) Q CL = 1nF, VGEN = 0V, RGEN = 0V, Figure 2 25 Input HIGH Voltage VIH Guaranteed logic high level Full Input LOW Voltage VIL Guaranteed logic Low level Full Input HIGH Current IINH VIN = 1.4V, all others = 0.5V Full –1 1 Input HIGH Current IINL VIN = 0.5V, all others =1.4V Full –1 1 VDD = 1.8V, VNO or VNC = 1.5V, Full Figure 1 25 50 12 Full 15 1 ns 30 40 pC Logic Input 1.4 0.5 V —A Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design. 4. 'RON = RON max. - RON min. 5. Flatness is de¿ned as the difference between the maximum and minimum value of On-Resistance measured. 09-0003 7 PS8711G 10/13/09 PI3A3160 3.0V, SOTiny™ 0.4Ÿ Dual SPDT Analog Switch Test Circuits/Timing Diagrams VDD VDD VCOM NC NO RL 50Ÿ Logic Input VOUT VNO CL 35pF CL 35pF RL 0Ÿ Logic VINH Input VINL Switch Output GND tr