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74AVC16244DGGRE4

74AVC16244DGGRE4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP48_12.5X6.1MM

  • 描述:

    Buffer, Non-Inverting 4 Element 4 Bit per Element Push-Pull Output 48-TSSOP

  • 数据手册
  • 价格&库存
74AVC16244DGGRE4 数据手册
SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 • FEATURES • • • • Member of the Texas Instruments Widebus™ Family DOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Less Than 2-ns Maximum Propagation Delay at 2.5-V and 3.3-V VCC Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) • • • DESCRIPTION/ORDERING INFORMATION A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. 3.2 TA = 25°C Process = Nominal - Output Voltage - V 2.8 2.4 VCC = 3.3 V 2.0 1.6 VCC = 2.5 V 1.2 OH VCC = 1.8 V 0.8 V VOL - Output Voltage - V 2.8 TA = 25°C Process = Nominal 2.4 2.0 1.6 1.2 0.8 VCC = 3.3 V 0.4 0.4 0 17 34 51 68 85 102 119 IOL - Output Current - mA 136 153 170 VCC = 2.5 V VCC = 1.8 V -160 -144 -128 -112 -96 -80 -64 -48 IOH - Output Current - mA -32 -16 0 Figure 1. Output Voltage vs Output Current ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C TOP-SIDE MARKING TSSOP – DGG Tape and reel SN74AVC16244DGGR AVC16244 TVSOP – DGV Tape and reel SN74AVC16244DGVR CVA244 VFBGA – GQL VFBGA – ZQL (Pb-free) (1) ORDERABLE PART NUMBER Tape and reel SN74AVC16244GQLR SN74AVC16244ZQLR CVA244 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, DOC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998–2005, Texas Instruments Incorporated SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) This 16-bit buffer/driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation. The SN74AVC16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. DGG OR DGV PACKAGE (TOP VIEW) 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 2 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J K TERMINAL ASSIGNMENTS (1) 1 (1) 2 3 4 5 6 A 1OE NC NC NC NC 2OE B 1Y2 1Y1 GND GND 1A1 1A2 C 1Y4 1Y3 VCC VCC 1A3 1A4 D 2Y2 2Y1 GND GND 2A1 2A2 E 2Y4 2Y3 2A3 2A4 F 3Y1 3Y2 3A2 3A1 G 3Y3 3Y4 GND GND 3A4 3A3 H 4Y1 4Y2 VCC VCC 4A2 4A1 J 4Y3 4Y4 GND GND 4A4 4A3 K 4OE NC NC NC NC 3OE NC - No internal connection FUNCTION TABLE (EACH 4-BIT BUFFER) INPUTS OE A OUTPUT Y L L L L H H H X Z 3 SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A1 1A2 1A3 1A4 2OE 2A1 2A2 2A3 2A4 1 3OE 47 2 46 3 44 5 43 6 1Y1 3A1 1Y2 3A2 1Y3 3A3 1Y4 3A4 48 4OE 41 8 40 9 38 11 37 12 2Y1 4A1 2Y2 4A2 2Y3 4A3 2Y4 4A4 25 36 13 35 14 33 16 32 17 3Y1 3Y2 3Y3 3Y4 24 30 19 29 20 27 22 26 23 4Y1 4Y2 4Y3 4Y4 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 4.6 UNIT V range (2) VI Input voltage –0.5 4.6 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 4.6 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through each VCC or GND θJA Tstg (1) (2) (3) (4) 4 Package thermal impedance (4) Storage temperature range DGG package 70 DGV package 58 GQL/ZQL package 42 –65 150 °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51. SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com Recommended Operating Conditions VCC Supply voltage SCES141N – JULY 1998 – REVISED MARCH 2005 (1) MIN MAX Operating 1.4 3.6 Data retention only 1.2 VCC = 1.2 V VIH High-level input voltage 0.65 × VCC VCC = 1.65 V to 1.95 V 0.65 × VCC VCC = 3 V to 3.6 V Low-level input voltage 2 GND VCC = 1.4 V to 1.6 V 0.35 × VCC VCC = 1.65 V to 1.95 V 0.35 × VCC VCC = 2.3 V to 2.7 V Input voltage VO Output voltage IOHS Static high-level output current (2) 0.8 0 3.6 Active state 0 VCC 3-state 0 3.6 VCC = 1.4 V to 1.6 V –2 VCC = 1.65 V to 1.95 V –4 VCC = 2.3 V to 2.7 V –8 VCC = 3 V to 3.6 V Static low-level output current (2) IOLS Input transition rise or fall rate TA Operating free-air temperature (1) (2) V V mA –12 VCC = 1.4 V to 1.6 V 2 VCC = 1.65 V to 1.95 V 4 VCC = 2.3 V to 2.7 V 8 VCC = 3 V to 3.6 V ∆t/∆v V 0.7 VCC = 3 V to 3.6 V VI V 1.7 VCC = 1.2 V VIL V VCC VCC = 1.4 V to 1.6 V VCC = 2.3 V to 2.7 V UNIT mA 12 VCC = 1.4 V to 3.6 V –40 5 ns/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Dynamic drive capability is equivalent to standard outputs with IOH and IOL of ±24 mA at 2.5-V VCC. See Figure 1 for VOL vs IOL and VOH vs IOH characteristics. Refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. 5 SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOHS = –100 µA VOH 1.4 V to 3.6 V MAX UNIT VCC – 0.2 IOHS = –2 mA, VIH = 0.91 V 1.4 V IOHS = –4 mA, VIH = 1.07 V 1.65 V 1.2 IOHS = –8 mA, VIH = 1.7 V 2.3 V 1.75 IOHS = –12 mA, VIH = 2 V 3V 2.3 IOLS = 100 µA VOL MIN TYP (1) VCC 1.05 V 1.4 V to 3.6 V 0.2 IOLS = 2 mA, VIL = 0.49 V 1.4 V 0.4 IOLS = 4 mA, VIL = 0.57 V 1.65 V 0.45 IOLS = 8 mA, VIL = 0.7 V 2.3 V 0.55 IOLS = 12 mA, VIL = 0.8 V 3V 0.7 V II VI = VCC or GND 3.6 V ±2.5 µA Ioff VI or VO = 3.6 V 0 ±10 µA IOZ VO = VCC or GND 3.6 V ±10 µA ICC VI = VCC or GND, 3.6 V 40 µA Control inputs IO = 0 VI = VCC or GND Ci Co (1) Data inputs VI = VCC or GND Outputs VO = VCC or GND 2.5 V 3.5 3.3 V 3.5 2.5 V 6 3.3 V 6 2.5 V 6.5 3.3 V 6.5 pF pF Typical values are measured at TA = 25°C. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2) VCC = 1.5 V ± 0.1 V VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V FROM (INPUT) TO (OUTPUT) VCC = 1.2 V TYP MIN MAX MIN MAX MIN MAX MIN MAX tpd A Y 3.1 0.6 3.3 0.7 2.9 0.6 1.9 0.5 1.7 ns ten OE Y 7.6 1.4 8 1.3 6.8 0.9 4 0.7 3.5 ns tdis OE Y 7.2 1.7 7.3 1.6 6.2 1 4.3 1 3.5 ns PARAMETER UNIT Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS Outputs enabled Outputs disabled CL = 0, f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V TYP TYP TYP 23 27 33 0.1 0.1 0.1 UNIT pF SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES141N – JULY 1998 – REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND RL LOAD CIRCUIT VCC CL RL V∆ 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 30 pF 30 pF 30 pF 2 kΩ 2 kΩ 1 kΩ 500 Ω 500 Ω 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCC Timing Input VCC/2 0V tw tsu th VCC VCC/2 Input VCC/2 VCC VCC/2 VCC/2 Data Input 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC VCC/2 Input VCC/2 0V tPHL tPLH VOH VCC/2 Output VCC/2 VOL tPHL VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VCC/2 VCC/2 0V tPZL tPLZ VCC/2 tPZH VOH Output Output Waveform 1 S1 at 2 × VCC (see Note B) tPLH VCC/2 VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VCC/2 VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 7 PACKAGE OPTION ADDENDUM www.ti.com 20-Jan-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74AVC16244DGGR ACTIVE TSSOP DGG 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AVC16244 SN74AVC16244DGVR ACTIVE TVSOP DGV 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CVA244 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
74AVC16244DGGRE4 价格&库存

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