BQ24055DSSR

BQ24050, BQ24052 SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 BQ2405x 1-A, Single-Cell Li-Ion and Li-Pol Battery Charger With Automatic Adaptor and USB Detection 1 Features 3 Description • The BQ2405x series of devices are highly integrated Li-Ion and Li-Pol linear chargers devices targeted at space-limited portable applications. The devices operate from either a USB port or AC adapter. The high-input voltage range with input overvoltage protection supports low-cost unregulated adapters. • • Charging – 1% Charge voltage accuracy – 10% Charge current accuracy – Pin selectable USB 100-mA and 500-mA maximum input current limit – Programmable termination and precharge threshold Protection – 30-V Input Rating; With 6.6-V input overvoltage protection – Input voltage dynamic power management – 125 °C Thermal regulation; 150°C thermal shutdown protection – OUT Short-circuit protection and ISET short detection – Operation over JEITA range through battery NTC - ½ fast-charge-current at cold, 4.06 V at hot – Fixed 10-hour safety timer System – Auto input source detection (D+, D– pins) • No device transceiver required • USB Friendly – Automatic termination and timer disable mode (TTDM) for absent battery pack with thermistor – Status indication – charging/done – Available in small 2-mm × 2-mm package 2 Applications • • • • Headphones, speakers, and audio accessories Wristbands and wearables Smart door locks Low-power handheld devices The BQ2405x has a single power output that charges the battery. A system load can be placed in parallel with the battery as long as the average system load does not keep the battery from charging fully during the 10-hour safety timer. The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is exceeded. The charger power stage and charge current sense functions are fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status display, and charge termination. The precharge current and termination current threshold are programmed through an external resistor. The fast charge current value is also programmable through an external resistor. Device Information(1) PART NUMBER BQ24050 BODY SIZE (NOM) WSON (10) BQ24052 (1) PACKAGE 2.00 mm × 2.00 mm For all available packages, see the orderable addendum at the end of the data sheet. BQ24050/2 Adaptor DC+ 1 IN OUT 10 2 ISET TS 9 3 VSS CHG 8 4 PRETERM ISET2 7 5 D+ 6 System Load 1.5kW GND 1mF 1kW OR D- Battery Pack + 1mF VDD 2kW TTDM USB Port ISET/100/500 mA VBUS GND GND D+ D+ D- D- Host Disconnect after Detection Simplified Circuit An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................4 6 Specifications.................................................................. 5 6.1 Absolute Maximum Ratings(1) .................................... 5 6.2 ESD Ratings............................................................... 5 6.3 Recommended Operating Conditions(1) .................... 5 6.4 Thermal Information....................................................6 6.5 Electrical Characteristics.............................................6 6.6 Timing Requirements................................................ 10 6.7 Switching Characteristics..........................................10 6.8 Typical Characteristics.............................................. 11 7 Detailed Description......................................................15 7.1 Overview................................................................... 15 7.2 Functional Block Diagram......................................... 16 7.3 Feature Description...................................................17 7.4 Device Functional Modes..........................................25 7.5 Programming............................................................ 25 8 Application and Implementation.................................. 26 8.1 Application Information............................................. 26 8.2 Typical Applications.................................................. 26 9 Power Supply Recommendations................................28 10 Layout...........................................................................29 10.1 Layout Guidelines................................................... 29 10.2 Layout Example...................................................... 29 10.3 Thermal Considerations..........................................30 11 Device and Documentation Support..........................31 11.1 Device Support........................................................31 11.2 Documentation Support.......................................... 31 11.3 Receiving Notification of Documentation Updates.. 31 11.4 Support Resources................................................. 31 11.5 Trademarks............................................................. 31 11.6 Electrostatic Discharge Caution.............................. 31 11.7 Glossary.................................................................. 31 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (December 2014) to Revision D (May 2021) Page • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 • Deleted BQ24055 from data sheet .................................................................................................................... 1 • Changed the Applications list ............................................................................................................................ 1 • Deleted PG pin information from the Specifications section...............................................................................5 • Moved Tstg From: ESD Ratings To: Absolute Maximum Ratings .......................................................................5 • Changed the Handling Ratings table To: ESD Ratings table .............................................................................5 • Changed IBD-Sink minimum from 7 mA to 6 mA...................................................................................................6 • Changed IIH Source current required for HI from 8 μA to 9.6 μA........................................................................6 • Deleted graphs "OVP 8-V Adapter – Hot Plug" and "OVP from Normal Operation" from the Power Up, Down, OVP, Disable and Enable Waveforms section ................................................................................................. 11 • Deleted graph "Entering and Exiting Sleep Mode" from the Battery Removal With Fixed TS = 0.5 V section .... 13 • Changed text From: "2-mm × 2-mm or 2-mm × 3-mm single-cell Li-Ion..." To: "2-mm × 2-mm single-cell LiIon..." in the first paragraph of the Overview section ....................................................................................... 15 • Deleted the PG pin information from the Feature Description section..............................................................17 • Deleted text "the PG pin goes low." from the Overvoltage Protection (OVP) – Continuously Monitored section ..........................................................................................................................................................................19 • Deleted the PG pin information from the Device Functional Modes section.....................................................25 • Deleted the PG pin information from the Application and Implementation section...........................................26 • Removed the Vpg curve from Figure 8-3 and Figure 8-4 ................................................................................ 27 Changes from Revision B (June 2012) to Revision C (December 2014) Page • Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1 Changes from Revision A (September 2009) to Revision B (June 2012) Page • Changed all occurrences of Li-Ion To: Li-Ion and Li-Pol..................................................................................... 1 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Changes from Revision * (August 2009) to Revision A (September 2009) Page • Changed the status of the devices From: Product Preview To: Production Data............................................... 1 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 3 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 5 Pin Configuration and Functions 1 IN OUT 10 2 ISET TS 9 3 VSS CHG 8 4 PRETERM 5 D+ ISET 2 7 D- 6 Figure 5-1. DSQ Package 10-Pin WSON With Exposed Thermal Pad BQ24050/BQ24052 Top View Table 5-1. Pin Functions PIN NAME NO. I/O DESCRIPTION CHG 8 O Low (FET on) indicates charging and Open Drain (FET off) indicates no Charging or Charge complete. D+ 5 I USB port D+ input connection D– 6 I USB port D– input connection IN 1 I Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass capacitors 1 μF to 10 μF, connect from IN to VSS. ISET 2 I Programs the Fast-charge current setting. External resistor from ISET to VSS defines fast charge current value. Range is 52.3k (10 mA) to 540 Ω (1 A). ISET2 7 I Programming the Input/Output Current Limit for the USB or Adaptor source: High = 500 mA max, Low = ISET, FLOAT = 100 mA max. D+D– Detection initially sets the charge threshold and requires ISET2 to change states to take control. OUT 10 O Battery Connection. System Load may be connected. Average load should not be excessive, allowing battery to charge within the 10-hour safety timer window. Expected range of bypass capacitors 1 μF to 10 μF. PRE-TERM 4 I Programs the Current Termination Threshold (5 to 50% of Iout which is set by ISET) and Sets the Precharge Current to twice the Termination Current Level. Expected range of programming resistor is 1k to 10 kΩ (2k: IOUT/10 for term; IOUT/5 for precharge) TS VSS Thermal Pad (1) 4 Temperature sense pin connected to ‘50 — 10k at 25°C NTC thermistor, ’52 — 100k NTC at 25°C, in the battery pack. Floating TS Pin or pulling High puts part in TTDM and disable TS monitoring, Timers and Termination. Pulling pin Low disables the IC (CE function). If NTC sensing is not needed, connect this pin to VSS through an external ‘50 — 10-kΩ /’52—100-kΩ resistor. A ‘50 — 250-kΩ/’52 880-kΩ from TS to ground will prevent IC entering TTDM when battery with thermistor is removed. 9 (1) I 3 – Ground terminal – There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times. Pad 2x2mm2 Spins have different pin definitions Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6 Specifications 6.1 Absolute Maximum Ratings(1) over operating free-air temperature range (unless otherwise noted) Input Voltage MIN MAX UNIT IN (with respect to VSS) –0.3 30 V OUT (with respect to VSS) –0.3 7 V PRE-TERM, ISET, ISET2, TS, CHG, D+, D–, (with respect to VSS) –0.3 7 V A Input Current IN 1.25 Output Current (Continuous) OUT 1.25 A Output Sink Current CHG 15 mA Junction temperature, TJ Tstg (1) Storage temperature range –40 150 °C –65 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. 6.2 ESD Ratings VALUE Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all V(ESD) (1) (2) Electrostatic discharge pins(1) Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) UNIT ±3000 V ±1500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions(1) MIN IN voltage range VIN IN operating voltage range, Restricted by VDPM and VOVP NOM UNIT 3.5 28 V 4.45 6.45 V IIN Input current, IN pin 1.0 A IOUT Current, OUT pin 1.0 A TJ Junction temperature 0 125 °C RPRE-TERM Programs precharge and termination current thresholds 1 10 kΩ RISET Fast-charge current programming resistor 0.540 52.3 kΩ 1.66 258 kΩ 24 885 kΩ RTS (1) 10k NTC thermistor range without entering TTDM, BQ24050 100k NTC thermistor range without entering TTDM, BQ24052 Operation with VIN less than 4.5 V or in drop-out may result in reduced performance. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 5 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.4 Thermal Information BQ24050 BQ24052 THERMAL METRIC(1) UNIT DSQ (WSON) 10 PINS RθJA Junction-to-ambient thermal resistance 63.5 RθJC(top) Junction-to-case (top) thermal resistance 79.5 RθJB Junction-to-board thermal resistance 33.9 ψJT Junction-to-top characterization parameter 7.8 ψJB Junction-to-board characterization parameter 34.3 RθJC(bot) Junction-to-case (bottom) thermal resistance 7.5 (1) °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Electrical Characteristics Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT UVLO Undervoltage lock-out Exit VIN: 0V → 4V Update based on sim/char 3.15 3.3 3.45 V VHYS_UVLO Hysteresis on VUVLO_RISE falling VIN: 4V→0V, VUVLO_FALL = VUVLO_RISE –VHYS-UVLO 175 230 280 mV VIN-DT Input power good detection threshold is VOUT + VIN-DT (Input power good if VIN > VOUT + VIN-DT); VOUT = 3.6V, VIN: 3.5V → 4V 30 80 145 mV 6.5 6.65 VHYS-INDT Hysteresis on VIN-DT falling VOUT = 3.6V, VIN: 4V → 3.5V VOVP Input overvoltage protection threshold VIN: 5V → 7V (50/52) VHYS-OVP Hysteresis on OVP VIN-DPM IIN-USB-CL USB/Adaptor low input voltage protection. Restricts lout at VIN-DPM 31 VIN: 11V → 5V mV 6.8 95 V mV Feature active in USB mode; Limit Input Source Current to 50mA; VOUT = 3.5V; RISET = 825Ω 4.34 4.4 4.46 Feature active in Adaptor mode; Limit Input Source Current to 50mA; VOUT = 3 .5V; RISET = 825Ω 4.24 4.3 4.36 V USB input I-Limit 100 mA ISET2 = Float; RISET = 825Ω 85 92 100 USB input I-Limit 500 mA ISET2 = High; RISET = 825Ω 430 462 500 mA ISET SHORT CIRCUIT TEST RISET_SHORT Highest Resistor value considered a fault (short). Monitored for Iout>90mA Riset: 600Ω → 250Ω, Iout latches off. Cycle power to Reset. USB100 mode. 280 500 Ω IOUT_CL Maximum OUT current limit Regulation (Clamp) VIN = 5V, VOUT = 3.6V, VISET2 = Low, Riset: 600Ω → 250Ω, IOUT latches off after tDGL-SHORT 1.05 1.4 A 0.75 0.85 V BATTERY SHORT PROTECTION VOUT(SC) OUT pin short-circuit detection threshold/ precharge threshold VOUT: 3V → 0.5V, no deglitch VOUT(SC-HYS) OUT pin Short hysteresis Recovery ≥ VOUT(SC) + VOUT(SC-HYS); Rising, no Deglitch IOUT(SC) Source current to OUT pin during short-circuit detection 0.8 77 10 15 mV 20 mA QUIESCENT CURRENT IOUT(PDWN) Battery current into OUT pin VIN = 0V 1 IOUT(DONE) OUT pin current, charging terminated VIN = 6V, VOUT > VOUT(REG) 6 IIN(STDBY) Standby current into IN pin TS = LO, VIN ≤ 6V Active supply current, IN pin TS = open, VIN = 6V, TTDM – no load on OUT pin, VOUT > VOUT(REG), IC enabled ICC μA 125 μA 0.8 1 mA BATTERY CHARGER FAST-CHARGE 6 VOUT(REG) Battery regulation voltage VIN = 5.5V, IOUT = 25mA, VTS-45°C ≤ VTS ≤ VTS-0°C 4.16 4.20 4.23 V VO_HT(REG) Battery hot regulation Voltage VIN = 5.5V, IOUT = 25mA, VTS-60°C ≤ VTS ≤ VTS-45°C 4.02 4.06 4.1 V Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.5 Electrical Characteristics (continued) Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS IOUT(RANGE) Programmed Output “fast charge” current range VOUT(REG) > VOUT > VLOWV, VIN = 5V, ISET2=Lo, RISET = 675 to 10.8kΩ VDO(IN-OUT) Drop-Out, VIN – VOUT Adjust VIN down until IOUT = 0.5A, VOUT = 4.15V, RISET = 675 , ISET2 = Lo (Adaptor Mode); Tj ≤ 100°C IOUT Output “fast charge” formula VOUT(REG) > VOUT > VLOWV, VIN = 5V, ISET2 = Lo KISET Fast charge current factor MIN TYP MAX UNIT 800 mA 500 mV 10 325 KISET/RISET RISET = KISET /IOUT 50 < IOUT < 1 A 510 RISET = KISET /IOUT 25 < IOUT < 50 mA RISET = KISET /IOUT 10 < IOUT < 25 mA A 540 570 480 527 600 350 520 680 2.4 2.5 2.6 AΩ PRECHARGE – SET BY PRETERM PIN VLOWV Precharge to fast-charge transition threshold tDGL1(LOWV) Deglitch time on precharge to fastcharge transition IPRE-TERM Refer to the Termination Section %PRECHG Precharge Current Level, Default Setting VOUT < VLOWV; RPRE-TERM = High Z (≥13kΩ); RISET = 1k Precharge current formula RPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%) KPRE-CHG 70 % Precharge Factor 18 V μs 20 22 %IOUT-CC RPRE-TERM/KPRE-CHG VOUT < VLOWV, VIN = 5V, RPRE-TERM = 2k to 10kΩ; RISET = 1080Ω , RPRE-TERM = KPRE-CHG × %IFASTCHG, where %IFAST-CHG is 20 to 100% 90 100 110 Ω/% VOUT < VLOWV, VIN = 5V, RPRE-TERM = 1k to 2kΩ; RISET = 1080Ω, RPRE-TERM = KPRE-CHG × %IFASTCHG, where %IFAST-CHG is 10% to 20% 84 100 117 Ω/% TERMINATION – SET BY PRE-TERM PIN %TERM KTERM Termination Current Threshold, Default Setting VOUT > VRCH; RPRE-TERM = High Z (≥13kΩ); RISET = 1k Termination Current Threshold Formula RPRE-TERM = KTERM (Ω/%) × %TERM (%) % Term Factor 9 10 11 %IOUT-CC RPRE-TERM/ KTERM VOUT > VRCH, VIN = 5V, RPRE-TERM = 2k to 10kΩ ; RISET = 750Ω; KTERM × %IFAST-CHG, where %IFAST-CHG is 10 to 50% 182 VOUT > VRCH, VIN = 5V, RPRE-TERM = 1k to 2kΩ ; RISET = 750Ω; KTERM × %IFAST-CHG, where %IFAST-CHG is 5 to 10% 174 199 224 71 75 81 μA IPRE-TERM Current for programming the term. and precharge with resistor. ITerm-Start is the RPRE-TERM = 2k, VOUT = 4.15V initial PRE-TERM curent. %TERM Termination current formula ITerm-Start Start, 200 216 Ω/% RTERM/ KTERM Elevated PRE-TERM current for, tTermduring start of charge to prevent recharge of full battery, 80 85 92 μA VO(REG)– 0.120 VO(REG) – 0.095 VO(REG)– 0.070 V VO_HT(REG) VO_HT(REG) VO_HT(REG) –0.130 –0.105 –0.080 V RECHARGE OR REFRESH VRCH Recharge detection threshold – Normal Temp VIN = 5V, VTS = 0.5V, VOUT: 4.25V → VRCH Recharge detection threshold – Hot Temp VIN = 5V, VTS = 0.2V, VOUT: 4.15V → VRCH BATTERY DETECT ROUTINE(1) VREG-BD VOUT Reduced regulation during battery detect IBD-SINK Sink current during VREG-BD VIN = 5V, VTS = 0.5V, Battery Absent VO(REG)– 0.450 VO(REG)– 0.350 VO(REG)– 0.100 VO(REG)– 0.050 V VREG-BD +0.100 VREG-BD +0.150 V 6 VBD-HI High battery detection threshold VIN = 5V, VTS = 0.5V, Battery Absent VO(REG)– 0.150 VBD-LO Low battery detection threshold VIN = 5V, VTS = 0.5V, Battery Absent VREG-BD +0.050 BATTERY-PACK NTC VO(REG– 0.400 10 V mA MONITOR(2) Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 7 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.5 Electrical Characteristics (continued) Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) MIN TYP MAX INTC-10k NTC bias current; 10k NTC thermistor, VTS = 0.3V BQ24050 PARAMETER TEST CONDITIONS 48 50 52 μA INTC-100k NTC bias current; 100k NTC thermistor, BQ24052 VTS = 0.3V 4.8 5 5.2 μA INTC-DIS-10k BQ24050 bias current when Charging is disabled. VTS = 0V 27 30 34 μA INTC-DIS-100k BQ24052 bias current when Charging is disabled. VTS = 0V 4.4 5 5.8 μA INTC-FLDBK-10k INTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM, BQ24050 VTS: Set to 1.525V 4 5 6.5 μA INTC-FLDBK-100k INTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM, BQ24052 VTS: Set to 1.525V 1.1 1.5 1.9 μA VTTDM(TS) Termination and timer disable mode Threshold – Enter VTS: 0.5V → 1.7V; Timer Held in Reset 1550 1600 1650 mV VHYS-TTDM(TS) Hysteresis exiting TTDM VTS: 1.7V → 0.5V; Timer Enabled VCLAMP(TS) TS maximum voltage clamp VTS= Open (Float) 1800 1950 2000 mV VTS_I-FLDBK TS voltage where INTC is reduce to keep thermistor from entering TTDM INTC adjustment (90 to 10%; 45 to 6.6uA) takes place near this spec threshold. VTS: 1.425V → 1.525V CTS Optional Capacitance – ESD VTS-0°C BQ2405x Low temperature CHG Pending Low Temp Charging to Pending; VTS: 1V → 1.5V VHYS-0°C Hysteresis at 0°C Charge pending to low temp charging; VTS: 1.5V → 1V VTS-10°C Low temperature, half charge Normal charging to low temp charging; VTS: 0.5V → 1V VHYS-10°C Hysteresis at 10°C Low temp charging to normal CHG; VTS: 1V → 0.5V VTS-45°C High temperature at 4.1V Normal charging to high temp CHG; VTS: 0.5V → 0.2V VHYS-45°C Hysteresis at 45°C High temp charging to normal CHG; VTS: 0.2V → 0.5V VTS-60°C High temperature Disable High temp charge to pending; VTS: 0.2V → 0.1V VHYS-60°C Hysteresis at 60°C Charge pending to high temp CHG; VTS: 0.1V → 0.2V VTS-EN-10k Charge Enable Threshold, (10k NTC) VTS: 0V → 0.175V; VTS-DIS_HYS-10k HYS below VTS-EN-10k to Disable, (10k VTS: 0.125V → 0V; NTC) VTS-EN-100k Charge Enable Threshold, (100k NTC) VTS: 0V → 0.175V VTS-DIS_HYS-100k HYS below VTS-EN-100k to Disable, (100k NTC) 100 1205 mV 1475 mV 0.22 μF 1230 1255 86 765 790 278 815 178 293 88 186 VTS: 0.125V → 0V; 150 mV mV 96 12 140 mV mV 11.5 80 mV mV 10.7 170 mV mV 35 263 UNIT mV mV 160 mV 50 mV °C THERMAL REGULATION TJ(REG) Temperature regulation limit 125 TJ(OFF) Thermal shutdown temperature 155 °C TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C LOGIC LEVELS ON ISET2 VIL Logic LOW input voltage Sink more than 8μA VIH Logic HIGH input voltage Source more than 8μA 0.4 1.4 V V IIL Sink current required for LO 2 9 μA IIH Source current required for HI 1.1 9.5 μA VFLT ISET2 Float Voltage 650 1200 mV 900 D+/D– DETECTION – BQ2405x 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.5 Electrical Characteristics (continued) Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.475 0.6 0.7 V 1.5 mA 150 μA VD+ = 5V 1 μA VD– = 5V 1 μA VD+ Bias at D+, during detection routine Can source at least 200μA ID+ Current Limit at D+ pin, during detection routine VD+ = 0V ID– Current Sink at D– pin, during detection routine VD– = 0.5V ID+_LEAK D+ leakage when not in detection mode ID–_LEAK D– leakage when not in detection mode VDPDM_0.4V D– Comparator Threshold Rising VDPDM_HYS_0.4V D– Comparator Hysteresis VDPDM_0.8V D+/D– Comparator Threshold Rising VDPDM_HYS_0.8V D+/D– Comparator Hysteresis 50 100 0.35 0.45 42 0.75 UNIT V mV 0.875 42 V mV LOGIC LEVELS ON CHG VOL Output LOW voltage ISINK = 5mA 0.4 V Ilkg Leakage current into IC V CHG = 5V 1 μA (1) (2) In Hot Mode VO(REG) becomes VO_HT(REG) TS pin: BQ24050: 10k NTC; BQ24052: 100k NTC; see Section 7.3.11 for thermistor information. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 9 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.6 Timing Requirements MIN NOM MAX UNIT PRECHARGE – SET BY PRETERM PIN tDGL2(LOWV) Deglitch time on fast-charge to precharge transition 32 ms 29 ms 1.25 min 57 ms 8 μs TERMINATION – SET BY PRE-TERM PIN tDGL(TERM) Deglitch time, termination detected tTerm-Start Elevated termination threshold initially active for tTerm-Start BATTERY-PACK NTC MONITOR(2) tDGL(TTDM) Deglitch exit TTDM between states Deglitch enter TTDM between states 6.7 Switching Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT tDGL(OVP-SET) Input overvoltage blanking time VIN: 5V → 12V tDGL(OVP-REC) Deglitch time exiting OVP Time measured from VIN: 12V → 5V 113 μs 30 μs 1 ms ISET SHORT CIRCUIT TEST tDGL_SHORT Deglitch time transition from ISET short Clear fault by cycling IN or TS to Iout disable RECHARGE OR REFRESH tDGL1(RCH) Deglitch time, recharge threshold detected VIN = 5V, VTS = 0.5V, VOUT: 4.25V → 3.5V in 1μs; tDGL1(RCH) is time to ISET ramp 29 ms tDGL2(RCH) Deglitch time, recharge threshold detected in OUT-Detect Mode VIN = 5V, VTS = 0.5V, VOUT = 3.5V inserted; tDGL2(RCH) is time to ISET ramp 3.6 ms VIN = 5V, VTS = 0.5V, Battery Absent 25 ms BATTERY DETECT ROUTINE(1) tDGL(HI/LOW REG) Regulation time at VREG or VREG-BD BATTERY CHARGING TIMERS AND FAULT TIMERS tPRECHG Precharge safety timer value Restarts when entering precharge; Always enabled when in precharge. tMAXCH Charge safety timer value Clears fault or resets at UVLO, TS (CE) disable, OUT Short, exiting LOWV and Refresh 1700 1940 2250 s 34000 38800 45000 s BATTERY-PACK NTC MONITOR(2) tDGL(TS_10C) Deglitch for TS thresholds: 10°C tDGL(TS) Deglitch for TS thresholds: 0/45/60C. Normal to Cold Operation: VTS: 0.6V → 1V 40 ms Cold to Normal Operation: VTS: 1.0V → 0.6V 12 ms Battery charging 30 ms t = 0 at D– pulled-up > 0.5V or D+ pulled up externally, >0.8V 65 ms D+/D– DETECTION – BQ2405x tDPDM 10 DetectionTime from start of D+/D– detection to latched output Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.8 Typical Characteristics SETUP: BQ24050, BQ24052 typical applications schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise indicated) RISET = 1k; IOUT_FAST_CHG = 540 mA; RPAC_TERM = 2k; IOUT_PRE_CHG = 108 mA; IOUT_TERM = 54 mA 6.8.1 Power Up, Down, OVP, Disable and Enable Waveforms Vin Vin 2V/div D+ 2V/div D+ 1V/div Vd- 1V/div Vd- 1V/div 1V/div Vchg 2V/div 5V/div Viset 2V/div Vchg Viset 2V/div t - time - 100ms/div t - time - 10ms/div . Detected D– line pulled to 0.6 V and the detection routine is started Figure 6-1. D+ D– Detection for Adaptor Hot Plug Vin . No signal detected on D+ or D–. After 500 ms, the detection routine is forced to run Figure 6-2. D+ D– Detection for Unknown Source Hot Plug Vin 2V/div 2V/div D+ 1V/div Vd- 1V/div End of Detection Routine D+ 1V/div Detection Routine Started Vd1V/div 5V/div Vchg 5V/div Viset 2V/div Viset USB Communication Between Host and Device Receiver Vchg 2V/div t - time - 100ms/div (Device transceiver is "dead") After 500 ms, the detection routine is forced to run. Figure 6-3. D+ D– Detection for USB Hot Plug No Pullup t - time - 50ms/div Figure 6-4. D+ D– Detection for USB Hot Plug With Pullup Vout Vin 2V/div Vchg Vout Viset 500mV/div 1 Battery Detect Cycle 1V/div 5V/div 1V/div Viset 1V/div Vts 1V/div Vts Entered TTDM 2V/div t - time - 5ms/div t - time - 10ms/div 42-Ω Load 100–Ω Load Figure 6-5. Battery Removal – GND Removed First Figure 6-6. Battery Removal With OUT and TS Disconnect First Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 11 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Vout 1V/div Vchg Battery Declared Absent 5V/div Viset 1V/div V_0.1 W_OUT 100mV/div t - time - 20ms/div . Continuous battery detection when not in TTDM Figure 6-7. Battery Removal With Fixed TS = 0.5 V 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 6.8.2 Protection Circuits Waveforms Vchg Vin 2V/div 2V/div Vchg Vin 2V/div 2V/div 500mV/div Short Detected in 100mA mode and Latched Off Viset Viset V_0.1W_OUT 20mV/div 500mV/div V_0.1 W_OUT 20mV/div t - time - 1ms/div t - time - 5ms/div CH4: IOUT (0.2 A/Div) CH4: IOUT (0.2 A/Div) Figure 6-8. ISET Shorted Before USB Power Up Vin Figure 6-9. DPM – Adaptor Current Limits – VIN Regulated to 4.3 V 2V/div Vchg Vin Vout 2V/div 1V/div 2V/div Enters Thermal Regulation Exits Thermal Regulation Viset 1V/div 500mV/div 20mV/div V_0.1W_OUT Viset 50mV/div V_0.1W_OUT t - time - 500ms/div t - time - 1s/div Figure 6-10. DPM – USB Current Limits – VIN Regulated to 4.4 V The IC temperature rises to 125°C and enters thermal regulation. Charge current is reduced to regulate the IC at 125°C . VIN is reduced, the IC temperature drops, the charge current returns to the programmed value. Figure 6-11. Thermal Regulator – VIN Increases 546 4.212 Kiset VO @ 0°C 544 VOUT - Output Voltage DC - V 542 Low to High Currents (may occur in recharge to fast charge transion) 540 Kiset - W ROUT = 100 Ω 4.21 538 High to Low Currents (may occur in Voltage Regulation - Taper Current) 536 534 532 530 4.208 4.206 VO @ 25°C 4.204 4.202 VO @ 85°C 4.2 4.198 528 0 .15 0.2 0.4 IO - Output Current - A 0.6 0.8 Figure 6-12. KISET for Low and High Currents 4.196 4.5 5 5.5 VI - Input Voltage DC - V 6 6.5 Figure 6-13. Line Regulation Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 13 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 363.4 4.2 363.2 4.199 IO @ 25°C IO - Output Current - mA Vreg @ 25°C VO - Output Voltage - V 4.198 Vreg @ 85°C 4.197 4.196 4.195 Vreg @ 0°C 362.8 362.4 362.2 4.193 362 0 0.2 0.4 0.6 IO - Output Current - A 0.8 1 Figure 6-14. Load Regulation Overtemperature IO @ 85°C 362.6 4.194 4.192 14 363 361.8 2.5 IO @ 0°C 3 3.5 VO - Output Voltage - V 4 4.5 Figure 6-15. Current Regulation Overtemperature Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7 Detailed Description 7.1 Overview The BQ2405x is a highly integrated family of 2-mm × 2-mm single-cell Li-Ion and Li-Pol chargers. The charger can be used to charge a battery, power a system or both. The charger has three phases of charging: precharge to recover a fully discharged battery, fast-charge constant current to supply the buck charge safely and voltage regulation to safely reach full capacity. The charger is flexible, allowing programming of the fast-charge current, precharge current and termination. This charger is designed to work with a USB connection or adaptor (DC out). The charger also checks to see if a battery is present. The charger also comes with a full set of safety features: JEITA Temperature Standard, Overvoltage Protection, DPM-IN, Safety Timers, and ISET short protection. All of these features and more are described in detail below. The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or Li-Pol battery pack. Upon application of a 5VDC power source the D+, D– detection routine is run to determine if the source is an Adaptor or a USB port. This feature is useful, when the battery is discharged (USB transceiver dead) or there is no transceiver, by early detection of an adaptor, thus allowing initial charging at the adaptor level. ISET and OUT short checks are performed in parallel with the detection routine to assure a proper charge cycle. If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning cycle begins. The amount of precharge current can be programmed using the PRE-TERM pin which programs a percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system load is connected across the battery stealing the battery current. The precharge current can be set higher to account for the system loading while allowing the battery to be properly conditioned. The PRE-TERM pin is a dual-function pin which sets the precharge current level and the termination threshold level. The termination "current threshold" is always half of the precharge programmed current level. Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge current is applied. The fast charge constant current is programmed using the ISET pin. The constant current provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage. If the IC reaches 125°C, the IC enters thermal regulation. Slow the timer clock by half and reduce the charge current as needed to keep the temperature from rising any further. Figure 7-1 shows the charging profile with thermal regulation. Typically under normal operating conditions, the IC’s junction temperature is less than 125°C and thermal regulation is not entered. Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the regulation voltage until the current tapers to the termination threshold. The charge termination can be disabled if desired. The CHG pin is low (LED on) during the first charge cycle only and turns off once the charge termination threshold is reached, regardless if termination is enabled or disabled. The TS pin monitors the voltage across the pack thermistor and implements the JEITA standard. This allows for reduced voltage regulation at hot temperatures and reduced charge currents at low temperatures. The TS pin incorporates a chip disable feature when pulled low and an Termination and Timer Disable Mode (TTDM) feature when left floating or pulled high. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 15 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.2 Functional Block Diagram Internal Charge Current Sense w/Multiple Outputs IN OUT OUT IN OUT + _ + _ 80 Input mV Power + Detect _ + - IN-DPMREF IOUT x 1.5 V 540 AW Charge Pump OUTREGREF TJ°C + _ 125°CREF FAST CHARGE Thermal Regulation PRE-CHARGE ISET IN + _ 1.5 V Pre-CHG Reference + _ USB Sense Resistor USB100/500REF TJoC + _ Term Reference + _ 150oCREF Thermal Shutdown Charge Pump X2 Gain (1:2) Term:Pre-CHG 75mA+ PRE-TERM IN Increased from 75mA to 85mA for 1st minute of charge. + _ + OUT VTERM_EN CHG OVPREF + _ On During 1st Charge Only + _ ON: OFF: ISET2 (LOW = ISET, HI = USB500, CHARGE CONTROL 0.9 V Float FLOAT = USB100) VCOLD-10C + _ + _ VHOT-45C HI = Half CHG (JEITA) HI = 4.06Vreg (JEITA) 0.6 V(200 mA) VCOLD-FLT + _ + _ VHOT-FLT D+ D+ / DDETECTION CONTROL - On Initial Supply Power Connection LO = TTDM MODE HI = Suspend CHG TS VTTDM VDISABLE + _ 16 (100 mA) HI = CHIP DISABLE + _ Cold Temperature Sink Current VCLAMP = 1.4 V = 45mA + _ 5 mA D- Disable Sink Current = 20mA + _ 45mA Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Copyright © 2016, Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 VO(REG) PreConditioning Phase Thermal Regulation Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE IO(OUT) FAST-CHARGE CURRENT PRE-CHARGE CURRENT AND TERMINATION THRESHOLD Battery Voltage, V(OUT) Battery Current, I(OUT) Charge Complete Status, Charger Off VO(LOWV) I(TERM) IO(PRECHG) T(THREG) 0A Temperature, Tj T(PRECHG) T(CHG) DONE Figure 7-1. Charging Profile With Thermal Regulation 7.3 Feature Description 7.3.1 Power Down, or Undervoltage Lockout (UVLO) The BQ2405x family is in power down mode if the voltage of the IN pin is less than UVLO. The part is considered dead and all the pins are high impedance. Once the IN voltage rises above the UVLO threshold the IC enters Sleep Mode or Active mode depending on the voltage of the OUT pin (battery). 7.3.2 Power Up The IC is alive after the IN voltage ramps above UVLO (see Section 7.4.1), resets all logic and timers, and starts to perform the D+D– detection along with many of the continuous monitoring routines. The D+/D– detection typically take less than 100 ms, but can take as long as 600 ms if there is no activity on the D+ or D– lines which indicates the device transceiver nor an adaptor is present. Typically the input voltage quickly rises through the UVLO and sleep states where the IC declares power good, starts the qualification charge at 100 mA, finishes the USB detection routine, sets the input current limit threshold base on the source detected (ISET=adaptor or 100mA=USB), starts the safety timer, and enables the CHG pin. See Figure 7-3. 7.3.3 D+, D– Detection This detection is designed to give the charger advance notice that an adaptor or USB port is connect for the cases where the battery is discharged and device transceiver is not able to communicate with a USB host or there is not a device transceiver. If an adaptor is detected, then the charger can immediately start charging at the programmed ISET level. Without this early detection, the charger would have to default to the 100-mA input current level to make sure it was not over-loading a low power USB port. The detection method monitors the D+, D– communication lines looking for a short between the lines (Adaptor source connected) or pulldown resistors on D+, D– (USB source connected) to determine what source is connected (no USB communication takes place). If an adaptor source is detected then the charger will transition from the 100 mA startup level to the ISET programmed current level. If a USB port is detected, the input current limit will stay at the 100 mA level. If a different charge level is desired, than the one detected, the host has to change the state of the ISET2 pin (signals the internal logic to start using the ISET2 as the program pin) and then set to the desired state. The D+ and D– pin connections inside the charger are disconnected within 100 ms of the D+ or D– lines being pulled high (start of detection), to minimize any interaction between the charger detection pins and the USB normal communications. If the device transceiver is able to communicate with the USB host, communication typically starts after 100 ms after the device has pulled the D+ or D– line high indicating it is “on line”, and by Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 17 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 then the IC detection is complete and has been disconnected. The device host then may change the ISET2 level or disable the IC by pulling the TS pin low. 7.3.4 New Charge Cycle A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin), exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping below the VRCH threshold. The CHG pin is active low only during the first charge cycle, therefore exiting TTDM or a dropping below VRCH will not turn on the CHG pin FET, if the CHG pin is already high impedance. VSS 1.8V Disabled 4.06 V HOT Operation Normal Operation 4.06 V HOT Operation HOT Fault Disabled Normal Operation Cold Operation Cold Fault LDO Mode Cold Fault tDGL(TTDM) Enter Normal Operation Cold Operation t < tDGL(IS) Normal Operation LDO Mode tDGL(TTDM) Enter tDGL(TTDM) Exit LDO t < tDGL(TTDM) Exit LDOHYS tDGL(TS) tDGL(TS) tDGL(TS1_IOC) Cold to Normal 0°C 0°CHYS tDGL(TS_IOC) Rising tDGL(TS_IOC) Falling 10°C 10°CHYS tDGL(TS) tDGL(TS) tDGL(TS) 45°CHYS 45°C tDGL(TS) tDGL(TS) 60°CHYS Dots Show Threshold Trip Points fllowed by a deglitch time before transitioning into a new mode. 60°C EN DISHYS 0V t Drawing Not to Scale Figure 7-2. TS Battery Temperature Bias Threshold and Deglitch Timers 18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Apply Input Power Is Chip Enabled &Alive? VTS > VEN & VIN>VUVLO No Yes Start Running USB Detection Routine Yes Is power good? VBAT +VDT < VIN < VOVP & VUVLO < VIN No Yes Set Input Current Limit to 100mA and Start Charge Perform ISET & OUT short tests Remember ISET2 State Yes Has ISET2 changed state since Detection Routine was run? No Yes Set charge current based on ISET2 truth table. Set charge current based Detection Routine.. Return to Charge Figure 7-3. Power Up Flow Diagram 7.3.5 Overvoltage Protection (OVP) – Continuously Monitored If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The timer ends and the CHG pin goes to a high impedance state. Once the overvoltage returns to a normal voltage, timer continues, charge continues and the CHG pin goes low after a 25-ms deglitch. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 19 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.3.6 CHG Pin Indication The charge pin has an internal open drain FET which is on (pulls down to VSS) during the first charge only (independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current tapers to the termination threshold set by the PRE-TERM resistor. The charge pin will be high impedance in sleep mode and OVP and return to its previous state when the condition is removed. Cycling input power, pulling the TS pin low and releasing or entering precharge mode will cause the CHG pin to reset and is considered the start of a first charge. 7.3.7 CHG LED Pullup Source For host monitoring, a pullup resistor is used between the STATUS pin and the VCC of the host and for a visual indication a resistor in series with an LED is connected between the STATUS pin and a power source. If the CHG source can exceed 7 V, a 6.2-V Zener diode should be used to clamp the voltage. If the source is the OUT pin, note that as the battery changes voltage, the brightness of the LEDs vary. CHARGING STATE CHG FET/LED 1st Charge ON Refresh Charge OVP OFF SLEEP TEMP FAULT ON for 1st Charge 7.3.8 Input DPM Mode (VIN-DPM or IN-DPM) The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching its current limit due to an excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with voltage less than VIN-DPM to power the out pin. This works well with current limited adaptors and USB ports as long as the nominal voltage is above 4.3 V and 4.4 V respectively. This is an added safety feature that helps protect the source from excessive loads. 7.3.9 OUT The OUT pin of the charger provides current to the battery and to the system, if present. This IC can be used to charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the loads do not exceed the available current. The OUT pin is a current limited source and is inherently protected against shorts. If the system load ever exceeds the output programmed current threshold, the output will be discharged unless there is sufficient capacitance or a charged battery present to supplement the excessive load. 20 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.3.10 ISET An external resistor is used to Program the Output Current (10 mA to 1.0 A) and can be used as a current monitor. RISET = KISET ÷ IOUT (1) Where: IOUT is the desired fast charge current; KISET is a gain factor found in the electrical specification For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Figure 6-12 shows the transition from low current to higher current. Going from higher currents to low currents, there is hysteresis and the transition occurs around 0.15 A. o 1.8 For < 45 C, 4.2V Regulation No Operation During Cold Fault 3 o 1.6 o 60 C to 45 C HOT TEMP 4.06V Regulation 1.4 VOUT IO - Output Current - A 3.5 2.5 < 48oC 1.5 1 0.5 0 0 o o o 0C 10 C 60 C Termination Disable 2 100% of Programmed Current } IC Disable } Hot Fault Normalized OUT Current and VREG - V 4 0.4 0.6 0.8 1 1.2 1.4 IOUT Internal Clamp Range 1 0.8 IOUT Programmed max 0.6 ISET Short Fault Range min 0.2 Cold Fault IOUT 0.2 1.2 0.4 50% IOUT Clamp min - max 4.5 IOUT Fault min - max The ISET resistor is short protected and will detect a resistance lower than ≉340 Ω. The detection requires at least 80 mA of output current. If a “short” is detected, then the IC will latch off and can only be reset by cycling the power. The OUT current is internally clamped to a maximum current between 1.05 A and 1.4 A and is independent of the ISET short detection circuitry, as shown in Figure 7-5. Also, see Figure 8-2 and Figure 6-8. Non Restricted Operating Area 0 1.6 1.8 100 VTS - Voltage - V 1000 10000 ISET - W Figure 7-4. Operation Over TS Bias Voltage Figure 7-5. Programmed / Clamped Out Current Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 21 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.3.11 TS The TS pin is designed to follow the new JEITA temperature standard for Li-Ion and Li-Pol batteries. There are now four thresholds, 60°C, 45°C, 10°C, and 0°C. Normal operation occurs from 10°C to 45°C. If between 0°C and 10°C the charge current level is cut in half and if between 45°C and 60°C the regulation voltage is reduced to 4.1 Vmax, see Figure 7-4. The TS feature is implemented using an internal 50-μA current source to bias the thermistor (BQ24050 designed for use with a 10k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F), and BQ24052 with a 100k NTC β = 3540 (Mitsubishi TH05-36104F) or equivalent) connected from the TS pin to VSS. If this feature is not needed, a fixed 10k can be placed between TS and VSS to allow normal operation. This may be done if the host is monitoring the thermistor and then the host would determine when to pull the TS pin low to disable charge. The TS pin has two additional features, when the TS pin is pulled low or floated/driven high. A low disables charge (similar to a CE feature) and a high puts the charger in TTDM. Above 60°C or below 0°C the charge is disable. Once the thermistor reaches ≉–10°C the TS current folds back to keep a cold thermistor (from –10°C to –50°C) from placing the IC in the TTDM mode. If the TS pin is pulled low into disable mode, the current is reduce to ≉30 μA, see Figure 7-2. Because the ITS current is fixed along with the temperature thresholds, it is not possible to use thermistor values other than the 10k and 100k. 7.3.12 Termination and Timer Disable Mode (TTDM) -TS Pin High The battery charger is in TTDM when the TS pin goes high from removing the thermistor (removing battery pack/floating the TS pin) or by pulling the TS pin up to the TTDM threshold. When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect routine is run to see if the battery was removed or not. If the battery was removed then the CHG pin will go to its high impedance state if not already there. If a battery is detected the CHG pin does not change states until the current tapers to the termination threshold, where the CHG pin goes to its high impedance state if not already there (the regulated output will remain on). The charging profile does not change (still has precharge, fast-charge constant current and constant voltage modes). This implies the battery is still charged safely and the current is allowed to taper to zero. When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle begins and the CHG LED turns on. If TTDM is not desired upon removing the battery with the thermistor, one can add a 237k resistor between TS and VSS to disable TTDM. This keeps the current source from driving the TS pin into TTDM. This creates ≉0.1°C error at hot and a ≉3°C error at cold. 7.3.13 Timers The precharge timer is set to 30 minutes . The precharge current, can be programmed to offset any system load, making sure that the 30 minutes is adequate. The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation, IN-DPM or if in USB current limit. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast when in these modes. If either the 30 minute or 10-hour timer times out, the charging is terminated and the CHG pin goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power, or going into and out of TTDM. 7.3.14 Termination Once the OUT pin goes above VRCH, (reaches voltage regulation) and the current tapers down to the termination threshold, the CHG pin goes high impedance and a battery detect route is run to determine if the battery was removed or the battery is full. If the battery is present, the charge current terminates. If the battery was removed along with the thermistor, then the TS pin is driven high and the charge enters TTDM. If the battery was removed and the TS pin is held in the active region, then the battery detect routine continues until a battery is inserted. 22 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.3.15 Battery Detect Routine The battery detect routine should check for a missing battery while keeping the OUT pin at a useable voltage. Whenever the battery is missing the CHG pin should be high impedance. The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the time if battery is missing and not in TTDM. On power up, if battery voltage is greater than VRCH threshold, a battery detect routine is run to determine if a battery is present. The battery detect routine will be disabled while the IC is in TTDM or has a TS fault. See Figure 7-6 for the Battery Detect Flow diagram. 7.3.16 Refresh Threshold After termination, if the OUT pin voltage drops to VRCH (100 mV below regulation) then a new charge is initiated, but the CHG pin remains at a high impedance (off). 7.3.17 Starting a Charge on a Full Battery The termination threshold is raised by ≉14%, for the first minute of a charge cycle so if a full battery is removed and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries that have relaxed many hours may take several minutes to taper to the termination threshold and terminate charge. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 23 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Start BATT_DETECT Start 25ms timer Timer Expired? No Yes Is VOUTVREG-300mV? Battery Present Turn off Sink Current Return to flow No Battery Absent Don’t Signal Charge Turn off Sink Current Return to Flow Figure 7-6. Battery Detect Flow Diagram 24 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 7.4 Device Functional Modes 7.4.1 Sleep Mode If the IN pin voltage is between VOUT+VDT and UVLO, the charge current is disabled, the safety timer counting stops (not reset) and the CHG pins are high impedance. As the input voltage rises and the charger exits sleep mode, the safety timer continues to count, charge is enabled and the CHG pin returns to its previous state. 7.5 Programming 7.5.1 PRE_TERM – Precharge and Termination Programmable Threshold Pre-Term is used to program both the precharge current and the termination current threshold, on the BQ2405x. The precharge current level is a factor of two higher than the termination current level. The termination can be set between 5 and 50% of the programmed output current level set by ISET. If left floating the termination and precharge are set internally at 10/20%, respectively. The precharge-to-fast-charge, Vlowv threshold is set to 2.5 V. RPRE-TERM = %Term × KTERM = %Pre-CHG × KPRE-CHG (2) Where: %Term is the percent of fast charge current where termination occurs; %Pre-CHG is the percent of fast charge current that is desired during precharge; KTERM and KPRE-CHG are gain factors found in the electrical specifications. 7.5.2 ISET2 Is a 3-state input and programs the Input Current Limit/Regulation Threshold. A low will program a regulated fast charge current via the ISET resistor and is the maximum allowed input/output current for any ISET2 setting, Float will program a 100-mA Current limit and High will program a 500-mA Current limit. Note that initially the D+/D– detection will latch the charge mode according to the source detected (dedicated charger: ISET; USB Host: at 100 mA) until the ISET2 pin has changed states, indicating the processor or transceiver is controlling the pin. The detection routine registers the input level (Low–High-Z–High) of the ISET2 pin typically 532 μs after applying input power (VIN > 3.4 V – UVLO). After the detection routine is complete, which is typically 100 ms after a pullup on the D+ or D– line or after typically 570 ms if no pullup, the IC monitors the ISET2 pin for a change of state. If the state changes (Low–High-Z–High) from the one registered, for more than 5 μs, then the "detected" latched charge mode is released and is then controlled by the ISET2 pin. The completion of the detection routine varies due to the mechanical-plugging action of the USB cable; therefore, it is best to wait ≥ 600 ms after VIN > 3.4 V to take control of the ISET2 pin. The following illustration shows two configurations for driving the 3-state ISET2 pin: VCC VCC To ISET2 R1 To ISET2 Drive Logic Q1 OR Drive Logic R1/R2 Divider set to 0.9 V Which is the Float Voltage R2 Q2 Copyright © 2016, Texas Instruments Incorporated Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 25 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 8.1 Application Information The BQ2405x evaluation module (EVM) is used to perform a stand-alone evaluation for the BQ2405x device family. Refer to the 0.8-A, Single-Input, Single-Cell Li-Ion Battery Charger User's Guide for details. 8.2 Typical Applications 8.2.1 BQ2405x Charger Application Design Example The BQ2405x chargers are designed to deliver up to 800 mA of continuous current to the battery output when programmed with a resistor on the ISET pin and is programmed for typically 540 mA at the factory. The USB current limit modes are selected by the ISET2 pin and ISET2 pin programs the charge current using the ISET resistor. BQ24050/2 Adaptor 1 DC+ IN OUT System Load 10 1.5kW GND 2 ISET TS 9 3 VSS CHG 8 4 PRETERM 5 D+ Battery Pack + 1kW 1mF 1mF OR ISET 2 7 D- 6 VDD 2kW TTDM USB Port ISET/100/500 mA VBUS GND GND D+ D+ D- D- Host Disconnect after Detection IOUT_FAST_CHG = 540 mA; IOUT_PRE_CHG = 108 mA; IOUT_TERM = 54 mA Figure 8-1. Typical Application Circuit, BQ24050, BQ24052 8.2.1.1 Design Requirements • • • • • 26 Supply voltage = 5 V Fast charge current: IOUT-FC = 540 mA; ISET-pin 2 Termination Current Threshold: %IOUT-FC = 10% of Fast Charge or ≉54 mA Precharge Current by default is twice the termination Current or ≉108 mA TS – Battery Temperature Sense = 10-kΩ NTC (103AT) Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 8.2.1.2 Detailed Design Procedure 8.2.1.2.1 Program the Fast Charge Current, ISET RISET = [K(ISET) / I(OUT)] from electrical characteristics table. . . K(SET) = 540 AΩ RISET = [540AΩ/0.54A] = 1.0 kΩ Selecting the closest standard value, use a 1-kΩ resistor between ISET (pin 16) and VSS. 8.2.1.2.2 Program the Termination Current Threshold, ITERM RPRE-TERM = K(TERM) × %IOUT-FC RPRE-TERM = 200Ω/% × 10% = 2 kΩ Selecting the closest standard value, use a 2-kΩ resistor between ITERM (pin 15) and Vss. One can arrive at the same value by using 20% for a precharge value (factor of 2 difference). RPRE-TERM = K(PRE-CHG) × %IOUT-FC RPRE-TERM = 100Ω/% × 20%= 2 kΩ 8.2.1.2.3 TS Function Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temp sense function, use a fixed 10-kΩ resistor between the TS (Pin 1) and VSS. 8.2.1.2.4 CHG LED Status: connect a 1.5-kΩ resistor in series with a LED between the OUT pin and the CHG pin. Processor Monitoring: Connect a pullup resistor between the power rail of the processor and the CHG pin. 8.2.1.2.5 Selecting IN and OUT Pin Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input and output pins. Using the values shown on the application diagram, is recommended. After evaluation of these voltage signals with real system operational conditions, one can determine if capacitance values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast high amplitude pulsed load applications. Note if designed for high input voltage sources (bad adaptors or wrong adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer). 8.2.1.3 Application Curves Vout 1V/div Vchg 2V/div Vchg 500 mV/div 2V/div Iout Clamped Current Viset Vout 500mV/div Vts 100 mV/div Viset ISET Short Detected and Latched Off 2V/div t - time - 50ms/div Figure 8-2. ISET Shorted During Normal Operation 10-kΩ resistor from TS to GND. 10 kΩ is shorted to disable the IC. Figure 8-3. TS Enable and Disable Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 27 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 Vchg 2V/div Vout 2V/div Battery Detect Mode Vin 5V/div t - time - 20ms/div . Fixed 10-kΩ resistor, between TS and GND Figure 8-4. Hot Plug Source w/No Battery – Battery Detection 9 Power Supply Recommendations The devices are designed to operate from an input voltage supply range between 3.5 V and 28 V and current capability of at least the maximum designed charge current. This input supply should be well regulated. If located more than a few inches from the BQ2405x IN and GND terminals, a larger capacitor is recommended. 28 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 10 Layout 10.1 Layout Guidelines To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter capacitors from OUT to GND (thermal pad) should be placed as close as possible to the BQ2405x, with short trace runs to both IN, OUT and GND (thermal pad). • • • All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces The BQ2405x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. It is best to use multiple 10-mill vias in the power pad of the IC and in close proximity to conduct the heat to the bottom ground plane. The bottom ground place should avoid traces that “cut off” the thermal path. The thinner the PCB the less temperature rise. The EVM PCB has a thickness of 0.031 inches and uses 2 oz. (2.8-mill thick) copper on top and bottom, and is a good example of optimal thermal performance. 10.2 Layout Example Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 29 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 10.3 Thermal Considerations The BQ2405x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the QFN and SON PCB Attachment Application Report. The most common measure of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: θJA = (TJ – T) / P (3) Where: TJ = chip junction temperature T = ambient temperature P = device power dissipation Factors that can influence the measurement and calculation of θJA include: 1. 2. 3. 4. 5. Whether or not the device is board mounted Trace size, composition, thickness, and geometry Orientation of the device (horizontal or vertical) Volume of the ambient air surrounding the device under test and airflow Whether other surfaces are in close proximity to the device being tested Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of time. The fast charge current will start to taper off if the part goes into thermal regulation. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged: P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(OUT)] × I(OUT) (4) The thermal loop feature reduces the charge current to limit excessive IC junction temperature. TI recommends that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active. 10.3.1 Leakage Current Effects on Battery Capacity To determine how fast a leakage current on the battery discharges, the battery is used for the calculation. The time from full to discharge can be calculated by dividing the Amp-Hour Capacity of the battery by the leakage current. For a 0.75AHr battery and a 10-μA leakage current (750mAHr/0.010mA = 75000 hours), it would take 75k hours or 8.8 years to discharge. In reality, the self discharge of the cell is much faster, so the 10 μA leakage would be considered negligible. 30 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 BQ24050, BQ24052 www.ti.com SLUS940D – SEPTEMBER 2009 – REVISED MAY 2021 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 11.2 Documentation Support 11.2.1 Related Documentation For related documentation see the following: QFN and SON PCB Attachment Application Report 11.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.5 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 11.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24050 BQ24052 31 PACKAGE OPTION ADDENDUM www.ti.com 16-Jul-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) BQ24050DSQR ACTIVE WSON DSQ 10 3000 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR 0 to 125 CVC Samples BQ24050DSQT ACTIVE WSON DSQ 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR 0 to 125 CVC Samples BQ24052DSQR ACTIVE WSON DSQ 10 3000 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR 0 to 125 CGT Samples BQ24052DSQT ACTIVE WSON DSQ 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR 0 to 125 CGT Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of