User's Guide
SLUU453C – November 2010 – Revised May 2013
bq24153A/56A/57/58/59 Fully Integrated, Switch-Mode,
One-Cell, Li-Ion Charger With Full USB Compliance and
USB-OTG Support EVM
The bq24153A/56A/57/58/59 evaluation module is a complete charger module for evaluating compact,
flexible, high-efficiency, USB-friendly, switch-mode charge management solution for single-cell Li-ion and
Li-polymer batteries used in a wide range of portable applications.
1
2
3
4
Contents
Introduction ................................................................................................................... 2
1.1
EVM Features ....................................................................................................... 2
1.2
General Description ................................................................................................ 2
1.3
I/O Description ...................................................................................................... 2
1.4
Control and Key Parameters Setting ............................................................................. 2
1.5
Recommended Operating Conditions ............................................................................ 3
Test Summary ................................................................................................................ 3
2.1
Definitions ............................................................................................................ 3
2.2
Recommended Test Equipment .................................................................................. 3
2.3
Recommended Test Equipment Setup .......................................................................... 4
2.4
Recommended Test Procedure ................................................................................... 6
Printed-Circuit Board Layout Guideline ................................................................................... 8
Bill of Materials, Board Layout, and Schematics ........................................................................ 9
4.1
Bill of Materials ...................................................................................................... 9
4.2
Board Layout ....................................................................................................... 10
4.3
Schematic .......................................................................................................... 12
List of Figures
................................................................................................ 4
............................................................................................ 5
Main Window of bq24153A_9 Evaluation Software .................................................................... 6
Boost Function Test Setup ................................................................................................ 8
Top Layer.................................................................................................................... 10
Bottom Layer ................................................................................................................ 11
Top Assembly ............................................................................................................... 11
1
Connections of HPA172 Kit
2
Charging Function Test Setup
3
4
5
6
7
List of Tables
1
Factory Jumper Settings .................................................................................................... 4
I2C is a trademark of Philips Electronics N.V.
SLUU453C – November 2010 – Revised May 2013
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1
Introduction
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1
Introduction
1.1
EVM Features
•
•
•
•
•
•
•
•
•
1.2
Evaluation module (EVM) for bq24153A/56A/57/58/59
High-efficiency fully integrated NMOS-NMOS synchronous buck charger with 3-MHz frequency
Integrated power FETs for up to 1.55-A charge rate
Programmable battery voltage, charge current, and input current via I2C™ interface
Input operating range 4 V – 6 V
Boost-mode operation for USB OTG
LED indication for status signals
Test points for key signals available for testing purposes. Easy probe hook-up
Jumpers available. Easy-to-change connections.
General Description
The bq24153A/56A/57/58/59 evaluation module is a complete charger module for evaluating compact,
flexible, high-efficiency, USB-friendly, switch-mode charge management solution for single-cell Li-ion and
Li-polymer batteries used in a wide range of portable applications.
The bq24153A/56A/57/58/59 integrates a synchronous PWM controller, power MOSFETs, input current
sensing, high-accuracy current and voltage regulation, and charge termination, into a small WCSP
package. The charge parameters can be programmed through an I2C interface.
For details, see the bq24153A/56A/58/59 data sheet (SLUSAB0) and the bq24157 datasheet (SLUSAX5).
1.3
1.4
2
I/O Description
Jack
Description
J1–DC+
AC adapter or USB, positive output
J1–DC–
AC adapter or USB, negative output
J2–BAT–
Battery negative terminal; connect to DC-
J2-AUXPWR/CD
Connect to AUXPWR pin or CD pin
J2-BAT+
Charger positive output; connect to CSOUT pin
J3–SCL
I2C clock; connect to SCL pin
J3–SDA
I2C data; connect to SDA pin
J3–DC–
AC adapter or USB, negative output
J4–STAT
Status output; can be connected to STAT pin by JMP1 set to EXT (2-3)
J4–OTG/SLRST
Connect to OTG/SLRST pin
J4–DC–
AC adapter or USB, negative output
Control and Key Parameters Setting
Jack
Description
Factory Setting
JMP1
LED 1-2: Connect STAT pin to LED on EVM
EXT 2-3: Connect STAT pin to J4-1
Jumper on LED (1-2)
JMP2
HI 1-2: OTG or SLRST high (input or battery voltage)
LO 2-3: OTG or SLRST low (ground)
JMP3
J2-BAT+ connect to J2-AUXPWR/CD
JMP4
AUXPWR/CD pin connect to high or low or float
JMP5
OTG/SLRST pin 10-kΩ resistor to ground or float
bq24153A/56A/57/58/59 Fully Integrated, Switch-Mode, One-Cell, Li-Ion Charger
With Full USB Compliance and USB-OTG Support EVM
See Table 1
Jumper ON
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Introduction
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1.5
Recommended Operating Conditions
Min
Typ
Max
Supply voltage, VIN
Input voltage from ac adapter input
4
5
6
V
Battery voltage, VBAT
Voltage applied at VBAT terminal of J8
0
3-4.2
4.44
V
Supply current, IAC
Maximum input current from ac adapter input
0.1
0.1–0.5
1.5
A
Charge current, Ichrg
Battery charge current
0.325
0.7
1.55
A
125
°C
Operating junction temperature range, TJ
2
0
Unit
Test Summary
This procedure details how to configure the HPA697 evaluation board for bench evaluation. An electronic
load is used to simulate a battery.
2.1
Definitions
This procedure details how to configure the HPA697 evaluation board. The following naming conventions
are followed. See the bq24153A/56A/57/58/59EVM (also know as HPA697) schematic for details.
VXXX :
LOADW:
V(TPyyy):
V(Jxx):
V(TP(XXX)):
V(XXX, YYY):
I(JXX(YYY)):
Jxx(BBB):
Jxx ON :
Jxx OFF:
Jxx (-YY-)
Measure: → A,B
Observe → A,B
External voltage supply name (VADP, VBT, VSBT)
External load name (LOADR, LOADI)
Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at
TP12.
Voltage at jack terminal Jxx
Voltage at test point XXX. For example, V(ACDET) means the voltage at the test
point which is marked as ACDET.
Voltage across point XXX and YYY.
Current going out from the YYY terminal of jack XX.
Terminal or pin BBB of jack xx
Internal jumper Jxx terminals are shorted
Internal jumper Jxx terminals are open
ON: Internal jumper Jxx adjacent terminals marked as YY are shorted
Check specified parameters A, B. If measured values are not within specified limits
the unit under test has failed.
Observe if A, B occur. If they do not occur, the unit under test has failed.
Assembly drawings have location for jumpers, test points, and individual components.
2.2
2.2.1
Recommended Test Equipment
Power Supplies
Power Supply #1 (PS#1): a power supply capable of supplying 5 V at 2 A is required.
2.2.2
Load #1
A 10-V (or above), 2-A (or above) electronic load that can operate in constant current mode.
2.2.3
Load #2
A 10-V (or above), 2-A (or above) electronic load that can operate in constant voltage mode or a source
meter to simulate a battery.
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3
Test Summary
2.2.4
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Meters
Two equivalent voltage meters and two equivalent current meters. The current meters must be able to
measure 2-A current.
2.2.5
Computer
A computer with at least one USB port and a USB cable. The bq24153_6_8 evaluation software must be
properly installed.
2.2.6
HPA172 Communication Kit (USB TO GPIO)
A HPA172 USB to I2C communication kit.
2.2.7
Software
Download BQ24153_6_8Setup.zip from the charger's product folder, unzip the file and double-click on the
“SETUP.EXE” file. Follow the installation steps.
2.3
Recommended Test Equipment Setup
1.
2.
3.
4.
Set Power Supply #1 for 5 V ± 100 mVdc, 2-A. ±0.1-A current limit, and then turn off supply.
Connect the output of Power Supply #1 in series with a current meter (multimeter) to J1 (DC+, DC–).
Connect a voltage meter across J1 (DC+, DC–).
Connect the Load #2 in series with a current meter (multimeter) to J2 (BAT+, BAT–). Ensure that a
voltage meter is connected across J2 (BAT+, BAT–). Turn on the Load #2. Use the constant voltage
mode. Set the output voltage to 2.5 V.
5. Turn off Load #2.
6. Connect J5 to HPA172 kit by the 10-pin ribbon cable. Connect the USB port of the HPA172 kit to the
USB port of the computer. The connections are shown in Figure 1.
I/O
USB Interface
Adapter
Texas Instruments
© 2006
USB
To
Computer
USB port
10-pin
Ribbon
Cable
To EVM
Figure 1. Connections of HPA172 Kit
7. Install jumpers per Table 1
Table 1. Factory Jumper Settings
4
Spin
JMP1
JMP2
JMP3
JMP4
JMP5
HPA256-001
(bq24153A)
(-LED-) ON
(-LO-) ON
OFF
(-LO-) ON
ON
HPA256-002
(bq24156A)
(-LED-) ON
(-HI-) ON
OFF
(-LO-) ON
ON
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With Full USB Compliance and USB-OTG Support EVM
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Test Summary
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Table 1. Factory Jumper Settings (continued)
Spin
JMP1
JMP2
JMP3
JMP4
JMP5
HPA256-003
(bq24158)
(-LED-) ON
(-LO-) ON
OFF
(-LO-) ON
ON
HPA256-003
(bq24157)
(-LED-) ON
(-LO-) ON
OFF
(-LO-) ON
ON
HPA256-003
(bq24159)
(-LED-) ON
(-HI-) ON
OFF
(-LO-) ON
ON
8. After the preceding steps, the test setup for HPA697 is shown in Figure 2
BQ2415x
EVM
J2
JMP3
U1
J3
JMP4
D C-
J5
JMP2
OTG
S LRS T
JMP1
SC L
HPA172
Ribbon
Cable
V
Load
#2
JMP5
CIRCUIT
D1
USB
Cable
I
APPLICATION
DC+
DC -
ST AT
V
D C-
Iin
SD A
Power
supply #1
AUXPWR
CD
BAT -
J1
I
Ichrg
BAT+
J4
Figure 2. Charging Function Test Setup
9. Turn on the computer.
• Open the bq24153A_9 evaluation software. Select part number and click the GO button. The main
window of the software is shown in Figure 3.
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Test Summary
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Figure 3. Main Window of bq24153A_9 Evaluation Software
2.4
Recommended Test Procedure
The following test procedure may be useful for evaluating the charger IC outside of a real system
especially when no battery is available to connect to the output (i.e., Load#2).
2.4.1
Maximum Charge Current and Maximum Battery Regulation Voltage in The Safety Limit Register
The Maximum Charge Current and Maximum Battery Regulation Voltage values are stored in the Safety
Limit Register. If the default values (950mA maximum charge current and 4.20V maximum charge voltage)
are acceptable for your application, this step is unnecessary. If not, the Safety Limit Register bits are reset
to default values and can be changed immediately after V(CSOUT) (i.e. V(BAT+)) transitions from below
VSHORT (2.05V typ) to above VSHORT if the SLRST pin (bq24156A and bq24159 only) is logic high. In
addition, on the bq24156A and bq24159, the Safety Limit Register bits are reset to default values and can
be changed immediately after the SLRST pin transitions from logic low to logic high if V(CSOUT) is above
VSHORT (2.05V typ). Once a change (WRITE command) to any other register is made, the safety limit
registers are locked until one of the previously explained transitions occur. The following steps are
recommended to modify any of the Safety Limit Register bits.
1. Ensure that Section 2.3 steps are followed.
2. Turn on PS#1. Turn on Load#2 but set its constant voltage to below 2.05V. For the bq24156A and
bq24159EVMs only, move the SLRST jumper shunt to LO.
3. With the software running, disable (uncheck) the Periodic Resets and Periodic Reads feature and also
6
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Charger With Full USB Compliance and USB-OTG Support EVM
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Test Summary
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disable the Immediate Updates button in the toolbar.
4. Increase Load#2 constant voltage to 2.5V. For the bq24156A and bq24159EVMs only, move the
SLRST jumper shunt to HI.
5. Use the drop down boxes to select the desired maximum charge current and/or the maximum battery
regulation voltage. The Safety Limit Register in the register bank on the bottom right of the screen will
change color indicating an update is pending.
6. Press the now-highlighted W button next to the register.
7. Re-enable the Periodic Resets, Immediate Updates and Periodic Reads features as previously
recommended.
The Maximum Charge Current and Maximum Battery Regulation Voltages drop down boxes now display
the updated values and the charger is ready for further evaluation.
2.4.2
Charge Voltage and Current Regulation
Ensure that the Section 2.3 steps are followed.
Turn on Load#2.
Turn on PS#1.
Software setup:
• Ensure that Immediate Updates is enabled.
• Check Periodic Resets, and set Rate to 1 second (except for bq24157).
• Check Periodic Reads, and set Rate to 5 seconds.
• Ensure that Rsense is set to 68 mΩ.
• Ensure that Operation Mode is Charger Mode (except for bq24156A and bq24159).
• Uncheck Charge Current Termination if checked.
• Check STAT Pin.
• Select Charge Current Sense Voltage to Normal.
5. Change Charge Current to 950mA and change Input Current Limit to 500mA.
Measure → Ichrg = 650 mA - 850mA
Measure → Iin = 440mA - 500mA
Observe → Diode D1 is on (green)
6. Check Disable Charger. Turn off PS#1, turn off Load #2, and disconnect.
1.
2.
3.
4.
2.4.3
Boost Function for bq24153A, bq24157 and bq24158 Versions Only
1. Adjust PS#1 output to 3.7 V, and disable the output. Connect the PS#1 in series with a current meter
(multimeter) to J2 (BAT+, BAT–). Ensure that a voltage meter is connected across J2 (BAT+, BAT–).
2. Set the Load #1 current to 200 mA ±20 mA, but disable the output. Connect the output of the Load #1
in series with a current meter (multimeter) to J1 (DC+, DC–). Ensure that a voltage meter is connected
across J1 (DC+, DC–). The setup is now like Figure 4 for HPA256.
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Printed-Circuit Board Layout Guideline
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BQ2415x
EVM
J2
JMP3
U1
APPLICATION
JMP1
SC L
HPA172
Ribbon
Cable
J5
J3
Power
supply #1
JMP5
CIRCUIT
D1
USB
Cable
V
JMP2
JMP4
D C-
DC -
OT G
SL R S T
DC+
ST AT
V
D C-
Io
SD A
Load
#1
I
AUXPWR
CD
BAT -
J1
I
I in
BAT+
J4
Figure 4. Boost Function Test Setup
3. Turn on PS#1 output.
4. Software setup: Change Operation Mode to Boost Mode.
Measure → V(J1(DC+, DC–)) = 5 V ±0.2 V
5. Enable Load #1.
Measure → V(J1(DC+, DC–)) = 5 V ±0.2 V
Measure → Iin = 330 mA ±40 mA
Measure → Io = 200 mA ±20 mA
3
Printed-Circuit Board Layout Guideline
1. To obtain optimal performance, the power input capacitors, connected from input to PGND, must be
placed as close as possible to the integrated circuit (IC).
2. The output inductor must be placed close to the IC and the output capacitor connected between the
inductor and PGND of the IC. The intent is to minimize the current path loop area from the SW pin
through the LC filter and back to the PGND pin. To prevent high-frequency oscillation problems, proper
layout to minimize high-frequency current path loop is critical.
3. The sense resistor must be adjacent to the junction of the inductor and output capacitor. Route the
sense leads connected across the RSNS back to the IC, close to each other (minimize loop area) or
on top of each other on adjacent layers (do not route the sense leads through a high-current path).
4. Place all decoupling capacitors close to their respective IC pin and as close as to PGND (do not place
components such that routing interrupts power stage currents). All small control signals must be routed
away from the high current paths.
5. The PCB must have a ground plane (return) connected directly to the return of all components through
vias (two vias per capacitor for power-stage capacitors, two vias for the IC PGND, one via per
capacitor for small-signal components). A star ground design approach is typically used to keep circuit
block currents isolated (high-power/low-power small-signal) which reduces noise-coupling and groundbounce issues. A single ground plane for this design gives good results. No ground-bounce issue
occurs with this small layout and a single ground plane. Having the components segregated minimizes
coupling between signals.
6. The high-current charge paths into VBUS, PMID, and from the SW pins must be sized appropriately for
the maximum charge current in order to avoid voltage drops in these traces. The PGND pins must be
connected to the ground plane to return current through the internal low-side FET.
8
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Bill of Materials, Board Layout, and Schematics
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4
Bill of Materials, Board Layout, and Schematics
4.1
Bill of Materials
Count
53A
56A
58
RefDes
Value
Description
Size
Part Number
MFR
1
1
1
1
1
C1
1 µF
Capacitor, Ceramic, X5R, 16V, ±10%
0603
GRM188R61C105K
Murata
1
1
1
1
1
C2
4.7 µF
Capacitor, Ceramic, X7R, 16V, ±10%
0805
GRM21BR71C475K
Murata
1
1
1
1
1
C3
10 µF
Capacitor, Ceramic, X5R, 10V, ±10%
0805
Std
Std
2
2
2
2
2
C4, C5
1 µF
Capacitor, Ceramic, X5R, 10V, ±10%
0402
GRM155R61A105K
Murata
1
1
1
1
1
C6 (1)
0.033 µF
Capacitor, Ceramic, X5R, 16V, ±10%
0402
GRM155R61C333KA01D
Murata
2
2
2
2
2
C7, C8
0.1 µF
Capacitor, Ceramic, X7R, 16V, ±10%
0402
GRM155R71C104K
Murata
1
1
1
1
1
C9
47 µF
Capacitor, Ceramic, X5R, 10V,±10%
1210
GRM32ER61A476KE20L
Murata
1
1
1
1
1
D1
Green
Diode, LED, Green, 2.1-V, 20-mA, 6-mcd
0603
LTST-C190GKT
Lite On
1
1
1
1
1
D2
BAT54C
Diode, Dual Schottky, 200-mA, 30-V
SOT23
BAT54C
Vishay-Liteon
1
1
1
1
1
J1
ED555/2DS
Terminal Block, 2-pin, 6-A, 3.5mm
0.27 x 0.25 inch
ED555/2DS
OST
3
3
3
3
3
J2, J3, J4
ED555/3DS
Terminal Block, 3-pin, 6-A, 3.5mm
0.41 x 0.25 inch
ED555/3DS
OST
1
1
1
1
1
J5
N2510-6002-RB
Connector, Male Straight 2x5 pin, 100mil spacing, 4 Wall
0.338 x 0.788 inch
N2510-6002-RB
3M
3
3
3
3
3
JP1, JP2, JP4
PEC03SAAN
Header, Male 3-pin, 100mil spacing,
0.100 inch x 3
PEC03SAAN
Sullins
2
2
2
2
2
JP3, JP5
PEC02SAAN
Header, Male 2-pin, 100mil spacing,
0.100 inch x 2
PEC02SAAN
Sullins
0
1
0
0
1
L1
1 µH
2.5mmx2mm, 1.0uH, ±30%, 1.6A
0.11x0.09 inch
LQM2HPN1R0MJ0 or CP1008
Murata or InterTechnical
1
0
1
1
0
L1
1 µH
2.5mmx2mm, 1.0uH, ±30%, 1.3A
0.11x0.09 inch
LQM2HPN1R0MJ0 or MDT2520CN1R0M or CP1008
Murata or TOKO or
Inter-Technical
1
1
1
1
1
R1
0.068
Resistor, Chip, 125mW, 5%
0402
ERJ-2BWJR068X
Panasonic
1
1
1
1
1
R2
5.1k
Resistor, Chip, 1/16-W, 5%
0603
Std
Std
1
1
1
1
1
R3
10k
Resistor, Chip, 1/16-W, 5%
0603
Std
Std
2
2
2
2
2
R4, R5
200
Resistor, Chip, 1/16-W, 5%
0603
Std
Std
0
0
0
0
0
TP1–TP7
Open
Test Point, 0.020 Hole"
1
0
0
0
0
U1
BQ24153AYFF
IC, Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery
WCSP
BQ24153AYFF
TI
0
1
0
0
0
U1
BQ24156AYFF
IC, Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery
WCSP
BQ24156AYFF
TI
0
0
1
0
0
U1
BQ24158YFF
IC, Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery
WCSP
BQ24158YFF
TI
0
0
0
1
0
U1
BQ24157YFF
IC, Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery
WCSP
BQ24157YFF
TI
0
0
0
0
1
U1
BQ24159YFF
IC, Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery
WCSP
BQ24159YFF
TI
4
4
4
4
4
929950-00
Shorting jumper, 2-pin, 100mil spacing
929950-00
3M/ESD
1
1
1
1
1
PCB, 2.0 In x 2.0 In x 0.031 In
HPA697
Any
(1)
57
59
–
PCBs prior to revision C have a 0.01 µF capacitor installed
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Bill of Materials, Board Layout, and Schematics
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TABLE 1
4.2
ASSEMBLY NO.
TEXT
HPA697-001
BQ24153AEVM-697
HPA697-002
BQ24156AEVM-697
HPA697-003
BQ24158EVM-697
HPA697-004
BQ24157EVM-697
HPA697-005
BQ24159EVM-697
Board Layout
Figure 5. Top Layer
10
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Bill of Materials, Board Layout, and Schematics
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Figure 6. Bottom Layer
Figure 7. Top Assembly
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Bill of Materials, Board Layout, and Schematics
Schematic
12
bq24153A/56A/57/58/59 Fully Integrated, Switch-Mode, One-Cell, Li-Ion
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0.033mF
4.3
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Revision History
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Revision History
Changes from B Revision (September 2012) to C Revision .......................................................................................... Page
•
•
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Revision History
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NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
SLUU453C – November 2010 – Revised May 2013
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