BQ24314CDSGT

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 bq24314C Overvoltage and Overcurrent Protection IC and Li+ Charger Front-End Protection IC 1 Features 3 Description • The bq24314C device is a highly integrated circuit (IC) designed to provide protection to Li-ion batteries from failures of the charging circuit. The device continuously monitors the input voltage, the input current, and the battery voltage. In case of an input overvoltage condition, the device immediately removes power from the charging circuit by turning off an internal switch. In the case of an overcurrent condition, it limits the system current at the threshold value, and if the overcurrent persists, switches the pass element OFF after a blanking period. Additionally, the device also monitors its own die temperature and switches off if it exceeds 140°C. The input overcurrent threshold is user-programmable. 1 • • • • • • • Provides Protection for Three Variables: – Input Overvoltage, with Rapid Response in 4.4 V 4.4 4.45 4.5 V Vhys(Bovp) Hysteresis on BVOVP CE = Low, VIN > 4.4 V 200 280 350 mV IVBAT Input bias current on VBAT pin VBAT = 4.4 V, TJ = 25°C 10 nA TDGL(Bovp) Deglitch time, battery overvoltage detected CE = Low, VIN > 4.4 V. Time measured from VVBAT rising from 4.1 V to 4.4 V to FAULT going low. μs 176 THERMAL PROTECTION TJ(OFF) Thermal shutdown temperature TJ(OFF-HYS) Thermal shutdown hysteresis 140 150 20 °C °C LOGIC LEVELS ON CE VIL Low-level input voltage 0 0.4 V VIH High-level input voltage IIL Low-level input current VCE = 0 V 1 μA IIH High-level input current VCE = 1.8 V 15 μA 1.4 V LOGIC LEVELS ON FAULT VOL Output low voltage ISINK = 5 mA 0.2 V IHI-Z Leakage current, FAULT pin HI-Z VFAULT = 5 V 10 μA (1) Not tested in production. Specified by design. Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 5 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com 6.6 Typical Characteristics Test conditions (unless otherwise noted) for typical operating performance: VIN = 5 V, CIN = 1 μF, COUT = 1 μF, RILIM = 24.9 kΩ, RBAT = 100 kΩ, TA = 25°C, VPU = 3.3 V (see Figure 12 for the Typical Application Circuit) 280 2.75 260 2.7 VIN Increasing 240 VIN = 4 V 220 VDO @ 1A - mV VUVLO, VHYS-UVLO - V 2.65 2.6 2.55 200 VIN = 5 V 180 160 2.5 140 VIN Decreasing 2.45 2.4 -50 120 100 -30 -10 10 30 50 70 Temperature - °C 90 110 0 130 50 100 150 Temperature - °C Figure 1. Undervoltage Lockout vs Free-Air Temperature Figure 2. Dropout Voltage (IN to OUT) vs Free-Air Temperature 5.88 1600 1400 5.86 5.84 1000 VIN Increasing IOCP - mA VOVP, VHYS-OVP - V 1200 5.82 800 600 400 5.8 VIN Decreasing 5.78 -50 -30 -10 10 30 50 70 90 200 110 0 0 130 10 20 30 40 Temperature - °C Figure 3. Overvoltage Threshold Protection vs Free-Air Temperature 50 60 RILIM - kW 70 80 90 100 Figure 4. Input Overcurrent Protection vs ILIM Resistance 4.5 985 984 4.45 BVOVP (VBAT Increasing) 983 4.4 981 BVOVP - V IOCP - mA 982 980 4.35 4.3 979 4.25 978 977 BVOVP Recovery (VBAT Decreasing) 4.2 976 975 -50 -30 -10 10 30 50 70 Temperature - °C 90 110 130 -30 -10 10 30 50 70 90 110 130 Temperature - °C Figure 5. Input Overcurrent Protection vs Free-Air Temperature 6 4.15 -50 Figure 6. Battery Overvoltage Protection vs Free-Air Temperature Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C bq24314C www.ti.com SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 Typical Characteristics (continued) Test conditions (unless otherwise noted) for typical operating performance: VIN = 5 V, CIN = 1 μF, COUT = 1 μF, RILIM = 24.9 kΩ, RBAT = 100 kΩ, TA = 25°C, VPU = 3.3 V (see Figure 12 for the Typical Application Circuit) 2.5 900 800 2 IDD, ISTDBY - mA 1.5 IVBAT - nA IDD (CE = Low) 700 1 600 500 400 300 200 0.5 ISTDBY (CE = High) 100 0 -50 -30 -10 10 30 50 70 Temperature - °C 90 110 130 0 0 5 10 15 20 25 30 35 VIN - V Figure 7. Leakage Current (VBAT Pin) vs Free-Air Temperature Figure 8. Supply Current vs INPUT Voltage Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 7 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com 7 Detailed Description 7.1 Overview The bq24314C device is a highly integrated circuit designed to provide protection to Li-ion batteries from failures of the charging circuit. The device continuously monitors the input voltage, the input current, and the battery voltage. In case of an input overvoltage condition, the device immediately removes power from the charging circuit by turning off an internal switch. In the case of an overcurrent condition, it limits the system current at the threshold value, and if the overcurrent persists, switches the pass element OFF after a blanking period. If the battery voltage rises to an unsafe level, the device disconnects power from the charging circuit until the battery voltage returns to an acceptable value. Additionally, the device also monitors its own die temperature and switches off if it exceeds 140°C. The input overcurrent threshold is user-programmable. The device can be controlled by a processor and also provides status information about fault conditions to the host. 7.2 Functional Block Diagram Q1 IN Charge Pump, Bandgap, Bias Gen OUT VBG ISNS ILIM ILIMREF Current limiting loop OFF OCP comparator ILIMREF - Δ t BLANK(OCP) ISNS FAULT VIN VBG COUNTERS, CONTROL, AND STATUS OVP VIN CE VBG t DGL(PGOOD) UVLO VBAT THERMAL SHUTDOW VBG t DGL(BOVP) VSS 8 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C bq24314C www.ti.com SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 7.3 Feature Description 7.3.1 Input Overvoltage Protection The bq24314C device integrates an input overvoltage protection feature to protect downstream devices from faulty input sources. If the input voltage rises above VOVP, the internal FET Q1 is turned off, removing power from the circuit. As shown in Figure 15 to Figure 16, the response is very rapid, with the FET turning off in less than a microsecond. The FAULT pin is driven low. When the input voltage returns below VOVP – Vhys(OVP) (but is still above UVLO), the FET Q1 is turned on again after a deglitch time of tON(OVP) to ensure that the input supply has stabilized. Figure 17 shows the recovery from input OVP. 7.3.2 Input Overcurrent Protection The overcurrent threshold is programmed by a resistor RILIM connected from the ILIM pin to VSS. Figure 4 shows the OCP threshold as a function of RILIM, and may be approximated by the following equation: IOCP = 25 ÷ RILIM (current in A, resistance in kΩ), where • RILIM must be between 15 kΩ and 90 kΩ (1) If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and reapplying input power, or by disabling and re-enabling the device with the CE pin. Figure 18 to Figure 20 show what happens in an overcurrent fault. To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly, resulting in a soft-stop, as shown in Figure 20. 7.3.3 Battery Overvoltage Protection The battery overvoltage threshold BVOVP is internally set to 4.45 V. If the battery voltage exceeds the BVOVP threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery voltage drops to BVOVP – Vhys(Bovp) (see Figure 21 and Figure 22). Each time a battery overvoltage fault occurs, an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 21). 7.3.4 Thermal Protection If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS). 7.3.5 Enable Function The IC has an enable pin, which can be used to enable or disable the device. When the CE pin is driven high, the internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the CE pin is high. 7.3.6 Fault Indication The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of these events occurs: • Input overvoltage • Input overcurrent • Battery overvoltage • IC overtemperature Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 9 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com 7.4 Device Functional Modes 7.4.1 OPERATION Mode The device continuously monitors the input voltage, the input current, and the battery voltage. As long as the input voltage is less than VOVP, the output voltage tracks the input voltage (less the drop caused by RDSON of Q1). During fault conditions, the internal FET is turned off and the output is isolated from the input source. 7.4.2 POWER-DOWN Mode The device remains in POWER-DOWN mode when the input voltage at the IN pin is below the undervoltage threshold UVLO. The FET Q1 connected between IN and OUT pins is off, and the status output, FAULT, is set to Hi-Z. See Figure 9. 7.4.3 POWER-ON RESET Mode The device resets when the input voltage at the IN pin exceeds the UVLO threshold. All internal counters and other circuit blocks are reset. The IC then waits for duration tDGL(PGOOD) for the input voltage to stabilize. If, after tDGL(PGOOD), the input voltage and battery voltage are safe, FET Q1 is turned ON. The device has a soft-start feature to control the inrush current. The soft-start minimizes the ringing at the input (the ringing occurs because the parasitic inductance of the adapter cable and the input bypass capacitor form a resonant circuit). Figure 13 shows the power-up behavior of the device. Because of the deglitch time at power-on, if the input voltage rises rapidly to beyond the OVP threshold, the device will not switch on at all, instead it will go into protection mode and indicate a fault on the FAULT pin, as shown in Figure 14. 10 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C bq24314C www.ti.com SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 Device Functional Modes (continued) Power Down All IC functions OFF FAULT = HiZ V(IN) > V(UVLO) ? Any State if V(IN) < V (UVLO), go to Power Down No Any State if CE = Hi, go to Reset Yes Reset Timers reset Counters reset FAULT = HiZ FET off No CE = Low ? V(IN) < V(OVP) ? Turn off FET FAULT = Low No No CE = Hi ? Yes Go to Reset Yes No I < IOCP ? No Turn off FET FAULT = Low Incr OCP counter Wait tREC(OCP) count UVLO – Vhys(UVLO) + RDS(on) × IACCESSORY. Within this voltage range, the reverse current capability is the same as the forward capability, 1.5 A. It should be noted that there is no overcurrent protection in this direction. 8.2 Typical Application The typical values for an application are VOVP = 6.8 V, IOCP = 1000 mA, BVOVP = 4.45 V AC Adapter VDC 1 IN OUT 8 CIN GND COUT 1 mF 1 mF bq24080 Charger IC bq24314C RBAT SYSTEM VBAT 6 100 kW VPU RPU 47 kW 47 kW FAULT 4 RFAULT ILIM VSS 47 kW 7 2 CE 5 Host Controller RCE RILM Terminal numbers shown are for the 2 × 2 DSG package. Figure 12. Typical Application Circuit 8.2.1 Design Requirements For this design example, use the parameters listed in Table 1. Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Supply Voltage 5V INILIM 1A 8.2.2 Detailed Design Procedure 8.2.2.1 Selection of RBAT It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some failure modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as 30 V, and applying 30 V to the battery in case of the failure of the bq24314C device can be hazardous. Connecting the VBAT pin through RBAT prevents a large current from flowing into the battery in case of a failure of the device. In the interests of safety, RBAT should have a very high value. The problem with a large RBAT is that the voltage drop across this resistor because of the VBAT bias current IVBAT causes an error in the BVOVP threshold. This error is over and above the tolerance on the nominal 4.45 V BVOVP threshold. Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 13 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com Choosing RBAT in the range 100 kΩ to 470 kΩ is a good compromise. In the case of an device failure, with RBAT equal to 100 kΩ, the maximum current flowing into the battery would be (30 V – 3 V) ÷ 100 kΩ = 246 μA, which is low enough to be absorbed by the bias currents of the system components. RBAT equal to 100 kΩ would result in a worst-case voltage drop of RBAT × IVBAT = 1 mV. This is negligible to compared to the internal tolerance of 50 mV on BVOVP threshold. If the Bat-OVP function is not required, the VBAT pin should be connected to VSS. 8.2.2.2 Selection of RCE, RFAULT, and RPU The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to ground or left un-connected, permanently enabling the device. In applications where external control is required, the CE pin can be controlled by a host processor. As in the case of the VBAT pin (see above), the CE pin should be connected to the host GPIO pin through as large a resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the drop across the resistor should be greater than VIH of the bq24314C device's CE pin. The drop across the resistor is given by RCE × IIH. The FAULT pin is an open-drain output that goes low during OV, OC, battery-OV, and OT events. If the application does not require monitoring of the FAULT pin, it can be left unconnected. But if the FAULT pin has to be monitored, it should be pulled high externally through RPU, and connected to the host through RFAULT. RFAULT prevents damage to the host controller if the bq24314C device fails (see above). The resistors should be of high value, in practice values between 22 kΩ and 100 kΩ should be sufficient. 8.2.2.3 Selection of Input and Output Bypass Capacitors The input capacitor CIN in Figure 12 is for decoupling, and serves an important purpose. Whenever there is a step change downwards in the system load current, the inductance of the input cable causes the input voltage to spike up. CIN prevents the input voltage from overshooting to dangerous levels. It is strongly recommended that a ceramic capacitor of at least 1 μF be used at the input of the device. It should be located in close proximity to the IN pin. COUT in Figure 12 is also important: If a very fast (< 1 μs rise time) overvoltage transient occurs at the input, the current that charges COUT causes the device’s current-limiting loop to kick in, reducing the gate-drive to FET Q1. This results in improved performance for input overvoltage protection. COUT should also be a ceramic capacitor of at least 1 μF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging circuit downstream of the protection IC. 14 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C bq24314C www.ti.com SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 8.2.3 Application Curves VIN VIN VOUT VOUT IOUT FAULT ROUT = 6.6Ω VIN = 0V to 9V Figure 13. Normal Power-On Showing Soft-Start tr = 50μs Figure 14. OVP at Power-On VIN VIN Max VOUT = 5.92 V Max VOUT = 5.84 V VOUT VOUT FAULT VIN = 5V to 12V FAULT tr = 1μs VIN = 5V to 12V Figure 15. OVP Response for Input Step tr = 20μs Figure 16. OVP Response for Input Step VIN VIN VOUT IOUT IOUT VOUT FAULT FAULT VIN = 7.5V to 5V tf = 400μs Figure 17. Recovery from OVP OCP Counter Counts to 15 Before Switching OFF Device Figure 18. Powering Up into a Short Circuit on OUT Pin Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 15 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com VIN VIN VOUT IOUT IOUT VOUT FAULT FAULT ROUT Switches from 6.6 Ω to 3.3 Ω Figure 19. OCP, Zoom-in on the First Cycle of Figure 18 Figure 20. OCP, Current Limiting and Soft-Stop VOUT VVBAT Begin soft-stop VOUT VVBAT tDGL(BAT-OVP) = 220 ms FAULT FAULT VVBAT Steps from 4.2 V to 4.4 V VVBAT Cycles Between 4.1 V and 4.4 V Figure 21. BAT-OVP, tDGL(BAT-OVP) and Soft-Stop 16 Submit Documentation Feedback Figure 22. BAT-OVP, BAT-OVP Counter Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C bq24314C www.ti.com SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 9 Power Supply Recommendations The intention is for the bq24314C device to operate with 5-V adapters with a maximum current rating of 1.5 A. The device operates from sources from 3 V to 5.7 V. Outside of this range, the output is disconnected due to either UVLO or the OVP function. 10 Layout 10.1 Layout Guidelines • • • This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages. Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of PCB traces satisfy the design rules for high voltages. See Figure 23. The device uses WSON packages with a thermal pad. For good thermal performance, the thermal pad must be thermally coupled with the PCB ground plane (GND). This requires a copper pad directly under the device. This copper pad should be connected to the ground plane with an array of thermal vias. Ensure that external CIN and COUT are located close to the device. Other external components like RILIM and RBAT must also be located close to the device. 10.2 Layout Example GND BAT+ /FAULT GND GND ILIM VIN VBAT GND VOUT Figure 23. Layout Example Recommendation Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C 17 bq24314C SLUSAV3A – AUGUST 2012 – REVISED JULY 2015 www.ti.com 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.2 Trademarks E2E is a trademark of Texas Instruments. Bluetooth is a trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: bq24314C PACKAGE OPTION ADDENDUM www.ti.com 19-Nov-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) BQ24314CDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 SDL Samples BQ24314CDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 SDL Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of