Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
SMBus-Controlled Multi-Chemistry Battery Charger With Input
Current Detect Comparator and Charge Enable Pin
Check for Samples: bq24745
UGAT
PHAS
DCIN
27
26
25
24
23
22
ICREF
1
21
VDDP
ACIN
2
20
LGATE
VREF
3
19
PGND
EAO
4
18
CSOP
EAI
5
17
CSON
FBO
6
16
NC
CE
7
15
VFB
8
9
10
11
12
13
14
NC
bq24745
28 LD QFN
TOP VIEW
ACOK
•
•
28
GND
•
The bq24745 is a high-efficiency, synchronous
battery charger with an integrated input-current
comparator, offering low component count for
space-constrained, multi-chemistry battery-charging
applications. The input-current, charge-current, and
charge-voltage DACs allow very high regulation
accuracies that can be easily programmed by the
system power-management microcontroller using the
SMBus interface. The bq24745 charges two, three, or
four series Li+ cells, and is available in a 28-pin,
5-mm × 5 mm QFN package.
BOOT
•
DESCRIPTION
VDDSMB
•
•
•
Notebook and Ultra-Mobile Computers
Portable Data-Capture Terminals
Portable Printers
Medical Diagnostics Equipment
Battery Bay Chargers
Battery Backup Systems
ICOUT
•
•
•
•
•
•
•
SCL
•
APPLICATIONS
CSSN
•
•
SDA
•
NMOS-NMOS Synchronous Buck Converter
with 300-kHz Frequency and >95% Efficiency
30-ns Minimum Driver Dead-Time and 99.5%
Maximum Effective Duty Cycle
High-Accuracy Voltage and Current Regulation
– ±0.5% Charge Voltage Accuracy
– ±3% Charge Current Accuracy
– ±3% Adapter Current Accuracy
– ±2% Input Current Sense Amp Accuracy
Integration
– Input Current Comparator, With Adjustable
Threshold and Hysteresis
– Internal Soft-Start
Safety
– Dynamic Power Management (DPM)
Up to 19.2-V Battery Voltage
7-V–24-V AC/DC-Adapter Operating Range
Simplified SMBus Control Interface
– Charge Voltage DAC (1.024 V–19.2 V)
– Charge Current DAC (128 mA–8.064 A)
– Adapter Current Limit DPM DAC (256
mA–11.008 A)
Status and Monitoring Outputs
– AC/DC Adapter Present With Adjustable
Voltage Threshold
– Input Current Comparator With Adjustable
Threshold and Hysteresis
– Current Sense Amplifier for Current Drawn
From Input Source
Charge Any Battery Chemistry: Li+, NiCd,
NiMH, Lead Acid, Etc.
Charge Enable Pin
< 10-μA Battery Current With Adapter
Removed
< 1-mA Input DCIN Current With Adapter
Present and Charge Disabled
28-Pin, 5-mm × 5-mm QFN Package
CSSP
•
•
VICM
FEATURES
1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2011, Texas Instruments Incorporated
Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The bq24745 features dynamic power management (DPM) and input power limiting. These features reduce
battery-charge current when the input power limit is reached to avoid overloading the ac adaptor when supplying
the load and the battery charger simultaneously. A highly accurate current-sense amplifier enables precise
measurement of input current from the ac adapter, allowing monitoring the overall system power. If the adapter
current is above the programmed low-power threshold, a signal is sent to host so that the system optimizes its
performance to the power available from the adapter. An integrated comparator monitors the input current
through the current-sense amplifier, and indicates when the input current exceeds a programmable threshold
limit.
TYPICAL APPLICATIONS
VIN = 20 V, VBAT = 4-cell Li-Ion, ICHARGE = 4.5 A
Q1 (ACFET)
SI4835BDY
Q2 (RBFET)
SI4835BDY
ADAPTER +
CHRG_IN
RC1
2.2Ω
P
ADAPTER -
Controlled by
HOST
C6
1u
309k
1%
C2
0.1u
C3
0.1u
27
CSSN
28
CSSP
22
DCIN
2
R2
49.9k
1%
12
ACIN
GND
bq24745
+3.3V_ALWAYS
OR
+5V_ALWAYS
11
VDDSMB
UGATE
24
PHASE
23
BOOT
25
D1
R3
10k
DISCRETE
LOGIC
R10
10k
R11
10k
VDDP
C4
13
ACOK
3
VREF
1uF
ICOUT
Dig I/O
7
CE
9
SDA
10
SCL
8
VICM
14
NC
SMBus
100pF
21
LGATE
20
PGND
19
CSOP
18
VFB
C5
PACK+
C13
2x10u
5.6uH
PACK-
C10
0.1uF
C8
1u
CSON
R12
10k
DISCRETE
LOGIC
BAT54
RSR
0.010
L1
C7
0.1uF
Q4
FDS6680A
C9
0.1uF
26
HOST
(EC)
Q3
FDS6680A
N
RC6
10Ω
R1
C15
10uF
C14
10uF
N
C1
2.2u
RAC
0.010
P
16
NC
17
15
R22
100 Ω
ICREF
1
EAO
4
EAI
5
FBO
6
C23
51pF
C17
0.1uF
R19
7.5k
C21
2000pF
R21
200k
R20
20k
C22
130pF
(1) Pullup rail could be either VREF or other system rail.
Figure 1. Typical System Schematic Using External Input-Current Comparator (Discrete Logic) Instead of
Internal Comparator
2
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Copyright © 2007–2011, Texas Instruments Incorporated
Product Folder Link(s) :bq24745
Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
VIN = 20 V, VBAT = 4-cell Li-Ion, ICHARGE = 4.5 A, VICMer_limit = 6 A, for ICOUT Input Current comparator.
Q1 (ACFET) Q2 (RBFET)
SI4435
SI4435
ADAPTER +
CHRG_IN
RC1
P
2.2Ω
ADAPTER -
RC6
10Ω
C1
2.2u
P
Controlled by
HOST
C2
C6
1uF
R1
464k
1%
RAC
0.010
0.1uF
C15
10uF
C14
10uF
C3 0.1uF
27 CSSN
28 CSSP
22 DCIN
ACIN
bq24745
+3.3V_ALWAYS
OR
+5V_ALWAYS
PHASE 23
BOOT
11 VDDSMB
R3
10k
Q3
FDS6680A
UGATE 24
12 GND
N
2
R2
33.2k
1%
25
D1
C16
1u
BAT54
L1
C7
0.1uF
PACK+
VDDP 21
C8
R10
10k
R11
10k
C4
VREF
LGATE
20
PGND
19
CSOP
18
CSON
17
1uF
Q4
FDS6680A
C9
0.1uF
26 ICOUT
R12
10k
HOST
(EC)
PACK-
C10
0.1uF
1uF
N
3
R4
10k
C13
2x10uF
5.6uH
13 ACOK
DISCRETE
LOGIC
RSR
0.010
VFB 15
R22
100Ω
Dig I/O
7
CE
ICREF
9
SMBus
1
SDA
VREF
R7
200k
C17
0.1uF
R8
200k
10 SCL
8
DISCRETE
LOGIC
C5
100pF
VICM
EAO
4
EAI
5
FBO
6
C23
51pF
14 NC
16 NC
R19
7.5k
C21
2000pF
R20
20k
R21
200k
C22
130pF
R18
(1) Pullup rail could be either VREF or other system rail.
1400k
Figure 2. Typical System Schematic Using Internal Input-Current Comparator
ORDERING INFORMATION
PART NUMBER
PACKAGE
bq24745
28-pin 5-mm × 5-mm QFN
ORDERING NUMBER
(Tape and Reel)
QUANTITY
bq24745RHDR
3000
bq24745RHDT
250
PACKAGE THERMAL DATA
(1)
PACKAGE
θJA
TA = 40°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
QFN – RHD (1)
36°C/W
2.36 W
0.028 W/°C
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
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Copyright © 2007–2011, Texas Instruments Incorporated
Product Folder Link(s) :bq24745
3
Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
Table 1. PIN FUNCTIONS – 28-PIN QFN
PIN
NO.
4
FUNCTION
NAME
1
ICREF
Input-current comparator voltage reference input. Connect a resistor divider from VREF to ICREF and from ICREF to
GND to program the reference for the ICOUT comparator. The ICREF pin voltage is compared to the VICM pin
voltage and the logic output is given on the ICOUT open-drain pin. Connecting a positive feedback resistor from the
ICREF pin to the ICOUT pin programs the hysteresis.
2
ACIN
Adapter-detected voltage-set input. Program the adapter-detect threshold by connecting a resistor divider from the
adapter input to ACIN pin to GND. Adapter voltage is detected if the ACIN-pin voltage is greater than 2.4 V. The VICM
current-sense amplifier, ICOUT comparator, and ACOK output are active when the ACIN pin voltage is greater than
0.6 V.
3
VREF
3.3-V regulated voltage output. Place a 1-μF ceramic capacitor from VREF to the GND pin close to the IC. This
voltage could be used for ratiometric programming of voltage and current regulation and for programming the ICREF
threshold.
4
EAO
Error amplifier output for compensation. Connect the feedback-compensation components from EAO to EAI. Typically,
a capacitor in parallel with a series resistor and capacitor. This node is internally compared to the PWM sawtooth
oscillator signal.
5
EAI
Error amplifier input for compensation. Connect the feedback compensation components from EAI to EAO. Connect
the input compensation from FBO to EAI.
6
FBO
Feedback output for compensation. Connect the input compensation from FBO to EAI. Typically, a resistor in parallel
with a series resistor and capacitor.
7
CE
Charge enable active-high logic input. HI enables charge. LO disables charge.
8
VICM
Adapter current-sense-amplifier output. The VICM voltage is 20 times the differential voltage across CSSP-CSSN.
Place a 100-pF (max) or less ceramic decoupling capacitor from VICM to GND.
9
SDA
SMBus data input. Connect to the SMBus data line from the host controller. A 10-kΩ pullup resistor to the host
controller power rail is needed.
10
SCL
SMBus clock input. Connect to the SMBus clock line from the host controller. A 10-kΩ pullup resistor to the host
controller power rail is needed.
11
VDDSMB
Input voltage for SMBus logic. Connect a 3.3-V supply rail or 5-V rail to the VDDSMB pin. Connect a 0.1-μF ceramic
capacitor from VDDSMB to GND for decoupling.
12
GND
Analog ground. On PCB layout, connect to the analog ground plane, and only connect to PGND through the thermal
pad underneath the IC.
13
ACOK
Valid adapter active-high detect logic open-drain output. Pulled HI when Input voltage is above the ACIN programmed
threshold. Connect a 10-kΩ pullup resistor from the ACOK pin to pull up the supply rail.
14
NC
No connect. Pin floating internally.
15
VFB
Battery-voltage remote sense. Directly connect a Kelvin sense trace from the battery-pack positive terminal to the VFB
pin to sense the battery pack voltage accurately. Place a 0.1-μF capacitor from VFB to GND close to the IC to filter
high-frequency noise.
16
NC
No Connect. Pin floating internally.
17
CSON
Charge-current sense resistor, negative input. An optional 0.1-μF ceramic capacitor is placed from the CSON pin to
GND for common-mode filtering. A 0.1-μF ceramic capacitor is placed from CSON to CSOP to provide
differential-mode filtering.
18
CSOP
Charge-current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from CSOP pin to GND for
common-mode filtering. A 0.1-μF ceramic capacitor is placed from CSON to CSOP to provide differential-mode
filtering.
19
PGND
Power ground. On PCB layout, connect directly to the source of the low-side power MOSFET, and to the to ground
connection of the input and output capacitors of the charger. Only connect to GND through the thermal pad
underneath the IC.
20
LGATE
PWM low-side driver output. Connect to the gate of the low-side power MOSFET with a short trace.
21
VDDP
PWM low-side driver positive 6-V supply output. Connect a 1-μF ceramic capacitor from VDDP to the PGND pin, close
to the IC. Use for high-side driver bootstrap voltage by connecting a small signal Schottky diode from VDDP to BOOT.
22
DCIN
IC-power positive supply. Connect to the common-source (diode-OR) point: source of high-side P-channel MOSFET
and source of reverse blocking power P-channel MOSFET. Place a 1-μF ceramic capacitor from DCIN to the GND pin
close to the IC. Place a 10-Ω resistor from the adapter input to the DCIN pin to limit inrush current.
23
PHASE
PWM high-side driver negative supply. Connect to the phase-switching node (junction of the low-side power MOSFET
drain, high-side power MOSFET source, and output inductor). Connect the 0.1-μF bootstrap capacitor from PHASE to
BOOT.
24
UGATE
PWM high-side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
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Copyright © 2007–2011, Texas Instruments Incorporated
Product Folder Link(s) :bq24745
Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
Table 1. PIN FUNCTIONS – 28-PIN QFN (continued)
PIN
NO.
FUNCTION
NAME
25
BOOT
PWM high-side driver positive supply. Connect a 0.1-μF bootstrap ceramic capacitor from BOOT to PHASE. Connect
a small bootstrap Schottky diode from VDDP to BOOT.
26
ICOUT
Input-current comparator active-high open-drain logic output. Place a 10-kΩ pullup resistor from the ICOUT pin to the
pullup voltage rail. Place a positive-feedback resistor from the ICOUT pin to the ICREF pin for programming
hysteresis. The output is HI when the VICM pin voltage is lower than the ICREF pin voltage. The output is LO when
VICM pin voltage is higher than ICREF pin voltage.
27
CSSN
Adapter current-sense resistor, negative input. An optional 0.1-μF ceramic capacitor is placed from the CSSN pin to
GND for common-mode filtering. A 0.1-μF ceramic capacitor is placed from CSSN to CSSP to provide
differential-mode filtering.
28
CSSP
Adapter current-sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from the CSSP pin to GND for
common-mode filtering. A 0.1-μF ceramic capacitor is placed from CSSN to CSSP to provide differential-mode
filtering.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
(2)
VALUE
–0.3 to 30
DCIN, CSOP, CSON, CSSP, CSSN, VFB, ACOK
Voltage range
UNIT
PHASE
–1 to 30
EAI, EAO, FBO, VDDP, LGATE, ACIN, VICM, ICOUT, ICREF, CE
–0.3 to 7
VDDSMB, SDA, SCL
–0.3 to 6
V
–0.3 to 3.6
VREF
–0.3 to 36
BOOT, UGATE with respect to GND and PGND
Maximum difference voltage: CSOP–CSON, CSSP–CSSN
–0.5 to 0.5
Junction temperature range
–40 to 155
°C
Storage temperature range
–55 to 155
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND if not specified. Currents are positive into, and negative out of the specified terminal. Consult
Packaging Section of the data book for thermal limitations and considerations of packages.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
Voltage range
NOM
MAX
–0.7
24
DCIN, CSOP, CSON, CSSP, CSSN, VFB, ACOK
0
24
VDDP, LGATE
0
6.5
PHASE
VREF
3.3
5.5
UNIT
V
EAI, EAO, FBO, ACIN, VICM, ICOUT, ICREF, CE
0
BOOT, UGATE with respect to GND and PGND
0
30
VDDSMB, SDA, SCL
0
5.5
Maximum difference voltage: CSOP–CSON, CSSP–CSSN
–0.3
0.3
Junction temperature range
–40
125
°C
Storage temperature range
–55
150
°C
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5
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bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
7 V ≤ VDCIN ≤ 24 V, 0°C < TJ < 125°C, typical values are at TA = 25°C, with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OPERATING CONDITIONS
VDCIN_OP
DCIN input-voltage operating range
7
24
V
DCIN
V
16.884
V
CHARGE VOLTAGE REGULATION
VVFB_OP
VFB input-voltage range
0
16.716
ChargeVoltage() = 0x41A0
–0.5%
12.529
ChargeVoltage() = 0x3130
VVFB_REG
_ACC
VFB charge-voltage regulation accuracy
8.350
4.154
TJ = 0 to 125°C, 1.024 V–19.2 V, Max DAC
value is 19.2 V
Charge-voltage regulation range
12.592
12.655
V
0.5%
8.4
–0.6%
ChargeVoltage() = 0x1060
RNG
0.5%
–0.5%
ChargeVoltage() = 0x20D0
VVFB_REG_
16.8
8.450
V
0.6%
4.192
4.230
V
–0.9%
0.9%
1.024
19.2
V
0
80.64
mV
CHARGE CURRENT REGULATION
VIREG_CHG_RNG
Charge-current regulation differential-voltage
range
VIREG_CHG = VCSOP – VCSON, max. DAC value
is 80.64 mV
3968
ChargeCurrent() = 0x0F80
–3%
2048
ChargeCurrent() = 0x0800
ICHRG_REG_ACC
mA
3%
–5%
Charge-current regulation accuracy
mA
5%
512
ChargeCurrent() = 0x0200
–25%
mA
25%
128
ChargeCurrent() = 0x0080
mA
–33%
33%
0
110.1
INPUT CURRENT REGULATION
VIREG_DPM_RNG
Adapter-current regulation differential-voltage
range
VIREG_DPM = VCSSP – VCSSN, max. DAC value
is 110.084 mV
InputCurrent() ≥ 0x0800
InputCurrent() = 0x0400
IINPUT_REG_ACC
Input-current regulation accuracy
InputCurrent() = 0x0100
InputCurrent() = 0x0080
4096
–3%
mV
mA
3%
2048
–5%
mA
5%
512
–25%
mA
25%
256
–33%
mA
33%
VREF REGULATOR
VVREF_REG
VREF regulator voltage
VACIN > 0.6 V, 0 – 30 mA
IVREF_LIM
VREF current limit
VVREF = 0 V, VACIN > 0.6 V
35
VACIN > 0.6 V, 0 – 50 mA
5.7
VVDDP = 0 V, VACIN > 0.6 V
90
VVDDP = 5 V, VACIN > 0.6 V
80
3.267
3.3
3.333
V
80
mA
6.3
V
VDDP REGULATOR
VVDDP_REG
IVDDP_LIM
6
VDDP regulator voltage
VDDP current limit
Submit Documentation Feedback
6
135
mA
Copyright © 2007–2011, Texas Instruments Incorporated
Product Folder Link(s) :bq24745
Not Recommended for New Designs (NRND)
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
7 V ≤ VDCIN ≤ 24 V, 0°C < TJ < 125°C, typical values are at TA = 25°C, with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADAPTER CURRENT SENSE AMPLIFIER
VCSSP/N_OP
Input common-mode range
VVICM
VICM output-voltage range
IVICM
VICM output current
AVICM
Current-sense amplifier voltage gain
Voltage on CSSP/CSSN
0
24
V
0
2.25
V
0
AVICM = VVICM/ VIREG_DPM
Adapter-current sense accuracy
1
20
VIREG_DPM = V(CSSP–CSSN) ≥ 40 mV
–2%
VIREG_DPM = V(CSSP–CSSN) = 20 mV
–3%
3%
VIREG_DPM = V(CSSP–CSSN) = 5 mV
–25%
25%
VIREG_DPM = V(CSSP–CSSN) = 1.5 mV
–33%
33%
IVICM_LIM
Output-current limit
VVICM = 0 V
CVICM_MAX
Maximum output load capacitance
For stability with 0-mA to 1-mA load
mA
V/V
2%
1
mA
100
pF
24
V
ACIN COMPARATOR INPUT UNDERVOLTAGE)
–20
VDCIN_VFB_OP
Differential voltage from DCIN to VFB
VACIN_CHG
ACIN rising threshold
Min. voltage to enable charging, VACIN rising
VACIN_CHG_HYS
ACIN falling hysteresis
VACIN falling
ACIN rising deglitch (1)
VACIN rising
ACIN falling deglitch
VACIN falling
VACIN_BIAS
Adapter present rising threshold
Min voltage to enable all bias, VACIN rising
VACIN_BIAS_HYS
Adapter present falling hysteresis
VACIN falling
20
VACIN rising
200
VACIN falling
1
ACIN rising deglitch
(1)
ACIN falling deglitch
2.376
2.4
2.424
40
50
100
150
0.62
μs
μs
1
0.56
V
mV
0.68
V
mV
μs
DCIN / VFB COMPARATOR (REVERSE DISCHARGING PROTECTION)
VDCIN-VFB_FALL
DCIN to VFB falling threshold
VDCIN-VFB__HYS
DCIN to VFB hysteresis
VDCIN – VVFB to turn off ACFET
140
185
240
mV
50
mV
DCIN to VFB rising deglitch
VDCIN – VVFB > VDCIN-VFB_RISE
1
ms
DCIN to VFB falling deglitch
VDCIN – VVFB < VDCIN-VFB_FALL
3.3
μs
VFB OVERVOLTAGE COMPARATOR
VOV_RISE
Overvoltage rising threshold
As percentage of VVFB_REG
104
VOV_FALL
Overvoltage falling threshold
As percentage of VVFB_REG
102
%
VFB SHORT (UNDERVOLTAGE and TRICKLE CHARGE) COMPARATOR
VVFB_SHORT_RISE VFB short rising threshold
VVFB_SHORT_HYS
2.6
VFB short falling hysteresis
VVFB > VVFB_SHORT + VVFB_SHORT_HYS
Detection delay
VFB short rising deglitch
VFB short falling deglitch
VVFB < VVFB_SHORT
ITRKL_REG_ACC
Trickle-charge current-regulation accuracy in
BATSHORT
VVFB < VVFB_SHORT
ILOW_MAX_REG
Maximum charge current regulation at low
voltage ( 5 V, 0°C ≤ TJ ≤ 85°C
IBAT_ON
Battery on-state quiescent current
IBAT_LOAD_CD
7
10
μA
VVFB = 16.8 V, 0.6V < VACIN < 2.4 V,
VDCIN > 5 V
0.7
1
mA
Internal battery load current, charge disabled
Charge is disabled: VVFB = 16.8 V,
VACIN > 2.4 V, VDCIN > 5 V
0.7
1
mA
IBAT_LOAD_CE
Internal battery load current, charge enabled
Charge is enabled: VVFB = 16.8 V,
VACIN > 2.4 V, VDCIN > 5 V
10
12
mA
IAC
Adapter quiescent current
Charge disabled, VDCIN = 20 V
0.7
1
mA
Adapter switching quiescent current
Charge enabled, VDCIN = 20 V, converter
running
25
mA
IAC_SWITCH
6
INTERNAL SOFT START (8 Steps to Regulation Current ICHG)
Soft-start steps
Soft-start step time
8
step
1.5
ms
1.5
ms
CHARGER SECTION POWER-UP SEQUENCING
Charge-enable delay after power up
Delay from when adapter is detected to when
the charger is allowed to turn on
CHARGE UNDERCURRENT COMPARATOR (CYCLE-BY-CYCLE SYNCHRONOUS TO NON-SYNCHRONOUS)
VUCP
Cycle-by-cycle synchronous to
non-synchronous transition threshold
Cycle-by-cycle, (CSOP-CSON) voltage,
falling, LGATE turns off and latches off until
next cycle
Blankout time after LGATE turns on
Blankout comparator after LGATE turns on
5
10
15
100
mV
ns
LOGIC INPUT PIN CHARACTERISTICS (CE) (2) Pull-up CE with ≥2.2 kΩ resistor or directly to VREF.
VIN_LO
Input low-threshold voltage
VIN_HI
Input high-threshold voltage
VBIAS
Input bias current
0.8
V
1
μA
0.5
V
5.5
V
2.1
V = 0 TO VVDDP
OPEN-DRAIN LOGIC OUTPUT PIN CHARACTERISTICS (ACOK, ICOUT)
VOUT_LO
Output low saturation voltage
Sink current = 5 mA
VDDSMB INPUT SUPPLY FOR SMBus
VVDDSMB_RANGE
VDDSMB input voltage range
VVDDSMB_UVLO_
VDDSMB undervoltage lockout threshold
voltage, rising
VVDDSMB rising
2.4
2.5
2.6
V
VDDSMB undervoltage lockout hysteresis
voltage, falling
VVDDSMB falling
100
150
200
V
Threshold_Rising
VVDDSMB_UVLO_
Hyst_Rising
(2)
8
2.7
Pull up CE with ≥ 2-kΩ resistor, or connect directly to VREF.
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ELECTRICAL CHARACTERISTICS (continued)
7 V ≤ VDCIN ≤ 24 V, 0°C < TJ < 125°C, typical values are at TA = 25°C, with respect to AGND (unless otherwise noted)
PARAMETER
IVDDSMB_Iq
VDDSMB quiescent current
TEST CONDITIONS
MIN
VVDDSMB = SCL = SDA = 5.5 V, 0°C ≤ TJ ≤
85°C
TYP
MAX
20
27
UNIT
μA
ELECTRICAL CHARACTERISTICS
7 Vdc ≤ V(VCC) ≤ 24 Vdc, –20°C 4.5 V, and VDDSMB >2.5 V)
• Adapter is detected (ACIN > 2.4 V).
• Adapter – Battery voltage is higher than the VDCIN-VFB comparator threshold.
• 200-μs delay is complete after adapter detection.
• SMBus ChargeVoltage(),ChargeCurrent() and InputCurrent() DAC registers are inside the valid range.
• CE is HIGH.
• 2-ms delay is complete after adapter is detected and CE goes HIGH.
• VDDP and VREF are valid.
• Not in thermal shutdown (TSHUT)
Any of the following conditions stops ongoing charging:
• SMBus ChargeVoltage(), ChargeCurrent(), or InputCurrent() DAC register is outside the valid range.
• CE is LOW.
• Adapter is removed (DCIN 0.6 V. To enable VDDP requires DCIN > 4.5 V, ACIN > 2.4 V, and CE = HIGH.
VDDP GATE DRIVE REGULATOR
An integrated low-dropout (LDO) linear regulator provides a 6-V supply derived from DCIN for high efficiency,
and delivers over 90 mA of load current. The LDO powers the gate drivers of the n-channel switching MOSFETs.
Bypass VDDP to PGND with a 1-µF or greater ceramic capacitor. During thermal shutdown, the VDDP LDO is
disabled.
INPUT CURRENT COMPARATOR TRIP DETECTION
In order to optimize the system performance, the host monitors the adapter current. Once the adapter current is
above a threshold set via ICREF, the ICOUT pin sends a signal to the HOST. The signal alarms the host that
input power has exceeded the programmed limit, allowing the host to throttle back system power by reducing
clock frequency, lowering rail voltages, or disabling certain parts of the system. The ICOUT pin is an open-drain
output. Connect a pullup resistor to ICOUT. The output is logic HI when the VICM output voltage (VICM = 20 ×
VCSSP-CSSN) is lower than the ICREF input voltage. The ICREF threshold is set by an external resistor divider
using VREF. The hysteresis can be programmed by a positive feedback resistor from the ICOUT pin to the
ICREF pin.
26
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ACIN
ACOK
Comparator
ACOK
+
2.4V
CSSP
1k
CSSN
ACOK
VICM
Current Sense
Amplifier
+
-
VICM
Error
Amplifier
Disable
20k
+
VICM
VICM
Disable
Program Hysteresis of
comparator
by putting a resistor in feedback
from ICOUT pin to ICREF pin.
Input Current
Comparator
ICREF
+
-
ICOUT
Figure 36. ACOK, ICREF, and ICOUT Logic
OPEN-DRAIN STATUS OUTPUTS (ACOK, ICOUT PINS)
Two status outputs are available; both require external pullup resistors to pull the pins to the system digital rail for
a high level.
The ACOK open-drain output goes high when ACIN is above 2.4 V. It indicates that a functional adapter is
providing a valid input voltage.
The ICOUT open-drain output goes low when the input current is higher than the threshold programmed via the
ICREF pin. Hysteresis can be programmed by adding a resistor from the ICREF pin to the ICOUT pin.
THERMAL SHUTDOWN PROTECTION
The QFN package has low thermal impedance, which provides good thermal conduction from the silicon to the
ambient, to keep the junction temperature low. As an added level of protection, the charger converter turns off
and self-protects whenever the junction temperature exceeds the TSHUT threshold of 155°C. VDDP LDO is
disabled as well during thermal shutdown. The charger stays off until the junction temperature falls below 135°C.
Once the temperature drops below 135°C, the VDDP LDO is enabled. If all the conditions described in the
Enable and Disable Charging section are valid, charge soft-starts again.
CHARGER TIME-OUT
The bq24745 includes a timer to terminate charging if the charger does not receive a ChargeVoltage() or
ChargeCurrent() command within 170 s. If a time-out occurs, both ChargeVoltage() and ChargeCurrent()
commands must be resent to re-enable charging.
CHARGE TERMINATION FOR Li-Ion OR Li-Polymer
The primary termination method for Li-Ion and Li-Polymer is minimum current. Secondary temperature
termination (see the Charge Current Regulation section) also provides additional safety. The host controls the
charge initiation and the termination. A battery pack gas gauge assists the hosts on setting the voltages and
determining when to terminate based on the battery-pack state of charge.
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REMOTE SENSE
The bq24745 has a dedicated remote sense pin, VFB, which allows the rejection of board resistance and
selector resistance. To use remote sensing fully, connect VFB directly to the battery interface through an
unshared battery-sense Kelvin trace, and place a 0.1-μF ceramic capacitor near the VFB pin to GND (see
Figure 1).
Remote Kelvin sensing provides higher regulation accuracy by eliminating parasitic voltage drops. Remote
sensing cancels the effect of impedance in series with the battery. This impedance normally causes the battery
charger to enter constant-voltage mode prematurely.
Component List for Typical System Circuit of Figure 2
Part Designator
Qty
Description
Q1, Q2,
3
P-channel MOSFET, –30-V, –7.5-A, SO-8, Vishay-Siliconix, Si4435
Q3, Q4
2
N-channel MOSFET, 30-V, 12.5-A, SO-8, Fairchild, FDS6680A
RAC, RSR
2
Sense resistor, 10-mW, 2010, Vishay-Dale, WSL2010R0100F
L1
1
Inductor, 5.6-uH, 7-A, 31-mΩ Vishay, IHLP2525CZ01-2R
D1
1
Diode, dual Schottky, 30-V, 200-mA, SOT23, Fairchild, BAT54C
C1
1
Capacitor, ceramic, 2.2-µF, 35-V, 10%, X7R
C6
1
Capacitor, ceramic, 1-µF, 35-V, 10%, X7R
2xC13, C14, C15
4
Capacitor, ceramic, 10-µF, 35-V, 20%, X5R, 1206, Panasonic, ECJ-3YB1E106M
C6, C16, C4, C8
4
Capacitor, ceramic, 1-µF, 25-V, 10%, X7R, 2012, TDK, C2012X7R1E105K
C2, C3, C7, C9, C10, C17
6
Capacitor, ceramic, 0.1-µF, 50-V, 10%, X7R, 0805, Kemet, C0805C104K5RACTU
C5
1
Capacitor, ceramic, 100- pF, 25-V, 10%, X7R, 0805, Kemet
C23
1
Capacitor, ceramic, 51-pF, 25-V, 10%, X7R, 0805, Kemet
C21
1
Capacitor, ceramic, 2000-pF, 25-V, 10%, X7R, 0805, Kemet
C22
1
Capacitor, ceramic, 130-pF, 25-V, 10%, X7R, 0805, Kemet
R3, R4, R10, R11, R12
5
Resistor, chip, 10-kΩ, 1/16-W, 5%, 0402
R1
1
Resistor, chip, 309-kΩ, 1/16-W, 1%, 0402
R2
1
Resistor, chip, 49.9-kΩ, 1/16-W, 1%, 0402
RC1
1
Resistor, thick film chip paralleling, 2× 3.9-Ω, 25-V, 1210
RC6
1
Resistor, thick film chip , 10-Ω, 1206
R19
1
Resistor, chip, 7.5-kΩ, 1/16-W, 5%, 0402
R20
1
Resistor, chip, 20-kΩ, 1/16-W, 1%, 0402
R21
1
Resistor, chip, 200-kΩ, 1/16-W, 5%, 0402
R22
1
Resistor, chip, 100-Ω, 1/16-W, 1%, 0402
R7, R8
2
Resistor, chip, 200-kΩ, 1/16-W, 1%, 0402
R18
1
Resistor, chip, 1.4-MΩ, 1/16-W, 1%, 0402
28
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GLOSSARY
VICM Output Voltage of Input Current Monitor
ICREF
DPM
Input Current Reference - sets the threshold for the input current limit
Dynamic Power Management
CSOP, CSON Current Sense Output of battery positive and negative
These pins are used with an external low-value series resistor to monitor the current to and
from the battery pack.
CSSP, CSSN Current Sense Supply positive and negative
These pins are used with an external low-value series resistor to monitor the current from
the adapter supply.
POR
Power-on reset
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SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
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REVISION HISTORY
NOTE: Page numbers of previous versions may differ from the current version.
Changes from Original (December 2007) to Revision A
Page
•
Changed The data sheet title From: SMBus-Controlled Multi-Chemistry Battery Charger With Input Current Detect
Comparator To: SMBus-Controlled Multi-Chemistry Battery Charger With Input Current Detect Comparator and
Charge Enable Pin ................................................................................................................................................................ 1
•
Deleted Features Bullet: Cells Pin Supports Two to Four Li-Ion Cells ................................................................................. 1
•
Deleted Condition above Figure 1: VICMer_limit = 6 A ............................................................................................................ 2
•
Added text to the condition above Figure 2: "for ICOUT Input Current comparator" ........................................................... 3
•
Changed ICREF text in the PIN FUNCTIONS table From: Input current comparator voltage reference input. Connect
a resistor-divider from VREF to ICREF, and GND to program the reference for the LOPWR comparator To: Input
current comparator voltage reference input. Connect a resistor-divider from VREF to ICREF, and GND to program
the reference for the ICOUT comparator .............................................................................................................................. 4
Changes from Revision A (October 2008) to Revision B
Page
•
Deleted "Level 2" from title ................................................................................................................................................... 1
•
Deleted "Input Overvoltage Protection (OVP)" Features bullet ............................................................................................ 1
•
Changed Feature bullet from "6 V-24 V" to "7 V-24 V" ........................................................................................................ 1
•
Changed "10-μ" to "10-μA" Battery Current .......................................................................................................................... 1
•
Changed last sentence of first paragraph of DESCRIPTION by deleting "one," from the text string. .................................. 1
•
Changed Figure 1 graphic entity ........................................................................................................................................... 2
•
Changed Figure 2 graphic entity ........................................................................................................................................... 3
•
Changed TA from "70°C" to "40°C" in the Package Thermal Data table. ............................................................................. 3
•
Changed θJA from "39°C/W" to "36°C/W" in the Package Thermal Data table. .................................................................... 3
•
Changed "ACOUT" to "ICOUT" and deleted "ICREF input" from Pin 2 functional description. ........................................... 4
•
Deleted "optional" from Pins 17, 18, 27, and 28 functional description in the Pin Functions table. ..................................... 4
•
Added text to Pin 22 functional description. ......................................................................................................................... 4
•
Changed Pin 22 functional description from "100-Ω" resistor to "10-Ω" resistor in the Pin Functions table. ....................... 4
•
Added "ACOK" specification to first row of Absolute Maximum Ratings table. .................................................................... 5
•
Added "SDA" and "SCL" specification to fourth row of Absolute Maximum Ratings table, and changed maximum
voltage from "7 V" to "6 V" .................................................................................................................................................... 5
•
Deleted "GND" and "PGND" specification from Absolute Maximum Ratings table .............................................................. 5
•
Added "ACOK" specification to Recommended Operating Conditions table ........................................................................ 5
•
Added "VDDSMB", "SDA", and "SCL" specifications to Recommended Operating Conditions table .................................. 5
•
Changed VFB SHORT (....) COMPARATOR specification parameter text from ""VFB short rising hysteresis" to "VFB
short falling hysteresis" ......................................................................................................................................................... 7
•
Changed Functional Block Diagram graphic entity ............................................................................................................. 17
•
Changed Detailed Description -- re-write for clarification ................................................................................................... 18
•
Changed Figure 33 graphic entity ....................................................................................................................................... 19
•
Changed Figure 34 graphic entity legend ........................................................................................................................... 19
•
Changed Figure 35 graphic entity legend ........................................................................................................................... 20
•
Changed Figure 36 graphic entity ....................................................................................................................................... 27
•
Deleted "Q5" from Component List table. ........................................................................................................................... 28
•
Added description for C1 and C6 in the Component List table. ......................................................................................... 28
•
Changed "R9" to "R19" in Component List ......................................................................................................................... 28
•
Added R20 to Component List ............................................................................................................................................ 28
30
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•
Changed "R11" to "R21" in Component List ....................................................................................................................... 28
•
Added R22 to Component List ............................................................................................................................................ 28
Changes from Revision B (April 2010) to Revision C
•
Page
Changed Table 5 , Bit 7 description from "128mA" to "256mA"; Bit 8 description from "256mA" to "512mA"; Bit 9
description from "512mA" to "1024mA"; Bit 10 description from "1024mA" to "2048mA"; Bit 11 description from
"2048mA" to "4096mA"; and Bit 12 description from "4096mA" to "8192 mA". .................................................................. 22
Changes from Revision C (April 2011) to Revision D
Page
•
Corrected pin numbers on pins CSSN, CSSP, CSON, and CSOP in Figure 1 .................................................................... 2
•
Corrected pin numbers on pins CSSN, CSSP, CSON, and CSOP in Figure 2 .................................................................... 3
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ24745RHDR
NRND
VQFN
RHD
28
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
0 to 0
BQ
24745
BQ24745RHDT
NRND
VQFN
RHD
28
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
0 to 0
BQ
24745
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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