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bq25100B
SLUSCG5A – MAY 2016 – REVISED JULY 2016
bq25100B 250-mA Single Cell Li-Ion Battery Chargers, 1-mA Termination,
75-nA Battery Leakage
1 Features
3 Description
•
The bq25100B device is a highly integrated Li-Ion
and Li-Pol linear charger targeted at space-limited
portable applications. The high input voltage range
with input overvoltage protection supports low-cost
unregulated adapters.
1
•
•
Charging
– 1% Charge Voltage Accuracy
– 10% Charge Current Accuracy
– Supports Applications for Very Low Charge
Currents - 10 mA to 250 mA
– Supports Minimum 1-mA Charge Termination
Current
– Ultra Low Battery Output Leakage Current Maximum 75 nA
– Adjustable Termination and Precharge
Threshold
– High voltage Chemistry Support: 4.30 V
Protection
– 30-V Input Rating; with 6.5-V Input
Overvoltage Protection
– Input Voltage Dynamic Power Management
– 125°C Thermal Regulation; 150°C Thermal
Shutdown Protection
– OUT Short-Circuit Protection and ISET Short
Detection
– Fixed 10 Hour Safety Timer
System
– Automatic Termination and Timer Disable
Mode (TTDM) for Absent Battery Pack
– Available in Small 1.60 mm × 0.90 mm
DSBGA Package
The bq25100B has a single power output that
charges the battery. A system load can be placed in
parallel with the battery as long as the average
system load does not keep the battery from charging
fully during the 10 hour safety timer.
The battery is charged in three phases: conditioning,
constant current and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if an internal temperature threshold is exceeded.
The charger power stage and charge current sense
functions are fully integrated. The charger function
has high accuracy current and voltage regulation
loops and charge termination. The pre-charge current
and termination current threshold are programmed
via an external resistor on the bq25100B. The fast
charge current value is also programmable via an
external resistor.
References to other devices in the bq25100B family
are included in this document. For more information
on those devices, please see their respective
datasheets. This includes references to the CHG pin
and the JEITA temperature functionality.
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
bq25100B
Fitness Accessories
Smart Watches
Bluetooth® Headsets
Low-Power Handheld Devices
PACKAGE
DSBGA (6)
BODY SIZE (NOM)
1.60 mm × 0.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Diagram
SYSTEM
USB Port or
Adapter
VBUS
IN
D+
D-
OUT
1ÛF
1ÛF
VSS
GND
PACK+
TS
ISET
1.35kŸ
TEMP
HOST
PRETERM
PACK-
6kŸ
bq25100B
CE
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq25100B
SLUSCG5A – MAY 2016 – REVISED JULY 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1 Absolute Maximum Ratings .....................................
7.2 ESD Ratings..............................................................
7.3 Recommended Operating Conditions......................
7.4 Thermal Information ..................................................
7.5 Electrical Characteristics..........................................
7.6 Typical Characteristics ..............................................
4
4
4
5
5
9
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
12
14
15
18
9
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application .................................................. 22
10 Power Supply Recommendations ..................... 24
10.1 Leakage Current Effects on Battery Capacity....... 24
11 Layout................................................................... 25
11.1 Layout Guidelines ................................................. 25
11.2 Layout Example .................................................... 25
11.3 Thermal Considerations ........................................ 26
12 Device and Documentation Support ................. 27
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support ....................................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
27
27
27
27
27
27
27
13 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
Changes from Original (May 2016) to Revision A
Page
•
Changed IOUT(SC) values From: 9, 11, 13 To: 10, 12, 14 in the Electrical Characteristics table ............................................. 5
•
Changed IPRE-TERM values From: 23, 25, 27 To: 24.25, 26.25, 28.25 in the Electrical Characteristics table .......................... 6
•
Changed the INTC-10k values From: 48.5, 50.5, 52.5 To: 50.5, 52.5, 54.5 in the Electrical Characteristics table ................... 7
•
Changed the INTC-DIS-10k values From: 27, 30, 33 To: 28, 31, 34 in the Electrical Characteristics table ................................ 7
•
Changed the VTS-0°C values From: 1230, 1255, 1280 To: 1225, 1250, 1275 in the Electrical Characteristics table ............. 7
•
Changed the VTS-45°C values From: 253, 268, 283 To: 255, 267, 279 in the Electrical Characteristics table ........................ 7
•
Changed the VTS-EN-10k values From: 84, 92, 100 To: 83, 91, 99 in the Electrical Characteristics table ............................... 8
2
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bq25100B
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SLUSCG5A – MAY 2016 – REVISED JULY 2016
5 Device Comparison Table
PART NUMBER
VO(REG)
VOVP
PreTerm /CHG
TS
bq25100
4.20 V
6.5 V
PreTerm
TS (JEITA)
bq25101
4.20 V
6.5 V
CHG
TS (JEITA)
TS
bq25100A
4.30 V
6.5 V
PreTerm
bq25100B (1)
4.284 V
6.5 V
PreTerm
TS
bq25100H
4.35 V
6.5 V
PreTerm
TS (JEITA)
bq25101H
4.35 V
6.5 V
CHG
TS (JEITA)
4.06 V
6.5 V
PreTerm
TS
bq25100L
(1)
(2)
(2)
The bq25100B is part of the bq25100 family of devices. Please see Device Support for viewing other devices.
Product preview. Contact the local TI representative for device details.
6 Pin Configuration and Functions
YFP Package
6-Pin DSBGA
Top View
1
2
A
OUT
IN
B
TS
ISET
C
PRETERM
VSS
Pin Functions
PIN
NAME
NUMBER
I/O
DESCRIPTION
IN
A2
I
Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass
capacitors 1 μF to 10 μF, connect from IN to VSS.
ISET
B2
I
Programs the fast-charge current setting. External resistor from ISET to VSS defines fast charge
current value. Recommended range is 13.5 kΩ (10 mA) to 0.54 kΩ (250 mA).
OUT
A1
O
Battery Connection. System Load may be connected. Expected range of bypass capacitors 1 μF to
10 μF.
PRE-TERM
C1
I
Programs the current termination threshold ( 1% to 50% of IOUT, 1 mA minimum). The pre-charge
current is twice the termination current level.
Expected range of programming resistor is 600 Ω to 30 kΩ (6k: ICHG/10 for term; ICHG/5 for
precharge)
TS
B1
I
Temperature sense pin connected to 10k at 25°C NTC thermistor, in the battery pack. Floating TS
pin or pulling high puts part in TTDM Charger mode and disables TS monitoring, Timers and
Termination. Pulling pin low disables the IC. If NTC sensing is not needed, connect this pin to VSS
through an external 10-kΩ resistor. A 250-kΩ resistor from TS to ground will prevent IC entering
TTDM mode when battery with thermistor is removed.
VSS
C2
–
Ground pin
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bq25100B
SLUSCG5A – MAY 2016 – REVISED JULY 2016
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7 Specifications
7.1
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage
MIN
MAX
UNIT
IN (with respect to VSS)
–0.3
30
V
OUT (with respect to VSS)
–0.3
7
V
PRE-TERM, ISET, TS, CHG
(with respect to VSS)
–0.3
7
V
Input current
IN
300
mA
Output current (continuous)
OUT
300
mA
Output sink current
CHG
15
mA
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Pins A1, A2, B1 (2)
±8000
IEC61000-4-2 air-gap discharge (1)
Pins A1, A2, B1 (2)
±15000
UNIT
V
The test was performed on IC pins that may potentially be exposed to the customer at the product level. The bq2510x IC requires a
minimum of the listed capacitance, external to the IC, to pass the ESD test.
1 µF between IN (pin A2) and GND,
1 µF between TS (pin B1) and GND,
2 µF between OUT (pin A1) and GND,
x5R ceramic or equivalent
7.3
see
Electrostatic
discharge
IEC61000-4-2 contact discharge (1)
Recommended Operating Conditions
(1)
MIN
IN voltage
VIN
IN operating voltage, restricted by VDPM and VOVP
IIN
Input current, IN pin
IOUT
Current, OUT pin
RPRE-TERM
Programs precharge and termination current thresholds
RISET
NOM
UNIT
3.5
28
4.45
6.45
V
V
250
mA
250
mA
0.6
30
kΩ
Fast-charge current programming resistor
0.54
13.5
kΩ
RTS
10k NTC thermistor range without entering BAT_EN or TTDM
1.66
258
kΩ
TJ
Junction temperature
–5
125
°C
(1)
4
Operation with VIN less than 4.5V or in drop-out may result in reduced performance.
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SLUSCG5A – MAY 2016 – REVISED JULY 2016
7.4 Thermal Information
bq25100B
THERMAL METRIC (1)
YFP (DSBGA)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
132.9
°C/W
RθJCtop
RθJB
Junction-to-case (top) thermal resistance
1.3
°C/W
Junction-to-board thermal resistance
21.8
°C/W
ψJT
Junction-to-top characterization parameter
5.6
°C/W
ψJB
Junction-to-board characterization parameter
21.8
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5
Electrical Characteristics
Over junction temperature range –5°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3.15
3.3
3.45
V
INPUT
Undervoltage lockout exit
VIN: 0 V → 4 V
VHYS_UVLO
Hysteresis on VUVLO_RISE falling
VIN: 4 V→0 V;
VUVLO_FALL = VUVLO_RISE – VHYS-UVLO
VIN-DT
Input power good detection
threshold is VOUT + VIN-DT
Input power good if VIN > VOUT + VIN-DT;
VOUT = 3.6 V; VIN: 3.5 V → 4 V
VHYS-INDT
Hysteresis on VIN-DT falling
VOUT = 3.6 V; VIN: 4 V → 3.5 V
31
mV
tDGL(PG_PWR)
Deglitch time on exiting sleep
Time measured from VIN: 0 V → 5 V 1-μs risetime to charge enables; VOUT = 3.6 V
29
ms
tDGL(PG_NO-PWR)
Deglitch time on VHYS-INDT power
down. Same as entering sleep.
Time measured from VIN: 5 V → 3.2 V 1-μs falltime to charge disables; VOUT = 3.6 V
29
ms
VOVP
Input over-voltage protection
threshold
VIN: 5 V → 12 V
tDGL(OVP-SET)
Input over-voltage blanking time
VIN: 5 V → 12 V
113
μs
VHYS-OVP
Hysteresis on OVP
VIN: 11 V → 5 V
110
mV
tDGL(OVP-REC)
Deglitch time exiting OVP
Time measured from VIN: 12 V → 5 V 1-μs falltime to charge enables
450
μs
VIN-DPM
Low input voltage protection.
Restricts lout at VIN-DPM
Limit input source current to 50 mA;
VOUT = 3.5 V; RISET = 1.35 kΩ
UVLO
263
15
6.50
4.25
60
6.65
mV
130
6.84
mV
V
4.31
4.37
V
426
470
Ω
ISET SHORT CIRCUIT TEST
RISET_SHORT
Highest resistor value considered RISET: 540 Ω → 250 Ω, Iout latches off;
a fault (short).
Cycle power to reset
tDGL_SHORT
Deglitch time transition from ISET Clear fault by disconnecting IN or cycling (high /
short to Iout disable
low) TS/BAT_EN
IOUT_CL
Maximum OUT current limit
regulation (Clamp)
1
ms
VIN = 5 V; VOUT = 3.6 V; RISET: 540 Ω → 250 Ω;
IOUT latches off after tDGL-SHORT
550
600
650
mA
0.75
0.8
0.85
V
BATTERY SHORT PROTECTION
VOUT(SC)
OUT pin short-circuit detection
threshold/ precharge threshold
VOUT:3 V → 0.5 V; No deglitch
VOUT(SC-HYS)
OUT pin Short hysteresis
Recovery ≥ VOUT(SC) + VOUT(SC-HYS); Rising; No
deglitch
IOUT(SC)
Source current to OUT pin during
short-circuit detection
77
10
12
mV
14
mA
QUIESCENT CURRENT
VIN = 0 V; 0°C to 125°C
80
VIN = 0 V; 0°C to 85°C
50
IOUT(PDWN)
Battery current into OUT pin
IOUT(DONE)
OUT pin current, charging
terminated
VIN = 6 V; VOUT > VOUT(REG)
IIN(STDBY)
Standby current into IN pin
TS = GND; VIN ≤ 6 V
Active supply current, IN pin
TS = open, VIN = 6 V;
TTDM – no load on OUT pin; VOUT > VOUT(REG);
IC enabled
ICC
0.75
6
μA
125
μA
1
mA
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Electrical Characteristics (continued)
Over junction temperature range –5°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TJ = -5°C to 125°C; IOUT = 0 mA to 250 mA;
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C (bq25100B)
4.25
4.284
4.305
TJ = -5°C to 55°C; IOUT = 10mA to 75 mA;
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C (bq25100B)
4.266
4.284
4.305
UNIT
BATTERY CHARGER FAST-CHARGE
VOUT(REG)
Output voltage
IOUT(RANGE)
Programmed output “fast charge”
current range
VOUT(REG) > VOUT > VLOWV; VIN = 5 V;
RISET = 0.54 kΩ to 13.5 kΩ
VDO(IN-OUT)
Drop-Out, VIN – VOUT
Adjust VIN down until IOUT = 0.2 A; VOUT = 4.15 V;
RISET = 680 Ω; TJ ≤ 100°C
IOUT
Output “fast charge” formula
VOUT(REG) > VOUT > VLOWV; VIN = 5 V
KISET
Fast charge current factor
V
10
240
250
mA
400
mV
KISET/RISET
A
RISET = KISET /IOUT; 20 < IOUT < 250 mA
129
135
145
RISET = KISET /IOUT; 5 < IOUT < 20 mA
125
135
145
2.4
2.5
2.6
AΩ
PRECHARGE – SET BY PRETERM PIN
VLOWV
Pre-charge to fast-charge
transition threshold
tDGL1(LOWV)
Deglitch time on pre-charge to
fast-charge transition
57
μs
tDGL2(LOWV)
Deglitch time on fast-charge to
pre-charge transition
32
ms
IPRE-TERM
Refer to the Termination Section
%PRECHG
Pre-charge current, default
setting
VOUT < VLOWV; RISET = 2.7 kΩ; RPRE-TERM= High Z
or for bq25101/101H
18
Pre-charge current formula
RPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%)
RPRE-TERM/KPRE-CHG%
KPRE-CHG
% Pre-charge Factor
20
22
V
%IOUTCC
VOUT < VLOWV; VIN = 5 V;
RPRE-TERM = 6 kΩ to 30 kΩ;
RISET = 1.8 kΩ;
RPRE-TERM = KPRE-CHG × %IPRE-CHG,
where %IPRE-CHG is 20 to 100%
280
300
320
Ω/%
VOUT < VLOWV; VIN = 5 V;
RPRE-TERM = 3 kΩ to 6 kΩ;
RISET = 1.8 kΩ;
RPRE-TERM = KPRE-CHG × %IPRE-CHG,
where %IPRE-CHG is 10% to 20%
265
305
347
Ω/%
9
10
11
%IOUT-
TERMINATION – SET BY PRE-TERM PIN
%TERM
KTERM
Termination threshold current,
default setting
VOUT > VRCH; RISET = 2.7 kΩ; RPRE-TERM = High Z
or for bq25101/101H
Termination current threshold
formula
RPRE-TERM = KTERM (Ω/%) × %TERM (%)
% Term factor
RPRE-TERM/ KTERM
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 6 kΩ to 30 kΩ;
RISET = 1.8 kΩ, RPRE-TERM=KTERM × %ITERM,
where %ITERM is 10 to 50%
575
600
640
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 3 kΩ to 6 kΩ ;
RISET = 1.8 kΩ, RPRE-TERM= KTERM × %ITERM,
where %ITERM is 5 to 10%
555
620
685
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 750 Ω to 3 kΩ;
RISET = 1.8 kΩ, RPRE-TERM= KTERM × %ITERM,
where %ITERM is 1.25% to 5%
352
680
1001
24.25
26.25
28.25
IPRE-TERM
Current for programming the
term. and pre-chg with resistor,
ITerm-Start is the initial PRE-TERM
current
RPRE-TERM = 6 kΩ; VOUT = 4.15 V
ITERM
Termination current range
Minimum absolute termination current
%TERM
Termination current formula
tDGL(TERM)
Deglitch time, termination
detected
6
CC
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1
Ω/%
μA
mA
RTERM/ KTERM
%
29
ms
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SLUSCG5A – MAY 2016 – REVISED JULY 2016
Electrical Characteristics (continued)
Over junction temperature range –5°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
VO(REG)
–0.125
VO(REG)
–0.101
VO(REG)
–0.075
UNIT
RECHARGE OR REFRESH
VRCH
Recharge detection threshold –
normal temp
VIN = 5 V; VTS = 0.5 V; VOUT: 4.35 V → VRCH
tDGL1(RCH)
Deglitch time, recharge threshold
detected
VIN = 5 V; VTS = 0.5 V;
VOUT: 4.25 V → 3.5V in 1 μs;
tDGL(RCH) is time to ISET ramp
29
ms
tDGL2(RCH)
Deglitch time, recharge threshold
detected in OUT-Detect Mode
VIN = 5 V; VTS = 0.5 V;
VOUT = 3.5 V inserted;
tDGL(RCH) is time to ISET ramp
29
ms
V
BATTERY DETECT ROUTINE – (NOTE: In Hot mode VO(REG) becomes VO_HT(REG))
VREG-BD
VOUT reduced regulation during
battery detect
VIN = 5 V; VTS = 0.5 V; Battery absent
IBD-SINK
Sink current during VREG-BD
VIN = 5 V; VTS = 0.5 V; Battery absent
2
mA
VIN = 5 V; VTS = 0.5 V; Battery absent
25
ms
tDGL(HI/LOW REG)
Regulation time at VREG or VREGBD
VO(REG)0.550
VO(REG)0.500
VO(REG)0.450
V
VBD-HI
High battery detection threshold
VIN = 5 V; VTS = 0.5 V; Battery absent
VO(REG) 0.150
VO(REG)0.100
VO(REG)0.050
V
VBD-LO
Low battery detection threshold
VIN = 5 V; VTS = 0.5 V; Battery absent
VREG-BD
+0.05
VREG-BD
+0.1
VREG-BD
+0.15
V
1700
1940
2250
s
34000
38800
45000
s
50.5
52.5
54.5
μA
28
31
34
μA
4
5
6.5
μA
1550
1600
1650
mV
1900
1950
BATTERY CHARGING TIMERS AND FAULT TIMERS
tPRECHG
Pre-charge safety timer value
Restarts when entering pre-charge;
Always enabled when in pre-charge.
tMAXCH
Charge safety timer value
Clears fault or resets at UVLO, TS disable, OUT
Short, exiting LOWV and Refresh
BATTERY-PACK NTC MONITOR (see
(1)
); TS pin: 10k NTC
INTC-10k
NTC bias current
VTS = 0.3 V
INTC-DIS-10k
10k NTC bias current when
charging is disabled
VTS = 0 V
INTC-FLDBK-10k
INTC is reduced prior to entering
TTDM to keep cold thermistor
from entering TTDM
VTS: Set to 1.525 V
VTTDM(TS)
Termination and timer disable
mode Threshold – Enter
VTS: 0.5 V → 1.7 V; Timer held in reset
VHYS-TTDM(TS)
Hysteresis exiting TTDM
VTS: 1.7 V → 0.5 V; Timer enabled
VCLAMP(TS)
TS maximum voltage clamp
VTS = Open (float)
tDGL(TTDM)
Deglitch exit TTDM between
states
Deglitch enter TTDM between
states
VTS_I-FLDBK
TS voltage where INTC is reduce
to keep thermistor from entering
TTDM
CTS
Optional capacitance – ESD
VTS-0°C
Low temperature, charge
pending
Low temperature charging to pending;
VTS: 1 V → 1.5 V
VHYS-0°C
Hysteresis
At 0°C;
Charge pending to low temperature charging;
VTS: 1.5 V → 1 V
VTS-10°C
Low temperature, half charge
Normal charging to low temperature charging;
VTS: 0.5 V → 1 V
VHYS-10°C
Hysteresis
At 10°C;
Low temperature charging to normal charging;
VTS: 1 V → 0.5 V
VTS-45°C
High temperature
At 4.1V (bq25100/101) or 4.2V (bq25100H/101H);
Normal charging to high temperature charging;
VTS: 0.5 V → 0.2 V
(1)
100
INTC adjustment (90 to 10%; 45 to 6.6 uA) takes
place near this spec threshold;
VTS: 1.425 V → 1.525 V
1225
mV
2000
57
ms
8
μs
1475
mV
0.22
μF
1250
1275
100
775
800
267
mV
mV
830
55
255
mV
mV
mV
279
mV
In Hot mode VO(REG) becomes VO_HT(REG)
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Electrical Characteristics (continued)
Over junction temperature range –5°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
VHYS-45°C
Hysteresis
At 45°C;
High tempemperature charging to normal
charging;
VTS: 0.2 V → 0.5 V
VTS-60°C
High temperature disable
bq25100/01/100H/101H/100L;
High temperature charge to pending;
VTS: 0.2 V → 0.1 V
VHYS-60°C
Hysteresis
At 60°C (bq25100/01/100H/101H/100L);
Charge pending to high temperature charging;
VTS: 0.1 V → 0.2 V
20
tDGL(TS_10C)
Deglitch for TS thresholds: 10C
Normal to cold operation; VTS: 0.6 V → 1 V
50
Cold to normal operation; VTS: 1 V → 0.6 V
12
tDGL(TS)
Deglitch for TS thresholds:
0/45/60C
Battery charging
30
VTS-EN-10k
Charge enable threshold, (10k
NTC)
VTS: 0 V → 0.175 V
VTS-DIS_HYS-10k
HYS below VTS-EN-10k to disable,
(10k NTC)
VTS: 0.125 V → 0 V
MAX
20
160
83
170
91
UNIT
mV
180
mV
mV
ms
ms
99
mV
12
mV
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
125
°C
TJ(OFF)
Thermal shutdown temperature
155
°C
TJ(OFF-HYS)
Thermal shutdown hysteresis
20
°C
LOGIC LEVELS ON /CHG
VOL
Output low voltage
ISINK = 5 mA
ILEAK
Leakage current into IC
V CHG = 5 V
8
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0.4
V
1
μA
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7.6 Typical Characteristics
Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)
VIN
VIN 2 V/div
2 V/div
VOUT 2 V/div
VOUT
2 V/div
IOUT 60 mA/div
IOUT 60 mA/div
VISET 1 V/div
t-time – 20 ms/div
t-time – 10 ms/div
No Battery, No Load
Hot Plug
Figure 1. Power Up Timing
Figure 2. OVP 7-V Adaptor
VIN 2 V/div
VIN 2 V/div
VTS 500 mV/div
VOUT 2 V/div
IOUT 60 mA/div
IOUT 60 mA/div
VISET 1 V/div
VISET 1 V/div
t-time – 50 ms/div
t-time – 50 ms/div
VIN 0 V -5 V-7 V-5 V
Figure 3. OVP from Normal Power-Up Operation
Figure 4. TS Enable and Disable
VIN 1 V/div
VIN 5 V/div
IOUT 60 mA/div
VOUT 2 V/div
VOUT 2 V/div
IOUT 100 mA/div
VISET 1 V/div
VISET 1 V/div
t-time – 5 ms/div
t-time – 20 ms/div
VIN Regulated
Figure 5. DPM-Adaptor Current Limits
Figure 6. Hot Plug Source
with No Battery - Battery
Detection
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Typical Characteristics (continued)
Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)
VIN 5 V/div
VIN 5 V/div
IOUT 100 mA/div
VOUT 2 V/div
VOUT 2 V/div
VISET 1 V/div
VISET 1 V/div
IOUT 100 mA/div
t-time – 20 ms/div
t-time – 200 μs/div
No Load
Figure 7. Battery Removal
Figure 8.
ISET Shorted During Normal Operation
VIN 5 V/div
VIN 5 V/div
VOUT 5 V/div
VOUT 5 V/div
IOUT 100 mA/div
IOUT 100 mA/div
VISET 1 V/div
VISET 1 V/div
t-time – 10 ms/div
t-time – 10 ms/div
20-Ω resistor at OUT, No input, VBAT = 3.7 V
20-Ω resistor at OUT, No input, VBAT = 3.7 V
Figure 10. Battery Removal
Figure 9. Battery Plug In
VIN 2 V/div
VIN 2 V/div
VISET 2 V/div
VOUT 2 V/div
ILOAD 70 mA/div
IOUT 400 mA/div
VISET 1 V/div
IOUT 70 mA/div
t-time – 10 ms/div
t-time – 10 ms/div
90-mA Load, 120-mA ICHG
Figure 11. ISET Short Prior to Power Up
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Figure 12. Power Up
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Typical Characteristics (continued)
Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)
4.21
4.202
VREG = 0qC
VREG = 25qC
VREG = 85qC
VREG = 125qC
Regulation Voltage (V)
4.206
4.201
Regulation Voltage (V)
4.208
4.204
4.202
4.2
4.198
4.196
4.2
4.199
VREG = 0qC
VREG = 25qC
VREG = 85qC
VREG = 125qC
4.198
4.197
4.196
4.194
4.195
4.192
4.19
4.194
1 mA
10 mA 50 mA 100 mA 150 mA 200 mA 250 mA
4.5 V
D001
Load Current (mA)
5V
5.5 V
6V
6.5 V
D002
Input Voltage (V)
Figure 13. Load Regulation Over Temperature
Figure 14. Line Regulation Over Temperature
80
112
70
6.4
IOUT (mA)
VOUT (V) 5.6
60
4.8
50
4
40
3.2
30
2.4
20
1.6
10
0.8
110
109
108
IO = 0qC
IO = 25qC
IO = 85qC
IO = 125qC
107
0
106
2.5 V
3V
3.5 V
4V
Output Voltage (V)
Output Current (mA)
Output Current (mA)
111
0
4.1 V
D003
Output Voltage (V)
D004
bq25100 charge cycle, ICHG = 75 mA, VBAT_REG = 4.2 V
Figure 16. Battery Voltage vs Charge Current
Figure 15. Current Regulation Over Temperature
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8 Detailed Description
8.1 Overview
The bq25100B is a highly integrated family of single cell Li-Ion and Li-Pol chargers. The charger can be used to
charge a battery, power a system or both. The charger has three phases of charging: pre-charge to recover a
fully discharged battery, fast-charge constant current to supply the charge safely and voltage regulation to safely
reach full capacity. The charger is very flexible, allowing programming of the fast-charge current and Precharge/Termination Current. This charger is designed to work with a USB connection (100-mA limit) or Adaptor
(DC output). The charger also checks to see if a battery is present. The following discussion reviews all products
in the bq25100B family. Not all features apply to the bq25100B.
The charger also comes with a full set of safety features: JEITA Temperature Standard
(bq25100/01/100H/101H), Over-Voltage Protection, DPM-IN, Safety Timers, and ISET short protection. All of
these features and more are described in detail below.
The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or
Li-Pol battery pack. Upon application of a 5-V DC power source the ISET and OUT short checks are performed
to assure a proper charge cycle.
If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning
cycle begins. The amount of precharge current can be programmed using the PRE-TERM pin which programs a
percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system load
is connected across the battery “stealing” the battery current. The precharge current can be set higher to account
for the system loading while allowing the battery to be properly conditioned. The PRE-TERM pin is a dual
function pin which sets the precharge current level and the termination threshold level. The termination "current
threshold" is always half of the precharge programmed current level.
Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge
current is applied. The fast charge constant current is programmed using the ISET pin. The constant current
provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage.
If the IC reaches 125°C, the IC enters thermal regulation, slows the timer clock by half, and reduces the charge
current as needed to keep the temperature from rising any further. Figure 17 shows the charging profile with
thermal regulation. Typically under normal operating conditions, the IC’s junction temperature is less than 125°C
and thermal regulation is not entered.
Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the
regulation voltage until the current tapers to the termination threshold. The termination can be disabled if desired.
Further details are described in the Operating Modes section.
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Overview (continued)
PreConditioning
Phase
VO(REG)
Thermal
Regulation
Phase
Current
Regulation
Phase
Voltage Regulation and
Charge Termination
Phase
DONE
IO(OUT)
FAST-CHARGE
CURRENT
PRE-CHARGE
CURRENT AND
TERMINATION
THRESHOLD
Battery Current,
I(OUT)
Battery
Voltage,
V(OUT)
Charge
Complete
Status,
Charger
Off
VO(LOWV)
I(TERM)
IO(PRECHG)
T(THREG)
0A
Temperature, Tj
T(PRECHG)
T(CHG)
DONE
Figure 17. Charging Profile With Thermal Regulation
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8.2 Functional Block Diagram
Internal Charge
Current Sense
w/ Multiple Outputs
IN
OUT
OUT
80 mV Input
Power
Detect
+
_
IN
OUT
+
_
+
_
+
-
IN-DPMREF
OUTREGREF
Charge
Pump
TJ
+
_
FAST CHARGE
125ÛCREF
PRE-CHARGE
ISET
IN
+
_
1.5V
PRE-CHG Reference
Term Reference
TJ
+
_
+
_
150ÛCREF
Thermal Shutdown
PA
+
_
22mA Startup Current
Limit
Internal Current
Sensing Resistor
Charge
Pump
PRE-TERM
OVPREF
+
_
OUT
VTERM_EN
+
_
IN
+
_
CHARGE
CONTROL
VCOOL-10ÛC
+
_
+
_
VWARM-45ÛC
VCOLD-0ÛC
+
_
+
_
VHOT-60ÛC
LO=LDO MODE
TS
VLDO
VDISABLE
5PA
+
_
+
_
HI=CHIP DISABLE
Cold Temperature Sink
Disable Sink
Current
Current = 20PA
= 45PA
VCLAMP=1.4V
+
+
_
_
45PA
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8.3 Feature Description
8.3.1 Overvoltage-Protection (OVP) – Continuously Monitored
If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The
timer stops counting. Once the overvoltage returns to a normal voltage, the timer and charge continues.
8.3.2
CHG Pin Indication (bq25101, bq25101H)
The charge pin has an internal open drain FET which is on (pulls down to VSS) during the first charge only
(independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current
tapers to the termination threshold set by the PRE-TERM resistor. The bq25101/01H terminates at 10% of the
programmed charge current. The charge pin is high impedance in sleep mode and OVP and returns to its
previous state once the condition is removed. Cycling input power, removing and replacing the battery, pulling
the TS pin low and releasing or entering pre-charge mode causes the CHG pin to go reset (go low if power is
good and a discharged battery is attached) and is considered the start of a first charge.
8.3.3
CHG Pin LED Pull-up Source (bq25101, bq25101H)
For host monitoring, a pull-up resistor is used between the CHG pin and the VCC of the host and for a visual
indication a resistor in series with an LED is connected between the /CHG pin and a power source. If the CHG
source is capable of exceeding 7 V, a 6.2-V zener should be used to clamp the voltage. If the source is the OUT
pin, note that as the battery changes voltage, and the brightness of the LEDs vary.
8.3.4 IN-DPM (VIN-DPM or IN-DPM)
The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching its
current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET
starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with
voltage less than VIN-DPM to power the out pin. This is an added safety feature that helps protect the source from
excessive loads. This feature is not applicable for bq25100B.
8.3.5 OUT
The Charger’s OUT pin provides current to the battery and to the system, if present. This IC can be used to
charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the
loads do not exceed the available current. The OUT pin is a current limited source and is inherently protected
against shorts. If the system load ever exceeds the output programmed current threshold, the output will be
discharged unless there is sufficient capacitance or a charged battery present to supplement the excessive load.
8.3.6 ISET
An external resistor is used to Program the Output Current (10 to 250 mA) and can be used as a current monitor.
RISET = KISET ÷ IOUT
(1)
Where:
IOUT is the desired fast charge current;
KISET is a gain factor found in the electrical specification
For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Going from
higher currents to low currents, there is hysteresis and the transition occurs around 50 mA.
The ISET resistor is short protected and will detect a resistance lower than ≉420 Ω. The detection requires at
least 50 mA of output current. If a “short” is detected, then the IC will latch off and can be reset by cycling the
power or cycling TS pin. The OUT current is internally clamped to a maximum current of 600 mA typical and is
independent of the ISET short detection circuitry.
For charge current that is below 50 mA, an extra RC circuit is recommended on ISET to acheive more stable
current signal. More detail is available in 9.1 Application Information.
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Feature Description (continued)
60C
45C
10C
Programmed VBAT_REG
0C
No Operation
During Cold Fault
Reduced VBAT_REG
Programmed ICHG
(100%)
50%
Cold Fault
0
0.2
0.4
VHOT VWARM
0.6
0.8
1.0
VCOOL
1.2
VCOLD
1.4
1.6
Termination
Disable
1.8
TS Voltage-V
Figure 18. JEITA Operation Over TS Bias Voltage - bq25100, bq25100H, bq25101, bq25101H
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Feature Description (continued)
45C
10C
Programmed VBAT_REG
0C
No Operation
During Cold Fault
Hot Fault
Charge Disable
Programmed ICHG
(100%)
50%
Cold Fault
0
0.2
0.4
VHOT VWARM
0.6
0.8
1.0
VCOOL
1.2
VCOLD
1.4
1.6
Termination
Disable
1.8
TS Voltage-V
Figure 19. Standard Operation Over TS Bias Voltage – bq25100B, bq25100A, bq25100L
8.3.7 PRE_TERM – Pre-Charge and Termination Programmable Threshold
Pre-Term is used to program both the pre-charge current and the termination current threshold. The pre-charge
current level is a factor of two higher than the termination current level. The termination can be set between 5
and 50% (recommended range) of the programmed output current level set by ISET. If left floating the
termination and pre-charge are set internally at 10/20% respectively. The RPRE-TERM is ranged from 600 Ω to 30
kΩ and the minimum termination current can be programmed to 1 mA. The pre-charge-to-fast-charge, Vlowv
threshold is set to 2.5 V.
RPRE-TERM = %Term × KTERM = %Pre-CHG × KPRE-CHG
(2)
Where:
%Term is the percent of fast charge current where termination occurs;
%Pre-CHG is the percent of fast charge current that is desired during precharge;
KTERM and KPRE-CHG are gain factors found in the electrical specifications.
8.3.8 TS
The TS function for the bq25100B/bq25100A cuts the charge current level in half between 0°C and 10°C and
disables charging when the NTC temperature is above 45°C. The TS function for the
bq25100/bq25100H/bq25101/bq25101H is designed to follow the new JEITA temperature standard for Li-Ion and
Li-Pol batteries. There are now four thresholds, 60°C, 45°C, 10°C, and 0°C. Normal operation occurs between
10°C and 45°C. If between 0°C and 10°C the charge current level is cut in half and if between 45°C and 60°C
the regulation voltage is reduced to 4.1 V max for bq25100 and 4.2 V max for bq25100H, see Figure 18.
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Feature Description (continued)
The TS feature is implemented using an internal 50μA current source to bias the thermistor (designed for use
with a 10-k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F) connected from the TS pin to VSS. If
this feature is not needed, a fixed 10-k can be placed between TS and VSS to allow normal operation. This may
be done if the host is monitoring the thermistor and then the host would determine when to pull the TS pin low to
disable charge.
The TS pin has two additional features, when the TS pin is pulled low or floated/driven high. A low disables
charge and a high puts the charger in TTDM.
Above 45°C (60°C for bq25100/bq25100H/bq25101/bq25101H) or below 0°C the charge is disabled. Once the
thermistor reaches ≉–10°C the TS current folds back to keep a cold thermistor (between –10°C and –50°C) from
placing the IC in the TTDM mode. If the TS pin is pulled low into disable mode, the current is reduce to ≉30 μA.
Since the ITS curent is fixed along with the temperature thresholds, it is not possible to use thermistor values
other than the 10-k NTC (at 25°C).
8.3.9 Timers
The pre-charge timer is set to 30 minutes. The pre-charge current, can be programmed to off-set any system
load, making sure that the 30 minutes is adequate.
The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation or INDPM. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast when in these modes. If
either the 30 minute or ten hour timer times out, the charging is terminated and for bq25101/1H the CHG pin
goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power or going
into and out of TTDM.
8.3.10 Termination
Once the OUT pin goes above VRCH, (reaches voltage regulation) and the current tapers down to the
termination threshold, a battery detect route is run to determine if the battery was removed or the battery is full. If
the battery is present, the charge current will terminate. If the battery was removed along with the thermistor,
then the TS pin is driven high and the charge enters TTDM. If the battery was removed and the TS pin is held in
the active region, then the battery detect routine will continue until a battery is inserted. The termination current
can be programmed down to 625 uA, however, the accuracy will reduce acoordingly when the termination
current is below 1 mA.
8.4 Device Functional Modes
8.4.1 Power-Down or Undervoltage Lockout (UVLO)
The bq25100B family is in power down mode if the IN pin voltage is less than UVLO. The part is considered
“dead” and all the pins are high impedance. Once the IN voltage rises above the UVLO threshold the IC will
enter Sleep Mode or Active mode depending on the OUT pin (battery) voltage.
8.4.2 Power-up
The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts
to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the
UVLO and sleep states where the IC declares power good, starts the qualification charge at 22 mA, sets the
charge current base on the ISET pin, and starts the safety timer.
8.4.3 Sleep Mode
If the IN pin voltage is between VOUT+VDT and UVLO, the charge current is disabled, the safety timer counting
stops (not reset). As the input voltage rises and the charger exits sleep mode, the safety timer continues to count
and the charge is enabled. See Figure 20.
8.4.4 New Charge Cycle
A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin),
exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping
below the VRCH threshold.
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Device Functional Modes (continued)
Apply Input
Power
Is power good?
VBAT+VDT
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