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BQ51003YFPT

BQ51003YFPT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    28-XFBGA,DSBGA

  • 描述:

    IC WIRELESS PWR RCVR 28DSBGA

  • 数据手册
  • 价格&库存
BQ51003YFPT 数据手册
Product Folder Order Now Support & Community Tools & Software Technical Documents Reference Design bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 bq51003 Highly Integrated Wireless Receiver Qi (WPC v1.2) Compliant Power Supply 1 Features 3 Description • The bq51003 is an advanced, integrated, receiver IC for wireless power transfer in portable applications optimized for 2.5-W and below applications. The device provides the AC-DC power conversion while integrating the digital control required to comply with the Qi v1.2 communication protocol. Together with the bq500212A transmitter controller, the bq51003 enables a complete contact-less power transfer system for a wireless power supply solution. By using near-field inductive power transfer, the receiver coil embedded in the portable device receives the power transmitted by the transmitter coil through mutually coupled inductors. The AC signal from the receiver coil is then rectified and regulated to be used as a power supply for down-system electronics. Global feedback is established from the secondary to the transmitter to stabilize the power transfer process through back-scatter modulation. This feedback is established by using the Qi v1.2 communication protocol supporting up to 2.5-W applications. 1 • • • • • • • • Integrated Wireless Power Supply Receiver Solution - Optimized for 2.5-W Applications – 93% Overall Peak AC-DC Efficiency – Full Synchronous Rectifier – WPC v1.2 Compliant Communication Control – Output Voltage Conditioning – Only IC Required Between Rx coil and Output Wireless Power Consortium (WPC) v1.2 Compliant (FOD Enabled) Highly Accurate Current Sense Dynamic Rectifier Control for Improved Load Transient Response Dynamic Efficiency Scaling for Optimized Performance Over Wide Range of Output Power Adaptive Communication Limit for Robust Communication Supports 20-V Maximum Input Low-power Dissipative Rectifier Overvoltage Clamp (VRECT-OVP = 15 V) Thermal Shutdown Multifunction NTC and Control Pin for Temperature Monitoring, Charge Complete and Fault Host Control 2 Applications • • • • • • WPC Compliant Receivers Cell Phones and Smart Phones Headsets Digital Cameras Portable Media Players Hand-held Devices The device integrates a low-impedance full synchronous rectifier, low-dropout regulator, digital control, and accurate voltage and current loops. Device Information(1) PART NUMBER bq51003 PACKAGE BODY SIZE (NOM) DSBGA (28) 1.90 mm x 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Wireless Power Consortium (WPC or Qi) Inductive Power System Power AC to DC Drivers bq51003 Rectification Voltage Conditioning Load Communication Controller V/I Sense Controller bq500212A Transmitter Receiver Copyright © 2018, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6 7.1 7.2 7.3 7.4 7.5 7.6 6 6 6 7 7 9 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 12 8.1 Overview ................................................................. 12 8.2 Functional Block Diagram ....................................... 13 8.3 Feature Description................................................. 13 8.4 Device Functional Modes........................................ 26 9 Application and Implementation ........................ 27 9.1 Application Information............................................ 27 9.2 Typical Applications ................................................ 27 10 Power Supply Recommendations ..................... 34 11 Layout................................................................... 34 11.1 Layout Guidelines ................................................. 34 11.2 Layout Example .................................................... 34 12 Device and Documentation Support ................. 35 12.1 12.2 12.3 12.4 12.5 12.6 Device Support...................................................... Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 35 35 35 35 35 35 13 Mechanical, Packaging, and Orderable Information ........................................................... 35 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (March 2017) to Revision C Page • Changed "Together with the bq500210..." To: "Together with the bq500212A..." in the Description .................................... 1 • Changed bq500210 To: bq500212A in the Wireless Power Consortium (WPC or Qi) Inductive Power System image ....... 1 • Changed the Device Comparison Table................................................................................................................................. 3 • Changed bq500210 To: bq500212A in the Figure 17 .......................................................................................................... 12 • Changed "No Response" To: "EPT 0x00, Unknown" in the EPT column of Table 4 .......................................................... 17 • Changed "Termination" To: " EPT 0x01, Charge Complete" in the EPT column of Table 4 .............................................. 17 • Added row "Unknown" to Table 5......................................................................................................................................... 18 • Changed the condition of row "Charge Complete" in Table 5 ............................................................................................. 18 • Changed bq500210 To: bq500212A in the Figure 22 .......................................................................................................... 20 • Changed the 3-State Driver Recommendations for the TS-CTRL Pin section ................................................................... 25 Changes from Revision A (June 2016) to Revision B • Page Changed From: WPC v1.1 To: WPC v1.2 throughout the document..................................................................................... 1 Changes from Original (December 2013) to Revision A Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Removed Ordering Information table and Package Summary section, see POA at the end of the data sheet ................... 1 2 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 5 Device Comparison Table DEVICE FUNCTION VOUT (VBAT-REG) MAXIMUM POUT I2C bq51003 Wireless Receiver 5V 2.5 W No bq51013B Wireless Receiver 5V 5W No bq51010B Wireless Receiver 7V 5W No bq51020 Wireless Receiver 4.5 to 8 V 5W No bq51021 Wireless Receiver 4.5 to 8 V 5W Yes bq51221, bq51222 Dual Mode Wireless Receiver 4.5 to 8 V 5W Yes bq51050B Wiress Receiver and Direct Charger 4.2 V 5W No bq51051B Wiress Receiver and Direct Charger 4.35 V 5W No bq51052B Wiress Receiver and Direct Charger 4.4 V 5W No Table 1. Available Options DEVICE FUNCTION WPC VERSION VRECT-OVP VOUT-(REG) OVER CURRENT SHUTDOWN AD-OVP TERMINATION COMMUNICATION CURRENT LIMIT (1) (2) bq51003 5-V Power Supply v1.2 15 V 5V Disabled Disabled Disabled Adaptive + 1 s Hold-Off (1) (2) Enabled if EN2 is low and disabled if EN2 is high Communication current limit is disabled for 1 second at start-up Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 3 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com 6 Pin Configuration and Functions YFP Package 28-Pin DSBGA Top View 1 2 3 4 A PGND PGND PGND PGND B AC2 AC2 AC1 AC1 C BOOT2 RECT RECT BOOT1 D OUT OUT OUT OUT E COMM2 CLAMP2 CLAMP1 COMM1 F TS-CTRL FOD AD-EN CHG G ILIM EN2 EN1 AD Not to scale 4 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Pin Functions PIN NO. NAME I/O DESCRIPTION B3, B4 AC1 I B1, B2 AC2 I G4 AD I Connect this pin to the wired adapter input. When a voltage is applied to this pin wireless charging is disabled and AD_EN is driven low. Connect to GND through a 1 µF capacitor. If unused, capacitor is not required and should be grounded directly. Push-pull driver for external PFET connecting AD and OUT. This node is pulled to the higher of OUT and AD when turning off the external FET. This voltage tracks approximately 4 V below AD when voltage is present at AD and provides a regulated VGS bias for the external FET. Float this pin if unused. F3 AD-EN O C4 BOOT1 O C1 BOOT2 O F4 CHG O E3 CLAMP1 O E2 CLAMP2 O E4 COMM1 O E1 COMM2 O G3 EN1 I G2 EN2 I F2 FOD I AC input from receiver coil antenna. Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10 nF ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2. Open-drain output – Active when the output of the wireless power supply is enabled. Open drain FETs which are utilized for a non-power dissipative over-voltage AC clamp protection. When the RECT voltage goes above 15 V, both switches will be turned on and the capacitors will act as a low impedance to protect the IC from damage. If used, CLAMP1 is required to be connected to AC1, and CLAMP2 is required to be connected to AC2 through 0.47-µF capacitors. Open-drain output used to communicate with primary by varying reflected impedance. Connect COMM1 through a capacitor to either AC1 or AC2 for capacitive load modulation (COMM2 must be connected to the alternate AC1 or AC2 pin). For resistive modulation connect COMM1 and COMM2 to RECT through a single resistor; connect through separate capacitors for capacitive load modulation. Inputs that allow user to enable/disable wireless and wired charging : Wireless charging is enabled Dynamic communication current limit disabled Wireless charging disabled Wireless charging disabled. Input for the recieved power measurement. Connect to GND with a RFOD resistor. G1 ILIM I/O Programming pin for the over current limit. Connect external resistor to VSS. Size RILIM with the following equation: RILIM = 262 / IMAX where IMAX is the expected maximum output current of the wireless power supply. The hardware current limit (IILIM) will be 20% greater than IMAX or 1.2 x IMAX. If the supply is meant to operate in current limit use RILIM = 314 / IILIM RILIM = R1 + RFOD D1, D2, D3, D4 OUT O Output pin, delivers power to the load. A1, A2, A3, A4 PGND C2, C3 RECT F1 TS-CTRL Power ground O Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND. Depending on the power levels, the value may be 4.7 μF to 22 μF. I Must be connected to ground through a resistor. If an NTC function is not desired connect to GND with a 10-kΩ resistor. As a CTRL pin pull to ground to send end power transfer (EPT) fault to the transmitter or pullup to an internal rail (i.e. 1.8 V) to send EPT termination to the transmitter. Note that a 3-state driver should be used to interface this pin (see 3-State Driver Recommendations for the TS-CTRL Pin for further description). Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 5 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) Input voltage MIN MAX AC1, AC2 –0.8 20 RECT, COMM1, COMM2, OUT, CHG, CLAMP1, CLAMP2 –0.3 20 AD, AD-EN –0.3 30 BOOT1, BOOT2 -0.3 26 EN1, EN2, FOD, TS-CTRL, ILIM –0.3 7 Input current AC1, AC2 Output current Output sink current UNIT V 1 A(RMS) OUT 525 mA CHG 15 mA COMM1, COMM2 1 A Junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to the VSS terminal, unless otherwise noted. 7.2 ESD Ratings VALUE V(ESD) (1) (2) (3) Electrostatic discharge (1) Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (2) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) ±500 UNIT V 100 pF, 1.5 kΩ JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX 4 10 V RECT 500 mA Output current OUT 500 mA IAD-EN Sink current AD-EN 1 mA ICOMM COMM sink current COMM 500 mA TJ Junction temperature 125 °C VIN Input voltage RECT IIN Input current IOUT 6 0 Submit Documentation Feedback UNIT Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 7.4 Thermal Information bq51003 THERMAL METRIC (1) YFP (DSBGA) UNIT 28 PINS RθJA Junction-to-ambient thermal resistance 58.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 0.2 °C/W RθJB Junction-to-board thermal resistance 9.1 °C/W ψJT Junction-to-top characterization parameter 1.4 °C/W ψJB Junction-to-board characterization parameter 8.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Electrical Characteristics over operating free-air temperature range, 0°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 2.6 2.7 2.8 Undervoltage lockout VRECT: 0 V → 3 V Hysteresis on UVLO VRECT: 3 V → 2 V 250 Hysteresis on OVP VRECT: 16 V → 5 V 150 Input overvoltage threshold VRECT: 5 V → 16 V Dynamic VRECT threshold 1 ILOAD < 0.1 x IIMAX (ILOAD rising) 7.08 Dynamic VRECT threshold 2 0.1 x IIMAX < ILOAD < 0.2 x IIMAX (ILOAD rising) 6.28 Dynamic VRECT threshold 3 0.2 x IIMAX < ILOAD < 0.4 x IIMAX (ILOAD rising) 5.53 Dynamic VRECT threshold 4 ILOAD > 0.4 x IIMAX (ILOAD rising) 5.11 VRECT TRACKING In current limit voltage above VOUT ILOAD ILOAD hysteresis for dynamic VRECT thresholds as a % of IILIM ILOAD falling VRECT-DPM Rectifier undervoltage protection, restricts IOUT at VRECT-DPM VRECT-REV Rectifier reverse voltage protection at the output UVLO VHYS VRECT-OVP VRECT-REG 14.5 15 UNIT V mV mV 15.5 V V VO+0.25 4% 3 3.1 3.2 V VRECT-REV = VOUT – VRECT, VOUT = 10 V 8 9 V ILOAD = 0 mA, 0°C ≤ TJ ≤ 85°C 8 10 mA ILOAD = 300 mA, 0°C ≤ TJ ≤ 85°C 2 3 mA 20 35 µA 120 Ω QUIESCENT CURRENT IRECT Active chip quiescent current consumption from RECT IOUT Quiescent current at the output when wireless power is disabled (Standby) VOUT = 5 V, 0°C ≤ TJ ≤ 85°C ILIM SHORT CIRCUIT RILIM: 200 Ω → 50 Ω. IOUT latches off, cycle power to reset RILIM Highest value of ILIM resistor considered a fault (short). Monitored for IOUT > 100 mA tDGL Deglitch time transition from ILIM short to IOUT disable ILIM_SC ILIM-SHORT,OK enables the ILIM short comparator when IOUT is greater than this value ILOAD: 0 mA → 200 mA Hysteresis for ILIM-SHORT,OK comparator ILOAD: 0 mA → 200 mA Maximum output current limit, CL Maximum ILOAD that will be delivered for 1 ms when ILIM is shorted IOUT 1 120 145 ms 165 30 mA 2.45 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 mA A 7 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range, 0°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT ILOAD = 500 mA 4.96 5 5.04 ILOAD = 10 mA 4.97 5.01 5.05 Current programming factor for hardware protection RLIM = KILIM / IILIM, where IILIM is the hardware current limit. IOUT = 500 mA 303 314 321 KIMAX Current programming factor for the nominal operating current IIMAX = KIMAX / RLIM where IMAX is the maximum normal operating current. IOUT = 500 mA IOUT Current limit programming range ICOMM Current limit during WPC communication tHOLD Holdoff time for the communication current limit during start-up VOUT-REG Regulated output voltage KILIM 262 IOUT + 50 IOUT < 300 mA 343 378 AΩ AΩ 750 IOUT > 300 mA V mA mA 425 1 mA s TS / CTRL VTS VCOLD Internal TS bias voltage ITS-Bias < 100 µA (periodically driven see tTS-CTRL) Rising threshold VTS: 50% → 60% Falling hysteresis VTS: 60% → 50% Falling threshold VTS: 20% → 15% Rising hysteresis VTS: 15% → 20% CTRL pin threshold for a high 2 2.2 2.4 56.5 58.7 60.8 2 18.5 19.6 VTS-CTRL: 50 → 150 mV 80 100 130 CTRL pin threshold for a low VTS-CTRL: 150 → 50 mV 50 80 100 tTS-CTRL Time VTS-Bias is active when TS measurements occur Synchronous to the communication period tTS Deglitch time for all TS comparators RTS Pullup resistor for the NTC network. Pulled up to the voltage bias. VHOT VCTRL 20.7 V %VTS-Bias 3 18 mV 24 ms 10 ms 20 22 kΩ THERMAL PROTECTION Thermal shutdown temperature TJ 155 Thermal shutdown hysteresis °C 20 OUTPUT LOGIC LEVELS ON CHG VOL Open-drain CHG pin ISINK = 5 mA 500 mV IOFF CHG leakage current when disabled VCHG = 20 V 1 µA RDS(ON) COMM1 and COMM2 VRECT = 2.6 V fCOMM Signaling frequency on COMM pin IOFF Comm pin leakage current COMM PIN 1.5 Ω 2 VCOMM1 = 20 V, VCOMM2 = 20 V Kbps 1 µA CLAMP PIN RDS(ON) CLAMP1 and CLAMP2 0.8 Ω ADAPTER ENABLE VAD rising threshold voltage. EN-UVLO VAD 0 V → 5 V VAD-EN hysteresis, EN-HYS VAD 5 V → 0 V IAD Input leakage current VRECT = 0 V, VAD = 5 V RAD Pullup resistance from AD-EN to OUT when adapter mode is disabled and VOUT > VAD, EN-OUT VAD = 0 V, VOUT = 5 V VAD Voltage difference between VAD and VAD-EN when adapter mode is enabled, EN-ON VAD = 5 V, 0°C ≤ TJ ≤ 85°C VAD-EN 8 Submit Documentation Feedback 3.5 3.6 3.8 400 3 V mV 60 μA 200 350 Ω 4.5 5 V Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Electrical Characteristics (continued) over operating free-air temperature range, 0°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 80 100 130 mA SYNCHRONOUS RECTIFIER IOUT VHS-DIODE IOUT at which the synchronous rectifier enters half synchronous mode, SYNC_EN ILOAD : 200 mA → 0 mA Hysteresis for IOUT,RECT-EN (full-synchronous mode enabled) ILOAD : 0 mA → 200 mA 25 mA High-side diode drop when the rectifier is in half synchronous mode IAC-VRECT = 250 mA and TJ = 25°C 0.7 V EN1 AND EN2 VIL Input low threshold for EN1 and EN2 VIH Input high threshold for EN1 and EN2 RPD EN1 and EN2 pull down resistance 0.4 1.3 V V 200 kΩ ADC (WPC Related Measurements and Coefficients) IOUT SENSE Accuracy of the current sense over the load range IOUT = 300 mA - 500 mA –1.5% 0% 0.9% 7.6 Typical Characteristics 100 80 70 90 60 Efficiency (%) Efficiency (%) 80 70 50 40 30 60 20 50 10 RILIM = 524 Ÿ 40 0 0.5 1 1.5 2 2.5 3 0.000 0.500 1.000 Power (W) 1.500 2.000 2.500 Power (W) C006 Figure 1. Rectifier Efficiency C001 Figure 2. System Efficiency from DC Input to DC Output 80% 7.5 Load Current Rising Load Current Falling 70% 7 50% VRECT (V) Efficiency (%) 60% 40% 6.5 6 30% RILIM = 524 Ÿ 20% 5.5 10% 0% 0.00 RILIM = 524 Ÿ RILIM = 1048 Ÿ 5 0.50 1.00 1.50 2.00 2.50 Power (W) 0 0.1 0.2 0.3 0.4 0.5 0.6 Load Current (A) C002 Figure 3. Light Load System Efficiency Improvement Due to Dynamic Efficiency Scaling Feature C003 Figure 4. VRECT vs ILOAD at RILIM = 524 Ω Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 9 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Typical Characteristics (continued) 5.025 RILIM = 524 Ÿ RILIM = 1048 Ÿ 7 5.020 6.5 5.015 VOUT (V) VRECT (V) 7.5 6 5.010 5.5 5.005 Increasing Load Current 5 5.000 0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.1 0.2 Load Current (A) 0.3 0.4 0.5 0.6 Output Current (A) C004 C005 Figure 5. VRECT vs ILOAD at RILIM = 524 Ω and 1048 Ω Figure 6. ILOAD Sweep (I-V Curve) 60 5.004 5.002 40 Vout (V) Output Ripple (mV) 50 30 5.000 20 4.998 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0 Load Current (A) 20 40 60 80 Temperature (°C) 100 120 C007 10 Figure 7. Output Ripple vs ILOAD (COUT = 1 µF) Without Communication Figure 8. VOUT vs Temperature Figure 9. 0.5-A Instantaneous Load Dump Figure 10. 0.5-A Load Step Full System Response Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Typical Characteristics (continued) VRECT VOUT Figure 11. 0.5-A Load Dump Full System Response Figure 12. Rectifier Overvoltage Clamp (fop = 110 kHz) VTS/CTRL IOUT VRECT VRECT VOUT Figure 13. TS Fault Figure 14. Adaptive Communication Limit Event Where the 400-mA Current Limit is Enabled (IOUT-DC < 300 mA) Figure 15. Adaptive Communication Limit Event Where the Current Limit is IOUT + 50 mA (IOUT-DC > 300 mA) Figure 16. Rx Communication Packet Structure IOUT VRECT VOUT Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 11 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com 8 Detailed Description 8.1 Overview The principle of wireless power transfer is simply an open-cored transformer consisting of transmitter and receiver coils. The transmitter coil and electronics are typically built into a charger pad, and the receiver coil and electronics are typically built into a portable device such as a cell phone. When the receiver coil is positioned on the transmitter coil, magnetic coupling occurs when the transmitter coil is driven. The flux is coupled into the secondary coil, which induces a voltage and current flows. The secondary voltage is rectified, and power can be transferred effectively to a load wirelessly. Power transfer can be managed through any of the various closedloop control schemes. 8.1.1 A Brief Description of the Wireless System A wireless system consists of a charging pad (transmitter or primary) and the secondary-side equipment (receiver or secondary). There is a coil in the charging pad and in the secondary equipment which are magnetically coupled to each other when the secondary is placed on the primary. Power is then transferred from the transmitter to the receiver through coupled inductors (for example, an air-core transformer). Controlling the amount of power transferred is achieved by sending feedback (error signal) communication to the primary (that is, to increase or decrease power). The receiver communicates with the transmitter by changing the load seen by the transmitter. This load variation results in a change in the transmitter coil current, which is measured and interpreted by a processor in the charging pad. Communication is done through digital-packets which are transferred from the receiver to the transmitter. Differential Biphase encoding is used for the packets. The bit rate is 2-kbps. Various types of communication packets have been defined. These include identification and authentication packets, error packets, control packets, end power packets, and power usage packets. The transmitter coil stays powered off most of the time. It occasionally wakes up to see if a receiver is present. When a receiver authenticates itself to the transmitter, the transmiter will remain powered on. The receiver maintains full control over the power transfer using communication packets. Power AC to DC Drivers bq51003 Rectification Voltage Conditioning Load Communication Controller V/I Sense Controller bq500212A Transmitter Receiver Copyright © 2018, Texas Instruments Incorporated Figure 17. WPC Wireless Power System Indicating the Functional Integration of the bq51003 12 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 8.2 Functional Block Diagram RECT M1 , OUT VOUT,FB + _ + _ VREF,ILIM VILIM VOUT,REG VREF,IABS VIABS,FB + _ VIN,FB VIN,DPM + _ ILIM AD + _ VREFAD,OVP BOOT2 + _ BOOT1 VREFAD,UVLO /AD-EN AC1 AC2 Sync Rectifier Control VREF,TS-BIAS COMM1 COMM2 DATA_ OUT CLAMP1 ADC Digital Control TS_COLD VBG,REF VIN,FB VOUT,FB VILIM VIABS,FB VIABS,REF VIC,TEMP CLAMP2 VFOD + _ TS_HOT FOD + _ + _ TS-CTRL TS_DETECT + _ VREF_100MV VFOD 50uA + _ /CHG ILIM EN1 200k: VRECT VOVP,REF + _ OVP EN2 200k: PGND Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Details of a Qi Wireless Power System and bq51003 Power Transfer Flow Diagrams The bq51003 integrates a fully compliant WPC v1.2 communication algorithm to streamline receiver designs (no extra software development required). Other unique algorithms such as Dynamic Rectifier Control are also integrated to provide best-in-class system performance. This section provides a high-level overview of these features by illustrating the wireless power transfer flow diagram from start-up to active operation. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 13 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Feature Description (continued) During start-up operation, the wireless power receiver must comply with proper handshaking to be granted a power contract from the Tx. The Tx initiates the hand shake by providing an extended digital ping. If an Rx is present on the Tx surface, the Rx then provides the signal strength, configuration, and identification packets to the Tx (see volume 1 of the WPC specification for details on each packet). These are the first three packets sent to the Tx. The only exception is if there is a true shutdown condition on the EN1/EN2, AD, or TS-CTRL pins where the Rx will shut down the Tx immediately. See Table 5 for details. Once the Tx has successfully received the signal strength, configuration, and identification packets, the Rx will be granted a power contract and is then allowed to control the operating point of the power transfer. With the use of the bq51003 Dynamic Rectifier Control algorithm, the Rx will inform the Tx to adjust the rectifier voltage above 7 V prior to enabling the output supply. This method enhances the transient performance during system start-up. See Figure 18 for the start-up flow diagram details. Tx Powered without Rx Active Tx Extended Digital Ping EN1/EN2 /TS-CTRL EPT Condition? Yes Send EPT packet with reason value No Identification and Configuration and SS, Received by Tx? No Yes Power Contract Established. All proceeding control is dictated by the Rx. Yes VRECT < 7V? Send control error packet to increase VRECT No Startup operating point established. Enable the Rx output. Rx Active Power Transfer Stage Figure 18. Wireless Power Start-Up Flow Diagram 14 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Feature Description (continued) Once the start-up procedure has been established, the Rx will enter the active power transfer stage. This is considered the main loop of operation. The Dynamic Rectifier Control algorithm will determine the rectifier voltage target based on a percentage of the maximum output current level setting (set by KIMAX and the ILIM resistance to GND). The Rx will send control error packets to converge on these targets. As the output current changes, the rectifier voltage target will dynamically change. As a note, the feedback loop of the WPC system is relatively slow where it can take up to 90 ms to converge on a new rectifier voltage target. It should be understood that the instantaneous transient response of the system is open loop and dependent on the Rx coil output impedance at that operating point. The main loop will also determine if any conditions in Table 5 are true to discontinue power transfer. See Figure 19 which illustrates the active power transfer loop. Rx Active Power Transfer Stage Rx Shutdown conditions per the EPT Table? Yes Tx Powered without Rx Active Send EPT packet with reason value No IOUT < 10% of IMAX? Yes VRECT target = 7 V. Send control error packets to converge. No Yes VRECT target = 6.3 V. Send control error packets to converge. Yes VRECT target = 5.5 V. Send control error packets to converge. IOUT < 20% of IMAX? No IOUT < 40% of IMAX? No VRECT target= 5.1 V. Send control error packets to converge. Measure Rectified Power and Send Value to Tx Figure 19. Active Power Transfer Flow Diagram Another requirement of the WPC v1.2 specification is to send the measured received power. This task is enabled on the IC by measuring the voltage on the FOD pin which is proportional to the output current and can be scaled based on the choice of the resitor to ground on the FOD pin. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 15 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Feature Description (continued) 8.3.2 Dynamic Rectifier Control The Dynamic Rectifier Control algorithm offers the end system designer optimal transient response for a given max output current setting. This is achieved by providing enough voltage headroom across the internal regulator at light loads to maintain regulation during a load transient. The WPC system has a relatively slow global feedback loop where it can take more than 90 ms to converge on a new rectifier voltage target. Therefore, the transient response is dependent on the loosely coupled transformers output impedance profile. The Dynamic Rectifier Control allows for a 2-V change in rectified voltage before the transient response will be observed at the output of the internal regulator (output of the bq51003). 8.3.3 Dynamic Efficiency Scaling The Dynamic Efficiency Scaling feature allows for the loss characteristics of the bq51003 to be scaled based on the maximum expected output power in the end application. This effectively optimizes the efficiency for each application. This feature is achieved by scaling the loss of the internal LDO based on a percentage of the maximum output current. Note that the maximum output current is set by the KIMAX term and the RILIM resistance (where RILIM = KIMAX / IMAX). The flow diagram show in Figure 19 illustrates how the rectifier is dynamically controlled (Dynamic Rectifier Control) based on a fixed percentage of the IMAX setting. Table 2 summarizes how the rectifier behavior is dynamically adjusted based on two different RILIM settings. Table 2. Dynamic Efficiency Scaling OUTPUT CURRENT PERCENTAGE RILIM = 1116 Ω IMAX = 250 mA RILIM = 488 Ω IMAX = 500 mA VRECT 0 to 10% 0 A to 0.025 A 0 A to 0.05 A 7.08 V 10 to 20% 0.025 A to 0.050 A 0.050 A to 0.100 A 6.28 V 20 to 40% 0.050 A to 0.100 A 0.100 A to 0.200 A 5.53 V >40% > 0.100 A > 0.200 A 5.11 V Figure 5 illustrates the shift in the Dynamic Rectifier Control behavior based on the two different RILIM settings. With the rectifier voltage (VRECT) being the input to the internal LDO, this adjustment in the Dynamic Rectifier Control thresholds will dynamically adjust the power dissipation across the LDO where: ( ) PDIS = VRECT - VOUT × IOUT (1) Figure 3 illustrates how the system efficiency is improved due to the Dynamic Efficiency Scaling feature. Note that this feature balances efficiency with optimal system transient response. 8.3.4 RILIM Calculations The bq51003 includes a means of providing hardware overcurrent protection by means of an analog current regulation loop. The hardware current limit provides an extra level of safety by clamping the maximum allowable output current (that is, a current compliance). The RILIM resistor size also sets the thresholds for the dynamic rectifier levels and thus providing efficiency tuning per each application’s maximum system current. The calculation for the total RILIM resistance is as follows: R ILIM = 262 IMAX IILIM = 1.2 ´ IMAX = 314 R ILIM R ILIM = R1 + R FOD where • • IMAX is the expected maximum output current during normal operation IILIM is the hardware over current limit (2) When referring to the application diagram shown in Figure 32, RILIM is the sum of RFOD and the R1 resistance (that is, the total resistance from the ILIM pin to GND). 16 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 8.3.5 Input Overvoltage If the input voltage suddenly increases in potential (that is, due to a change in position of the equipment on the charging pad), the voltage-control loop inside the bq51003 becomes active, and prevents the output from going beyond VOUT-REG. The receiver then starts sending back error packets to the transmitter every 30 ms until the input voltage comes back to the VRECT-REG target, and then maintains the error communication every 250 ms. If the input voltage increases in potential beyond VRECT-OVP, the IC switches off the LDO and communicates to the primary to bring the voltage back to VRECT-REG. In addition, a proprietary voltage protection circuit is activated by means of CCLAMP1 and CCLAMP2 that protects the IC from voltages beyond the maximum rating of the IC (that is, 20 V). 8.3.6 Adapter Enable Functionality and EN1/EN2 Control Figure 38 is an example application that shows the bq51003 used as a wireless power receiver that can power mutliplex between wired or wireless power for the down-system electronics. In the default operating mode pins EN1 and EN2 are low, which activates the adapter enable functionality. In this mode, if an adapter is not present the AD pin will be low, and AD-EN pin will be pulled to the higher of the OUT and AD pins so that the PMOS between OUT and AD will be turned off. If an adapter is plugged in and the voltage at the AD pin goes above 3.6 V then wireless charging is disabled and the AD-EN pin will be pulled approximately 4 V below the AD pin to connect AD to the secondary charger. The difference between AD and AD-EN is regulated to a maximum of 7 V to ensure the VGS of the external PMOS is protected. The EN1 and EN2 pins include internal 200-kΩ pulldown resistors, so that if these pins are not connected bq51003 defaults to AD-EN control mode. However, these pins can be pulled high to enable other operating modes as described in Table 3: Table 3. Adapter Enable Functionality EN1 EN2 RESULT 0 0 Adapter control enabled. If adapter is present then secondary charger is powered by adapter, otherwise wireless charging is enabled when wireless power is available. Communication current limit is enabled. 0 1 Disables communication current limit. 1 0 AD-EN is pulled low, whether or not adapter voltage is present. This feature can be used, for example, for USB OTG applications. 1 1 Adapter and wireless charging are disabled, that is, power will never be delivered by the OUT pin in this mode. Table 4. EN1/EN2 Control EN1 (1) (2) EN2 WIRELESS POWER WIRED POWER (1) OTG MODE ADAPTIVE COMMUNICATION LIMIT EPT Not Sent to Tx 0 0 Enabled Priority Disabled Enabled 0 1 Priority (1) Enabled Disabled Disabled Not Sent to Tx 1 0 Disabled Enabled Enabled (2) N/A EPT 0x00, Unknown 1 1 Disabled Disabled Disabled N/A EPT 0x01, Charge Complete If both wired and wireless power are present, wired power is given priority. Allows for a boost-back supply to be driven from the output terminal of the Rx to the adapter port through the external back-to-back PMOS FET. As described in Table 4, pulling EN2 high disables the adapter mode and only allows wireless charging. In this mode the adapter voltage will always be blocked from the OUT pin. An application example where this mode is useful is when USB power is present at AD, but the USB is in suspend mode so that no power can be taken from the USB supply. Pulling EN1 high enables the off-chip PMOS regardless of the presence of a voltage. This function can be used in USB OTG mode to allow a charger connected to the OUT pin to power the AD pin. Finally, pulling both EN1 and EN2 high disables both wired and wireless charging. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 17 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com NOTE It is required to connect a back-to-back PMOS between AD and OUT so that voltage is blocked in both directions. Also, when AD mode is enabled no load can be pulled from the RECT pin as this could cause an internal device overvoltage in bq51003. 8.3.7 End Power Transfer Packet (WPC Header 0x02) The WPC allows for a special command for the receiver to terminate power transfer from the transmitter termed End Power Transfer (EPT) packet. Table 5 specifies the v1.2 reasons column and their corresponding data field value. The condition column corresponds to the methodology used by bq51003 to send equivalent message. Table 5. End Power Transfer Packet MESSAGE VALUE CONDITION TS-CTRL = 1, or ,EN1 EN2> = or AD > VAD_EN Unknown 0x00 Charge Complete 0x01 = Internal Fault 0x02 TJ > 150°C or RILIM < 100 Ω Over Temperature 0x03 TS < VHOT, TS > VCOLD, or TS-CTRL < 100 mV Over Voltage 0x04 Not Sent Over Current 0x05 NOT USED Battery Failure 0x06 Not Sent Reconfigure 0x07 Not Sent No Response 0x08 VRECT target does not converge 8.3.8 Status Outputs The bq51003 has one status output, CHG. This output is an open-drain NMOS device that is rated to 20 V. The open-drain FET connected to the CHG pin will be turned on whenever the output of the power supply is enabled. Note that the output of the power supply will not be enabled if the VRECT-REG does not converge at the no-load target voltage. 18 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 8.3.9 WPC Communication Scheme The WPC communication uses a modulation technique termed backscatter modulation where the receiver coil is dynamically loaded to provide amplitude modulation of the transmitter's coil voltage and current. This scheme is possible due to the fundamental behavior between two loosely coupled inductors (that is, between the Tx and Rx coil). This type of modulation can be accomplished by switching in and out a resistor at the output of the rectifier, or by switching in and out a capacitor across the AC1/AC2 net. Figure 20 shows how to implement resistive modulation. CRES1 AC1 VRECT R MOD COIL C RES2 AC2 GND Figure 20. Resistive Modulation Figure 21 shows how to implement capacitive modulation. CRES1 AC1 VRECT C MOD COIL C RES2 AC2 GND Figure 21. Capacitive Modulation Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 19 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com The amplitude change in Tx coil voltage or current can be detected by the transmitters decoder. Figure 22 shows the resulting signal observed by the Tx. Power AC to DC bq51003 Drivers Rectification Voltage Conditioning Communication Controller V/I Sense Controller bq500212A Transmitter 0 Receiver 1 0 1 0 TX COIL VOLTAGE / CURRENT Copyright © 2018, Texas Instruments Incorporated Figure 22. TX Coil Voltage and Current The WPC protocol uses a differential biphase encoding scheme to modulate the data bits onto the Tx coil voltage and current. Each data bit is aligned at a full period of 0.5 ms (tCLK) or 2 kHz. An encoded ONE results in two transitions during the bit period and an encoded ZERO results in a single transition. See Figure 23 for an example of the differential biphase encoding. Figure 23. Differential Biphase Encoding Scheme (WPC Volume 1: Low Power, Part 1 Interface Definition) The bits are sent LSB first and use an 11-bit asynchronous serial format for each portion of the packet. This includes one start bit, n-data bytes, a parity bit, and a single stop bit. The start bit is always ZERO and the parity bit is odd. The stop bit is always ONE. Figure 24 shows the details of the asynchronous serial format. Figure 24. Asynchronous Serial Formatting (WPC volume 1: Low Power, Part 1 Interface Definition) 20 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Each packet format is organized as shown in Figure 25. Preamble Header Message Checksum Figure 25. Packet Format (WPC Volume 1: Low Power, Part 1 Interface Definition) Figure 16 shows an example waveform of the receiver sending a rectified power packet (header 0x04). 8.3.10 Communication Modulator The bq51003 provides two identical, integrated communication FETs which are connected to the pins COMM1 and COMM2. These FETs are used for modulating the secondary load current which allows bq51003 to communicate error control and configuration information to the transmitter. Figure 26 shows how the COMM pins can be used for resistive load modulation. Each COMM pin can handle at most a 24-Ω communication resistor. Therefore, if a COMM resistor between 12 Ω and 24 Ω is required COMM1 and COMM2 pins must be connected in parallel. The bq51003 does not support a COMM resistor less than 12 Ω. RECTIFIER 24W COMM1 24W COMM2 COMM_DRIVE Figure 26. Resistive Load Modulation In addition to resistive load modulation, the bq51003 is also capable of capacitive load modulation as shown in Figure 27. In this case, a capacitor is connected from COMM1 to AC1 and from COMM2 to AC2. When the COMM switches are closed there is effectively a 22-nF capacitor connected between AC1 and AC2. Connecting a capacitor in between AC1 and AC2 modulates the impedance seen by the coil, which will be reflected in the primary as a change in current. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 21 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Figure 27. Capacitive Load Modulation 8.3.11 Adaptive Communication Limit The Qi communication channel is established through backscatter modulation as described in the previous sections. This type of modulation takes advantage of the loosely coupled inductor relationship between the Rx and Tx coil. Essentially the switching in-and-out of the communication capacitor or resistor adds a transient load to the Rx coil to modulate the Tx coil voltage and current waveform (amplitude modulation). The consequence of this technique is that a load transient (load current noise) from the mobile device has the same signature. To provide noise immunity to the communication channel, the output load transients must be isolated from the Rx coil. The proprietary feature Adaptive Communication Limit achieves this by dynamically adjusting the current limit of the regulator. When the regulator is put in current limit, any load transients will be offloaded to the battery in the system. Note that this requires the battery charger IC to have input voltage regulation (weak adapter mode). The output of the Rx appears as a weak supply if a transient occurs above the current limit of the regulator. The Adaptive Communication Limit feature has two current limit modes and is detailed in Table 6: Table 6. Adaptive Communication Limit IOUT COMMUNICATION CURRENT LIMIT < 300 mA Fixed 400 mA > 300 mA IOUT + 50 mA 8.3.12 Synchronous Rectification The bq51003 provides an integrated, self-driven synchronous rectifier that enables high-efficiency AC to DC power conversion. The rectifier consists of an all NMOS H-Bridge driver where the backgates of the diodes are configured to be the rectifier when the synchronous rectifier is disabled. During the initial start-up of the WPC system the synchronous rectifier is not enabled. At this operating point, the DC rectifier voltage is provided by the diode rectifier. Once VRECT is greater than UVLO, half-synchronous mode will be enabled until the load current surpasses 120 mA. Above 120 mA the full synchronous rectifier stays enabled until the load current drops back below 100 mA where half-synchronous mode is enabled instead. 22 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 8.3.13 Temperature Sense Resistor Network (TS) bq51003 includes a ratiometric external temperature sense function. The temperature sense function has two ratiometric thresholds which represent a hot and cold condition. TI recommends an external temperature sensor to provide safe operating conditions for the receiver product. This pin is best used for monitoring the surface that can be exposed to the end user (that is, place the NTC resistor closest to the user). Figure 28 allows for any NTC resistor to be used with the given VHOT and VCOLD thresholds. VTSB (2.2V) 20kΩ R2 TS-CTRL R1 R3 NTC Figure 28. NTC Circuit Used for Safe Operation of the Wireless Receiver Power Supply The resistors R1 and R3 can be solved by resolving the system of equations at the desired temperature thresholds (see Equation 3 and Equation 4). ( ( ) ) æ R R + R1 ö÷ ç 3 NTC TCOLD ç ÷ + R1 ÷ ç R 3 + R NTC TCOLD è ø ´100 %VCOLD = æ R R ö R + ç 3 NTC TCOLD 1 ÷ ç ÷ + R2 + R1 ÷ ç R 3 + R NTC TCOLD è ø ) ) æ R R + R1 ) ö÷ ç 3 ( NTC THOT ç ÷ + R1 )÷ ç R 3 + (R NTC THOT è ø ´100 %VHOT = æ R R ö R + ç 3 ( NTC THOT 1) ÷ ç ÷ + R2 + R1 )÷ ç R 3 + (R NTC THOT è ø ( ( R NTC TCOLD R NTC THOT (3) bæçç 1TCOLD-1To ö÷÷ ø = R oe è bæçç 1 -1 ö÷÷ = R oe è THOT To ø where • • • • TCOLD and THOT are the desired temperature thresholds in degrees Kelvin RO is the nominal resistance and β is the temperature coefficient of the NTC resistor RO is fixed at 20 kΩ (4) An example solution is provided: • R1 = 4.23 kΩ • R3 = 66.8 kΩ where the chosen parameters are: • %VHOT = 19.6% Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 23 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 • • • • • www.ti.com %VCOLD = 58.7% TCOLD = –10°C THOT = 100°C β = 3380 RO = 10 kΩ Figure 29 shows the plot of the percent VTSB vs temperature. Figure 29. Example Solution for an NTC resistor with RO = 10 kΩ and β = 4500 Figure 30 illustrates the periodic biasing scheme used for measuring the TS state. The TS_READ signal enables the TS bias voltage for 24 ms. During this period the TS comparators are read (each comparator has a 10-ms deglitch) and appropriate action is taken based on the temperature measurement. After this 24-ms period has elapsed, the TS_READ signal goes low, which causes the TS-Bias pin to become high impedance. During the next 35 ms (priority packet period) or 235 ms (standard packet period), the TS voltage is monitored and compared to 100 mV. If the TS voltage is greater than 100 mV then a secondary device is driving the TS-CTRL pin and a CTRL = ‘1’ is detected. Figure 30. Timing Diagram for TS Detection Circuit 24 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 8.3.14 3-State Driver Recommendations for the TS-CTRL Pin The TS-CTRL pin offers three functions with one 3-state driver interface 1. NTC temperature monitoring, 2. Fault indication, 3. End Power Transfer Unknown A 3-state driver can be implemented with the circuit in Figure 31 and the use of two GPIO connections. BATT M3 TERM TS-CTRL FAULT M4 Figure 31. 3-State Driver for TS-CTRL Note that the signals TERM and FAULT are given by two GPIOs. The truth table for this circuit is found in Table 7: Table 7. Truth Table TERM FAULT F (Result) 1 0 Z (Normal Mode) 0 0 End Power Transfer 0X00 1 1 End Power Transfer 0X03 The default setting is TERM / FAULT = 1 / 0. In this condition, the TS-CTRL net is high impedance (high-z) and the NTC function is allowed to operate, normal operation. When TERM / FAULT = 1 /1 the TS-CTRL pin is pulled to GND and the RX is shutdown with End Power Transfer Over Temperature sent to TX. When TERM / FAULT = 0 / 0, the TS-CTRL pin is pulled to the battery and the RX is shutdown with End Power Transfer Unknown sent to the TX. 8.3.15 Thermal Protection The bq51003 includes a thermal shutdown protection. If the die temperature reaches TJ(OFF), the LDO is shut off to prevent any further power dissipation. In this event, bq51003 sends an EPT message of internal fault (0x02). 8.3.16 WPC v1.2 Compliance – Foreign Object Detection The bq51003 is a WPC v1.2 compatible device. To enable a Power Transmitter to monitor the power loss across the interface as one of the possible methods to limit the temperature rise of Foreign Objects, the bq51003 reports its Received Power to the Power Transmitter. The Received Power equals the power that is available from the output of the Power Receiver plus any power that is lost in producing that output power (the power loss in the Secondary Coil and series resonant capacitor, the power loss in the Shielding of the Power Receiver, the power loss in the rectifier). In WPC v1.2 specification, foreign object detection (FOD) is enforced. This means the bq51003 will send received power information with known accuracy to the transmitter. WPC v1.2 defines Received Power as “the average amount of power that the Power Receiver receives through its Interface Surface, in the time window indicated in the Configuration Packet”. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 25 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com To receive certification as a WPC v1.2 receiver, the Device Under Test (DUT) is tested on a Reference Transmitter whose transmitted power is calibrated, the receiver must send a received power determined by Equation 5: 0 mW < (Tx PWR)REF – (Rx PWR out)DUT < –250 mW (5) This 250-mW bias ensures that system will remain interoperable. WPC v1.2 Transmitter will be tested to see if they can detect reference Foreign Objects with a Reference receiver. WPC v1.2 Specification will allow much more accurate sensing of Foreign Objects. 8.4 Device Functional Modes The operational modes of the bq51003 are described in the Feature Description. The bq51003 has several functional modes. Start-up refers to the initial power transfer and communication between the receiver (bq51003 circuit) and the transmitter. Power transfer refers to any time that the TX and RX are communicating and power is being delivered from the TX to the RX. Power transfer termination occurs when the RX is removed from the TX, power is removed from the TX, or the RX requests power transfer termination. 26 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The bq51003 is a fully integrated wireless power receiver in a single device. The device complies with the WPC v1.2 specifications for a wireless power receiver. When paired with a WPC v1.2 compliant transmitter, it can provide up to 2.5 W of power. There are several tools available for the design of the system. These tools may be obtained by checking the product page at www.ti.com/product/bq51003. 9.2 Typical Applications 9.2.1 bq51003 Wireless Power Receiver Used as a Power Supply The following application discussion covers the requirements for setting up the bq51003 in a Qi-compliant system for use as a power supply. System Load /AD-EN AD OUT CCOMM1 COMM1 C4 BOOT1 ROS2 CBOOT1 ROS1 RECT C1 AC1 C3 COIL bq51003 C2 D1 R4 HOST TS-CTRL AC2 NTC BOOT2 CBOOT2 COMM2 /CHG CLAMP2 EN1 Bi-State CLAMP1 EN2 Bi-State CCOMM2 CCLAMP2 CCLAMP1 ILIM R1 FOD Tri-State PGND RFOD Copyright © 2016, Texas Instruments Incorporated Figure 32. bq51003 Used as a Wireless Power Receiver and Power Supply for System Loads Only One of ROS1 or ROS2 Needed 9.2.1.1 Design Requirements This application is for a system that has varying loads up to 500 mA (2.5 W). It must work with any Qi-certified transmitter. There is no requirement for any external thermal measurements. An LED indication is required to indicate an active power supply. Each of the components from the application drawing will be examined. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 27 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Typical Applications (continued) 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Using the bq51003 as a Wireless Power Supply Figure 32 is the schematic of a system which uses the bq51003 as a power supply. When the system shown in Figure 32 is placed on the charging pad, the receiver coil is inductively coupled to the magnetic flux generated by the coil in the charging pad which consequently induces a voltage in the receiver coil. The internal synchronous rectifier feeds this voltage to the RECT pin which has the filter capacitor C3. The bq51003 identifies and authenticates itself to the primary using the COMM pins by switching on and off the COMM FETs and hence switching in and out CCOMM. If the authentication is successful, the transmitter will remain powered on. The bq51003 measures the voltage at the RECT pin, calculates the difference between the actual voltage and the desired voltage VRECT-REG, (threshold 1 at no load) and sends back error packets to the primary. This process goes on until the input voltage settles at VRECT-REG. During a load transient, the dynamic rectifier algorithm will set the targets specified by VRECT-REG thresholds 1, 2, 3, and 4. This algorithm is termed Dynamic Rectifier Control and is used to enhance the transient response of the power supply. During power up, the LDO is held off until the VRECT-REG threshold 1 converges. The voltage control loop ensures that the output voltage is maintained at VOUT-REG to power the system. The bq51003 meanwhile continues to monitor the input voltage, and maintains sending error packets to the primary every 250 ms. If a large overshoot occurs, the feedback to the primary speeds up to every 32 ms to converge on an operating point in less time. 9.2.1.2.2 Series and Parallel Resonant Capacitor Selection Shown in Figure 32, the capacitors C1 (series) and C2 (parallel) make up the dual resonant circuit with the receiver coil. These two capacitors must be sized correctly per the WPC v1.2 specification. Figure 33 illustrates the equivalent circuit of the dual resonant circuit: C1 Ls’ C2 Figure 33. Dual Resonant Circuit With the Receiver Coil Section 4.2 (Power Receiver Design Requirements) in Part 1 of the WPC v1.2 specification highlights in detail the sizing requirements. To summarize, the receiver designer will be required take inductance measurements with a fixed test fixture. Figure 34 shows the test fixture. 28 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Typical Applications (continued) Interface Surface Magnetic Attractor (example) Secondary Coil Shielding (optional) Mobile Device Spacer dz Primary Shielding Figure 34. WPC v1.2 Receiver Coil Test Fixture for the Inductance Measurement Ls’ (Copied from System Description Wireless Power Transfer, Volume 1: Low Power, Part 1 Interface Definition, Version 1.2) The primary shield is to be 50 mm x 50 mm x 1 mm of Ferrite material PC44 from TDK Corp. The gap dZ is to be 3.4 mm. The receiver coil, as it will be placed in the final system (that is, the back cover and battery must be included if the system calls for this), is to be placed on top of this surface and the inductance is to be measured at 1-V RMS and a frequency of 100 kHz. This measurement is termed Ls’. The same measurement is to be repeated without the test fixture shown in Figure 34. This measurement is termed Ls or the free-space inductance. Each capacitor can then be calculated using Equation 6: -1 2 é ù C1 = ê fS ´ 2p ´ L'S ú ë û -1 é 2 1ù C2 = ê fD ´ 2p ´ LS ú C1 ûú ëê ( ) ( ) where • • fS is 100 kHz +5/-10% fD is 1 MHz ±10%. (6) C1 must be chosen first prior to calculating C2. The quality factor must be greater than 77 and can be determined by Equation 7: 2p× f × LS D Q= R where • R is the DC resistance of the receiver coil. All other constants are defined above. (7) 9.2.1.2.3 COMM, CLAMP, and BOOT Capacitors For most applications, the COMM, CLAMP, and BOOT capacitance values will be chosen to match the bq51003EVM-764. The BOOT capacitors are used to allow the internal rectifier FETs to turn on and off properly. These capacitors are from AC1 to BOOT1 and from AC2 to BOOT2 and must have a minimum 25-V rating. A 10-nF capacitor with a 25-V rating is chosen. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 29 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Typical Applications (continued) The CLAMP capacitors are used to aid in the clamping process to protect against overvoltage. These capacitors are from AC1 to CLAMP1 and from AC2 to CLAMP2 and must have a minimum 25-V rating. A 0.47-µF capacitor with a 25-V rating is chosen. The COMM capacitors are used to facilitate the communication from the RX to the TX. This selection can vary a bit more than the BOOT and CLAMP capacitors. In general, TI recommends an 22-nF capacitor. Based on the results of testing of the communication robustness in the final solution, a change to a 47-nF capacitor may be in order. The larger the capacitor the larger the deviation will be on the coil which sends a stronger signal to the TX. This also decreases the efficiency somewhat. In this case, a 22-nF capacitor with a 25-V rating is chosen. 9.2.1.2.4 Control Pins and CHG This section discusses the pins that control the functions of the bq51003 (AD, AD_EN, EN1, EN2, and TS or CTRL). This solution uses wireless power exclusively. The AD pin is tied low to disable wired power interaction. The output pin AD_EN is left floating. EN1 and EN2 are tied to the system controller GPIO pins. This allows the system to control the wireless power transfer. Normal operation leaves EN1 and EN2 low or floating (GPIO low or high impedance). EN1 and EN2 have internal pulldown resistors. With both EN1 and EN2 low, wireless power is enabled and power can be transferred whenever the RX is on a suitable TX. The RX system controller can terminate power transfer and send an EPT 0x01 (Charge Complete) by setting EN1=EN2=1. The TX will terminate power when the EPT 0x01 is received. The TX will continue to test for power transfer, but will not engage until the RX requests power. For example, if the TX is the bq500212A, the TX will send digital pings approximately once per 5 seconds. During each ping, the bq51003 will resend the EPT 0x01. Between the pings, the bq500212A goes into low power Sleep mode reducing power consumption. When the RX system controller determines it is time to resume power transfer (for example, the battery voltage is below its recharge threshold) the controller simply returns EN1 and EN2 to low (or float) states. The next ping of the bq500212A will power the bq51003 which will now communicate that it is time to transfer power. The TX and RX communication resumes and power transfer is reinitiated. The TS or CTRL pin will be used as a temperature sensor (with the NTC) and maintain the ability to terminate power transfer through the system controller. In this case, the GPIO will be in high impedance for normal NTC (Temperature Sense) control. The CHG pin is used to indicate power transfer. A 2.1-V forward bias LED is used for D1 with a current limiting 1.5-kΩ series resistor. The LED and resistor are tied from OUT to PGND and D1 will light during power transfer. 9.2.1.2.5 Current Limit and FOD The current limit and foreign object detection functions are related. The current limit is set by R1 + RFOD. RFOD and Ros are determined by FOD calibration. Default values of 20 kΩ for Ros1 (RECT to FOD). Ros2 (OUT to FOD) remains open. 196 Ω for RFOD is used. The final values need to be determined based on the FOD calibration. The tool for FOD calibration can be found on the bq51003 web folder under Tools & software. Good practice is to set the layout with 2 resistors for Ros and 2 for RFOD to allow for precise values once the calibration is complete. After setting RFOD, R1 can be calculated based on the desired current limit. The maximum current for this solution under normal operating conditions (IMAX) is 500 mA. Using Equation 2 to calculate the maximum current yields a value of 524 Ω for RILIM. With RFOD set to 196 Ω the remaining resistance for R1 is 328 Ω. This also sets the hardware current limit to 600 mA to allow for temporary current surges without system performance concerns. 9.2.1.2.6 RECT and OUT Capacitance RECT capacitance is used to smooth the AC to DC conversion and to prevent minor current transients from passing to OUT. For this 500-mA IMAX, select two 10-µF capacitors and one 0.1-µF capacitor. These should be rated to 16 V. OUT capacitance is used to reduce any ripple from minor load transients. For this solution, a single 10-µF capacitor and a single 0.1-µF capacitor are used. 30 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Typical Applications (continued) 9.2.1.3 Application Curves The following figures show the bq51003EVM-764 under 3 conditions. The RECT pin signal shows the bq51003 rectifier response due to the changing conditions. The OUT pin signal shows the impact to the OUT pin during the changed conditions. IOUT shows the current being sourced by the OUT pin. Figure 35 shows the bq51003EVM-764 being placed on a transmitter with no load at the OUT pin. This shows the RECT pin receiving the Ping from the transmitter and responding with identification and other packets to establish power transfer. Once the RECT pin has reached its required voltage, the OUT pin is enabled and produces 5 V. The communication packet after 5 V is produced indicates the steady state condition being sent to the transmitter. Figure 36 shows the same conditions, but the OUT pin has a resistive load which produces 400 mA at 5 V. The OUT pin current, IOUT, increases with the OUT pin voltage. The communication packets that occur after IOUT increases are sent to adjust the RECT voltge to the appropriate level. Figure 37 shows the bq51003 under a no load condition until a 400-mA resistive load is added. Communication packets are sent until the RECT has come to the appropriate steady state value. Figure 35. bq51003 Added to TX With No Load Figure 36. bq51003 Added to TX With 400-mA Resistive Load Figure 37. bq51003 – No Load to 400-mA Resistive Load Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 31 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com Typical Applications (continued) 9.2.2 Dual Power Path: Wireless Power and DC Input This application discussion expands the bq51003 in a Qi-compliant system from the previous solution and adds a secondary DC input. The bq51003 reacts to the added power and disables wireless power transfer then passes the DC voltage. When the DC voltage is removed, the bq51003 reinitiates wireless power transfer then enables its OUT pin. System Load Q1 USB or AC Adapter Input /AD-EN AD OUT CCOMM1 C5 COMM1 C4 BOOT1 ROS2 ROS1 CBOOT1 RECT C1 AC1 C3 COIL D1 R4 bq51003 C2 TS-CTRL AC2 NTC BOOT2 CBOOT2 HOST COMM2 /CHG CLAMP2 EN1 Bi-State CLAMP1 EN2 Bi-State CCOMM2 CCLAMP2 CCLAMP1 ILIM R1 FOD Tri-State PGND RFOD Copyright © 2016, Texas Instruments Incorporated Figure 38. bq51003 Used as a Wireless Power Receiver and Power Supply for System Loads with Adapter Power-Path Multiplexing Only One of ROS1 or ROS2 Needed 9.2.2.1 Design Requirements This solution adds the ability to disable wireless charging with the AD and AD_EN pins. A DC supply (USB or AC adapter with DC output) can also be used to power the subsystem. This can occur during wireless power transfer or without wireless power transfer. The system must allow power transfer without any backflow or damage to the circuitry. 32 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 Typical Applications (continued) 9.2.2.2 Detailed Design Procedure The basic components used in Figure 32 are reused here in Figure 38. The additional circuitry needed for source control will be discussed. Adding a blocking FET while using the bq51003 for control is the only addition to the circuitry. The AD pin will be tied to the DC input as a threshold detector. The AD_EN pin will be used to enable or disable the blocking FET. The blocking FET must be chosen to handle the appropriate current level and the DC voltage level supplied from the input. In this example, the expectation is that the DC input will be 5 V with a maximum current of 500 mA (same configuration as the wireless power supply). The CSD75207W15 is a good fit because it is a P-Channel, –20-V, 3.9-A FET pair in a 1.5-mm2 WCSP. 9.2.2.3 Application Curves The following figures show the bq51003EVM-764 when DC voltage is applied to the AD pin and when it is removed. The AD pin signal shows when the DC power is applied or removed. The AD_EN signal shows the response of to the added or removed power on the AD pin. The OUT pin signal shows the impact to the OUT pin during the AD addition or removal. IOUT shows the current being sourced by the OUT pin. The resistive load is set to produce 400 mA at 5 V. On both of the following plots, note the communication packets are not present when AD_EN is low. Figure 39 shows the bq51003EVM-764 when a power source is added to the AD pin. The bq51003 disables the OUT pin then sets AD_EN to low which enables the CSD75207W15, passing the DC voltage to the load. Figure 40 shows the response when the DC voltage is removed. Note the time after the removal before OUT is enabled which allows the bq51003 to communicate with the transmitter to get RECT back to the correct level. Figure 39. DC Voltage is Added at AD Figure 40. DC Voltage is Removed from AD Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 33 bq51003 SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 www.ti.com 10 Power Supply Recommendations The bq51003 requires a Qi-compatible transmitter as its power source. 11 Layout 11.1 Layout Guidelines • • • • • • Keep the trace resistance as low as possible on AC1, AC2, and BAT. Detection and resonant capacitors must be placed as close to the device as possible. COMM, CLAMP, and BOOT capacitors must be placed as close to the device as possible. Via interconnect on PGND net is critical for appropriate signal integrity and proper thermal performance. High-frequency bypass capacitors must be placed close to RECT and OUT pins. ILIM and FOD resistors are important signal paths and the loops in those paths to PGND must be minimized. Signal and sensing traces are the most sensitive to noise; the sensing signal amplitudes are usually measured in mV, which is comparable to the noise amplitude. Make sure that these traces are not being interfered by the noisy and power traces. AC1, AC2, BOOT1, BOOT2, COMM1, and COMM2 are the main source of noise in the board. These traces should be shielded from other components in the board. It is usually preferred to have a ground copper area placed underneath these traces to provide additional shielding. Also, make sure they do not interfere with the signal and sensing traces. The PCB should have a ground plane (return) connected directly to the return of all components through vias (two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal components). For a 1-A fast charge current application, the current rating for each net is as follows: • AC1 = AC2 = 1.2 A • OUT = 500 mA • RECT = 100 mA (RMS) • COMMx = 300 mA • CLAMPx = 500 mA • All others can be rated for 10 mA or less 11.2 Layout Example CLAMP2 capacitor BOOT2 TS /C AC2 2 M M CO OUT BOOT2 capacitor L TR ILIM EN2 AC1-AC2 capacitors PGND TERM AD /CHG CLAMP2 capacitor COMM1 capacitor OUT BOOT1 AC1 Series capacitors AC1 COMM1 BOOT1 capacitor BAT capacitors Figure 41. bq51003 Layout Schematic 34 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 bq51003 www.ti.com SLUSBC8C – DECEMBER 2013 – REVISED JULY 2018 12 Device and Documentation Support 12.1 Device Support 12.1.1 Development Support For development support, see the following: • TIDA-00318 Qi (WPC) Compliant Wireless Charger for Low Power Wearable Applications • TIDA-00329 Tiny Wireless Receiver for Low Power Wearable Applications Reference Design • TIDA-00712 Smartwatch Battery Management Solution Reference Design • TIDA-00668 50mA Wireless Charger Booster Pack Reference Design • TIDA-00881 50mA Wireless Charger with 19mm Coil BoosterPack Reference Design • PMP11311 Power Reference Design for a Wearable Device with Wireless Charging using the bq51003 and bq25120 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated Product Folder Links: bq51003 35 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) BQ51003YFPR ACTIVE DSBGA YFP 28 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 BQ51003 BQ51003YFPT ACTIVE DSBGA YFP 28 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 BQ51003 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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