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BQ76925
SLUSAM9E – JULY 2011 – REVISED APRIL 2020
BQ76925 3-Series to 6-Series Cell Li-Ion and Li-Phosphate
Battery Monitor (Analog Front End)
1 Features
3 Description
•
The BQ76925 host-controlled analog front end (AFE)
is part of a complete pack monitoring, balancing, and
protection system for 3-, 4-, 5-, or 6-series cell li-ion
and li-polymer batteries. The BQ76925 device allows
a host controller to monitor individual cell voltages,
pack current and temperature easily. The Host may
use this information to determine unsafe or faulty
operating
conditions
such
as
overvoltage,
undervoltage, overtemperature, overcurrent, cell
imbalance, state of charge, and state of health
conditions.
1
•
•
•
•
•
•
•
•
•
•
Analog interface for host cell measurement
– Cell input MUX, level shifter, and scaler
– 1.5-/ 3.0-V low-drift, calibrated reference
allows accurate analog-to-digital conversions
Analog interface for host current measurement
– Variable gain current sense amplifier capable
of operation with 1-mΩ sense resistor
Switchable thermistor bias output for host
temperature measurements
Overcurrent comparator with dynamically
adjustable threshold
– Alerts host to potential overcurrent faults
– Wakes up host on load connect
Integrated cell balancing FETs
– Individual host control
– 50 mA per cell balancing current
Supports cell sense-line open wire detection
Integrated 3.3-V regulator for powering microcontroller or LEDs
I2C interface for host communications
– Optional packet CRC for robust operation
Supply voltage range from 4.2 V to 26.4 V
Low power consumption
– 40 µA typical in NORMAL mode
– 1.5 µA maximum in SLEEP mode
20-pin TSSOP or 24-pin VQFN package
Cell input voltages are level-shifted, multiplexed,
scaled, and output for measurement by a host ADC.
A dedicated pin provides a low-drift calibrated
reference voltage to enable accurate measurements.
Device Information(1)
PART NUMBER
•
Primary Protection in Li-Ion Battery Packs
– Cordless power tools
– Light electric vehicles (e-Bike, scooter, for
example)
– UPS systems
– Medical Equipment
– Portable Test Equipment
BODY SIZE (NOM)
BQ76925
TSSOP (20)
4.00 mm × 4.00 mm
BQ76925
VQFN (24)
6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
PACK+
RBAT
CV3P3
CBAT
BAT
VCTL
VC6
V3P3
VC5
SCL
RIN
CIN
RIN
CIN
RIN
RIN
CIN
CIN
CREF
(Optional)
VREF
bq76925
VC2
VTB
VC1
VCOUT
VC0
VIOUT
VSS
ALERT
SENSEN
CIN
VCC
I2C
SDA
VC4
VC3
RIN
RIN
2 Applications
PACKAGE
ADC Ref
MCU
RTH
CTH
RNTC
ADC1 (Temp)
ADC2 (Voltage)
ADC3 (Current)
COUT
SENSEP
GPIO (Alert)
GPIO
GPIO
FET Control
Or
Fault
signaling
VSS
COUT
CIN
CSENSE
RIN
RSENSEN
RSENSEP
CIN
RSENSE
PACK-
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
BQ76925
SLUSAM9E – JULY 2011 – REVISED APRIL 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (Continued) ........................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
1
1
1
2
3
3
4
Absolute Maximum Ratings ...................................... 4
ESD Ratings ............................................................ 4
Recommended Operating Conditions....................... 5
Thermal Information .................................................. 5
Electrical Characteristics: Supply Current ................ 6
Internal Power Control (Startup and Shutdown) ....... 6
3.3-V Voltage Regulator............................................ 6
Voltage Reference .................................................... 7
Cell Voltage Amplifier................................................ 7
Current Sense Amplifier .......................................... 7
Overcurrent Comparator ......................................... 8
Internal Temperature Measurement ....................... 8
Cell Balancing and Open Cell Detection................. 8
I2C Compatible Interface......................................... 9
Typical Characteristics .......................................... 10
8
Detailed Description ............................................ 11
8.1
8.2
8.3
8.4
8.5
8.6
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
Programming...........................................................
Register Maps ........................................................
11
12
12
18
20
22
Application and Implementation ........................ 28
9.1 Application Information............................................ 28
9.2 Typical Application ................................................. 29
10 Power Supply Recommendations ..................... 32
11 Layout................................................................... 32
11.1 Layout Guidelines ................................................. 32
11.2 Layout Example .................................................... 32
12 Device and Documentation Support ................. 34
12.1
12.2
12.3
12.4
12.5
12.6
Documentation Support .......................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
34
34
34
34
34
34
13 Mechanical, Packaging, and Orderable
Information ........................................................... 34
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (October 2016) to Revision E
Page
•
Changed the title of the data sheet ....................................................................................................................................... 1
•
Changed ZXTP2504DFH to ZXTP25040DFH...................................................................................................................... 28
Changes from Revision C (July 2015) to Revision D
Page
•
Added test condition n = 1 – 5 at 25°C and MAX value for IVCn parameter ........................................................................... 6
•
Added Receiving Notification of Documentation Updates section ....................................................................................... 34
Changes from Revision B (December 2011) to Revision C
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
•
Moved content to new sections and added hyperlinks to corresponding sections, figures, tables and documents. ............. 1
•
Moved RBAT, CBAT, RIN, CIN, RSENSEN, RSENSEP, CSENSE, RVCTL, CV3P3, CREF, and COUT table rows to Design Requirements .. 5
Changes from Revision A (July 2011) to Revision B
•
2
Page
Added 24-pin QFN (RGE) Package to Production Data ........................................................................................................ 3
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BQ76925
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SLUSAM9E – JULY 2011 – REVISED APRIL 2020
5 Description (Continued)
The voltage across an external-sense resistor is amplified and output to a host ADC for both charge and
discharge current measurements. Two gain settings enable operation with a variety of sense resistor values over
a wide range of pack currents.
To enable temperature measurements by the host, the AFE provides a separate output pin for biasing an
external thermistor network. This output can be switched on and off under host control to minimize power
consumption.
The BQ76925 device includes a comparator with a dynamically selectable threshold for monitoring current. The
comparator result is driven through an open-drain output to alert the host when the threshold is exceeded. This
feature can be used to wake up the host on connection of the load, or to alert the host to a potential fault
condition.
The BQ76925 device integrates cell balancing FETs that are fully controlled by the host. The balancing current is
set by external resistors up to a maximum value of 50 mA. These same FETs may be utilized in conjunction with
cell voltage measurements to detect an open wire on a cell sense-line.
The host communicates with the AFE through an I2C interface. A packet CRC may optionally be used to ensure
robust operation. The device may be put into a low-current sleep mode through the I2C interface and awakened
by pulling up the ALERT pin.
6 Pin Configuration and Functions
PW Package
20-Pin TTSOP
Top View
BAT
VCTL
NC
NC
V3P3
SCL
23
22
21
20
19
V3P3
24
RGE Package
24-Pin QFN With Thermal Pad
Top View
VCTL
1
20
BAT
2
19
SCL
VC6
3
18
SDA
VC5
4
17
VREF
VC4
5
16
VTB
VC6
1
18
SDA
VC3
6
15
VCOUT
VC5
2
17
VREF
VC2
7
14
VIOUT
VC4
3
16
VTB
VC1
8
13
ALERT
VC0
9
12
SENSEP
VC3
4
15
VCOUT
VSS
10
11
SENSEN
VC2
5
14
VIOUT
VC1
6
13
ALERT
7
8
9
10
11
12
VC0
VSS
NC
NC
SENSEN
SENSEP
Thermal Pad
Pin Functions
NAME
PIN NO.
TYPE
DESCRIPTION
TSSOP
VQFN
VCTL
1
23
Output
3.3-V Regulator control voltage (1)
ALERT
13
13
Output
Overcurrent alert (open drain)
BAT
2
24
Power
Supply voltage, tied to most positive cell
NC
—
9, 10, 21, 22
—
SCL
19
19
Input
I2C Clock (open drain)
SDA
18
18
Input / Output
I2C Data (open drain)
SENSEN
11
11
Input
(1)
No Connection (leave open)
Negative current sense
When a bypass FET is used to supply the regulated 3.3-V load current, VCTL automatically adjusts to keep V3P3 = 3.3 V. If VCTL is
tied to BAT, the load current is supplied through V3P3.
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Pin Functions (continued)
NAME
PIN NO.
TYPE
DESCRIPTION
TSSOP
VQFN
SENSEP
12
12
Input
V3P3
20
20
Output
VC6
3
1
Input
Sense voltage for most positive cell
VC5
4
2
Input
Sense voltage for second most positive cell
VC4
5
3
Input
Sense voltage for third most positive cell
VC3
6
4
Input
Sense voltage for fourth most positive cell
VC2
7
5
Input
Sense voltage for fifth most positive cell
VC1
8
6
Input
Sense voltage for least positive cell
VC0
9
7
Input
Sense voltage for negative end of cell stack
VCOUT
15
15
Output
Cell measurement voltage
VIOUT
14
14
Output
Current measurement voltage
VREF
17
17
Output
Reference voltage for ADC
VSS
10
8
Power
Ground
VTB
16
16
Output
Bias voltage for thermistor network
Positive current sense
3.3-V Regulator
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VBAT
VI
Supply voltage
Input voltage
(1)
MIN
MAX
UNIT
BAT
–0.3
36
V
Cell input differential, VCn to VCn+1, n = 0 to 5
–0.3
9
Cell input, VCn, n = 1 to 6
–0.3
(6 × n)
BAT to VC6 differential
–10
10
–3
3
VC0
(2)
SENSEP, SENSEN
–3
3
SCL, SDA
–0.3
6
VCOUT, VIOUT, VREF
–0.3
3.6
VTB, V3P3
–0.3
7
ALERT
–0.3
30
VCTL
–0.3
36
V
VO
Output voltage
ICB
Cell balancing current
70
mA
IIN
Cell input current
–25
70
mA
Tstg
Storage temperature
–65
150
°C
(1)
(2)
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Negative voltage swings on VC0 in the absolute maximum range can cause unwanted circuit behavior and should be avoided.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
4
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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SLUSAM9E – JULY 2011 – REVISED APRIL 2020
7.3 Recommended Operating Conditions (1)
MIN
Supply voltage
BAT
4.2
Cell input differential, VCn to VCn+1, n = 0 to 5
1.4
NOM
Cell input, VCn, n = 1 to 6
BAT to VC6 differential
VI
SCL, SDA
Output voltage
4.4
V
V
8
V
V
–125
375
mV
0
5.5
V
5.5
V
0
26.4
V
0
V3P3 +
0.2
V
(2)
V3P3
Backfeeding
ALERT
Wakeup function
VCOUT, VIOUT
VO
V
0
SENSEP
VREF
UNIT
26.4
4.4 × n
–8
VC0, SENSEN
Input voltage
MAX
REFSEL = 0
1.5
REFSEL = 1
3
VTB
V
V
5.5
V3P3
Regulating
3.3
VCTL
ALERT
Alert function
V
V
0.8
26.4
V
0
5.5
V
ICB
Cell balancing current
0
50
mA
TA
Operating free-air temperature
–25
85
°C
TFUNC
Functional free-air temperature
–40
100
°C
(1)
(2)
All voltages are relative to VSS, except “Cell input differential.”
Internal 3.3-V regulator may be overridden (that is, backfed) by applying an external voltage larger than the regulator voltage.
7.4 Thermal Information
BQ76925
THERMAL METRIC (1)
PW (TSSOP)
RGE (VQFN)
20 PINS
24 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
97.5
36
°C/W
RθJC (top)
Junction-to-case (top) thermal resistance
31.7
38.6
°C/W
RθJB
Junction-to-board thermal resistance
48.4
14
°C/W
ψJT
Junction-to-top characterization parameter
1.5
0.6
°C/W
ψJB
Junction-to-board characterization parameter
47.9
14
°C/W
RθJC (bot)
Junction-to-case (bottom) thermal resistance
n/a
4.6
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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7.5 Electrical Characteristics: Supply Current
BAT = 4.2 to 26.4 V, VCn = 1.4 to 4.4, TA = –25°C to +85°C
Typical values stated where TA = 25°C and BAT= 21.6 V (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
Normal mode supply current
All device functions enabled
All pins unloaded
SDA and SCL high
40
48
µA
Standby mode 1 supply current
V3P3 and overcurrent monitor enabled
All pins unloaded
All other device functions disabled
SDA and SCL high
14
17
µA
IDD3
Standby mode 2 supply current
V3P3 enabled
All pins unloaded
All device functions disabled
SDA and SCL high
12
14
V
IDD4
Sleep mode supply current
V3P3 disabled
All pins unloaded
All device functions disabled
SDA and SCL low
1
1.5
µA
IVCn
Input current for selected cell
All cell voltages equal
Cell balancing disabled
Open cell detection disabled
during cell voltage monitoring
Cell to cell input current difference
All cell voltages equal
Cell balancing disabled
Open cell detection disabled
IDD1
IDD2
∆IVCn
n=6
2.4
2.7
n=1–5
< 0.5
n = 1 – 5 at 25°C
< 0.3
µA
< 0.2
µA
UNIT
7.6 Internal Power Control (Startup and Shutdown)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
(1)
4.3
4.5
4.7
V
Initial BAT > 1.4 VBAT rising (1)
6.5
7
7.5
V
3.6
V
Initial BAT < 1.4 VBAT rising
VPOR
Power on reset voltage
Measured at BAT
pin
VSHUT
Shutdown voltage (2)
Measured at BAT pin, BAT falling
tPOR
Time delay after POR before
I2C comms allowed
CV3P3 = 4.7 µF
VWAKE
Wakeup voltage
Measured at ALERT pin
tWAKE_PLS
Wakeup signal pulse width
tWAKE_DLY
Time delay after wakeup before
I2C comms allowed
(1)
(2)
1
ms
0.8
2
V
1
5
μs
1
ms
CV3P3 = 4.7 µF
Initial power up will start with BAT < 1.4 V, however if BAT falls below VSHUT after rising above VPOR, the power on threshold depends
on the minimum level reached by BAT after falling below VSHUT.
Following POR, the device will operate down to this voltage.
7.7 3.3-V Voltage Regulator
PARAMETER
VCTL
Regulator control voltage
VV3P3
Regulator output
IREG
V3P3 output current
ISC
TEST CONDITION
(1) (2)
MIN
Measured at VCTL, V3P3 regulating
3.3
Measured at V3P3, IREG = 0 to 4 mA,
BAT = 4.2 to 26.4 V
3.2
V3P3 short circuit current limit
V3P3 = 0.0 V
10
VTB
Thermistor bias voltage
Measured at VTB, ITB = 0
ITB
Thermistor bias current
RTB
Thermistor bias internal resistance RDS(ON) for internal FET switch, ITB = 1 mA
(1)
(2)
6
TYP
3.3
MAX
UNIT
26.4
V
3.4
V
4
mA
17
mA
VV3P3
V
1
90
130
mA
Ω
When a bypass FET is used to supply the regulated 3.3 V load current, VCTL automatically adjusts to keep V3P3 = 3.3 V. Note that
VCTL,MIN and the FET VGS will determine the minimum BAT voltage at which the bypass FET will operate.
If VCTL is tied to BAT, the load current is supplied through V3P3.
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7.8 Voltage Reference
PARAMETER
VREF
Voltage reference
output
TEST CONDITION
Before gain correction,
TA = 25°C
After gain correction,
TA = 25°C
VREF_CAL
Reference
calibration voltage
Measured at VCOUT
∆VREF
Voltage reference
tolerance
TA = 0 – 50°C
IREF
VREF output current
(1)
(1)
MAX
UNIT
REF_SEL = 0
1.44
MIN
TYP
1.56
V
REF_SEL = 1
2.88
3.12
REF_SEL = 0
–0.1%
REF_SEL = 1
VCOUT_SEL = 2
1.5
+0.1%
–0.1%
3
+0.1%
–0.9%
0.5 × VREF
+0.9%
VCOUT_SEL = 3
–0.5% 0.85 × VREF
+0.5%
(0.85 × VREF) – (0.5 × VREF)
–0.3% 0.35 × VREF
+0.3%
–40
V
V
40 ppm/°C
10
µA
Gain correction factor determined at final test and stored in non-volatile storage. Gain correction is applied by Host controller.
7.9 Cell Voltage Amplifier
PARAMETER
TEST CONDITION
MIN
TYP
MAX
REF_SEL = 0
–1.6%
0.3
1.5%
REF_SEL = 1
–1.6%
0.6
1.5%
GVCOUT
Cell voltage amplifier gain
Measured from VCn
to VCOUT
OVCOUT
Cell voltage amplifier offset
Measured from VCn to VCOUT
VCOUT
∆VCOUT
Cell voltage amp output range
(1)
Cell voltage amplifier accuracy
VCOUT output current (5)
tVCOUT
Delay from VCn select to VCOUT
(5)
–16
VCn = 1.4 V to 4.4 V,
After correction, (2)
Measured at VCOUT (3)
REF_SEL = 1 (4)
15
mV
REF_SEL = 0
1.47
1.5
1.53
V
REF_SEL = 1
2.94
3
3.06
V
Measured at VCOUT,
VCn = 0 V
IVCOUT
(1)
(2)
(3)
(4)
Measured at VCOUT,
VCn = 5 V
UNIT
0
V
TA = 25°C
–3
3
TA = 0°C to 50°C
–5
5
TA = –25°C to +85°C
–8
8
Output step of 200 mV, COUT = 0.1 µF
mV
10
µA
100
µs
For VCn values greater than 5 V, VCOUT clamps at approximately V3P3.
Correction factor determined at final test and stored in non-volatile storage. Correction is applied by Host controller.
Output referred. Input referred accuracy is calculated as ∆VCOUT / GVCOUT (for example, 3 / 0.6 = 5).
Correction factors are calibrated for gain of 0.6. Tolerance at gain of 0.3 is approximately doubled. Contact TI for information on devices
calibrated to a gain of 0.3.
Max DC load for specified accuracy.
7.10 Current Sense Amplifier
PARAMETER
TEST CONDITION
GVIOUT
Current sense amplifier gain
Measured from SENSEN,
SENSEP to VIOUT
VIIN
Current sense amp input range
Measured from SENSEN,
SENSEP to VSS
Current sense amp output range
Measured at VIOUT
Zero current output
Measured at VIOUT
SENSEP = SENSEN
VIOUT
∆VIOUT
Current amplifier accuracy
IVIOUT
VIOUT output current
(1)
MIN
TYP
MAX
UNIT
–125
375
mV
REF_SEL = 0
0.25
1.25
V
REF_SEL = 1
0.5
2.5
V
I_GAIN = 0
4
I_GAIN = 1
8
REF_SEL = 0
1
V
REF_SEL = 1
2
V
–1%
(1)
1%
10
µA
Max DC load for specified accuracy
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7.11 Overcurrent Comparator
PARAMETER
TEST CONDITION
MIN
Comparator amplifier gain
VITRIP
Current comparator trip threshold (2)
MAX
5
Measured from SENSEP to comparator
input
GVCOMP
UNIT
V
1
25
400
mV
VITRIP = 25 mV
–6
6
mV
VITRIP > 25 mV
–10%
10%
V
0.4
V
∆VITRIP
Current comparator accuracy
VOL_ALERT
ALERT Output Low Logic
VOH_ALERT
ALERT Output High Logic
IALERT
ALERT Pulldown current
ALERT = 0.4 V, Output driving low
IALERT_LKG
ALERT Leakage current
ALERT = 5 V, Output Hi-Z
tOC
Comparator response time
(1)
(2)
(3)
TYP
Minimum VBAT for comparator operation (1)
VBAT_COMP
IALERT = 1 mA
(3)
NA
NA
NA
1
mA