CD74FCT244SM96G4

CD74FCT244, CD74FCT244AT BiCMOS OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCBS722B – JULY 2000 – REVISED AUGUST 2003 D D D D D D D D CD74FCT244 . . . E, M, OR SM PACKAGE CD74FCT244AT . . . E OR M PACKAGE (TOP VIEW) BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates 64-mA Output Sink Current Output Voltage Swing Limited to 3.7 V SCR Latch-Up-Resistant BiCMOS Process and Circuit Design 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description/ordering information 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 The CD74FCT244 and CD74FCT244AT are octal buffer/line drivers with 3-state outputs using a small-geometry BiCMOS technology. The output stages are a combination of bipolar and CMOS transistors that limit the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA. These devices are organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PDIP – E TOP-SIDE MARKING Tube CD74FCT244E Tube CD74FCT244M Tape and reel CD74FCT244M96 SSOP – SM Tape and reel CD74FCT244SM96 FCT244SM PDIP – E Tube CD74FCT244ATE CD74FCT244ATE Tube CD74FCT244ATM Tape and reel CD74FCT244ATM96 SOIC – M 0°C 0 C to 70 70°C C ORDERABLE PART NUMBER PACKAGE† TA SOIC – M CD74FCT244E 74FCT244M 74FCT244ATM † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each buffer/driver) INPUTS OE A OUTPUT Y L H H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CD74FCT244, CD74FCT244AT BiCMOS OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCBS722B – JULY 2000 – REVISED AUGUST 2003 logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† DC supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V DC input clamp current, IIK (VI < –0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA DC output clamp current, IOK (VO < –0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA DC output sink current per output pin, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA DC output source current per output pin, IOH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA Continuous current through VCC, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 mA Continuous current through GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528 mA Package thermal impedance, θJA (see Note 1): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W SM package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) MIN MAX UNIT 4.75 5.25 V VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 IOL ∆t/∆v High-level input voltage 2 V 0.8 V VCC VCC V High-level output current –15 mA Low-level output current 64 mA Input transition rise or fall rate (slew rate) 10 ns/V V TA Operating free-air temperature 0 70 °C NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CD74FCT244, CD74FCT244AT BiCMOS OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCBS722B – JULY 2000 – REVISED AUGUST 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C MIN MAX VCC VIK VOH II = –18 mA IOH = –15 mA 4.75 V VOL II IOL = 64 mA VI = VCC or GND 4.75 V 0.55 5.25 V IOZ IOS† VO = VCC or GND VI = VCC or GND, 5.25 V ICC ∆ICC‡ Ci VI = VCC or GND VO = VCC or GND Co MIN –1.2 4.75 V 2.4 MAX UNIT –1.2 V 2.4 V 0.55 V ±0.1 ±1 mA ±0.5 ±10 –60 –60 mA 5.25 V VI = VCC or GND, VO = 0 IO = 0 mA 5.25 V 8 80 mA One input at 3.4 V, Other inputs at VCC or GND 5.25 V 1.6 1.6 mA 10 10 pF 15 15 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 100 ms. ‡ This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. switching characteristics over recommended operating VCC = 5 V ± 0.25 V (unless otherwise noted) (see Figure 1) free-air CD74FCT244 FROM (INPUT) TO (OUTPUT) tpd A ten tdis PARAMETER temperature range, CD74FCT244AT TA = 25°C TYP MIN MAX Y 4.5 1.5 OE Y 6 OE Y 5 UNIT TA = 25°C TYP MIN MAX 6.5 3.8 1.5 5.3 ns 1.5 8 4.8 1.5 6.5 ns 1.5 7 4.5 1.5 5.8 ns TYP MAX noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C PARAMETER VOL(P) VOH(V) Quiet output, maximum dynamic VOL VIH(D) VIL(D) High-level dynamic input voltage MIN Quiet output, minimum dynamic VOH UNIT 1 V 0.5 V 2 Low-level dynamic input voltage V 0.8 V TYP UNIT operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz 35 pF 3 CD74FCT244, CD74FCT244AT BiCMOS OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCBS722B – JULY 2000 – REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test CL = 50 pF (see Note A) 500 Ω From Output Under Test Test Point Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 S1 Open 7V Open 7V tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω Open Drain LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 1.5 V 10% 90% 3V 1.5 V 10% 0 V 90% tr tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V 1.5 V Input th 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V 1.5 V Input 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output tPLZ ≈3.5 V 1.5 V tPZH VOH 1.5 V VOL 1.5 V 0V Output Waveform 1 (see Note B) tPLH 1.5 V 1.5 V tPZL VOH In-Phase Output 3V Output Control Output Waveform 2 (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 1.5 V V VOH – 0.3 V OH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr and tf = 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) CD74FCT244ATE ACTIVE PDIP N 20 20 RoHS & Non-Green NIPDAU N / A for Pkg Type 0 to 70 CD74FCT244ATE Samples CD74FCT244ATM ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74FCT244ATM Samples CD74FCT244ATM96 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74FCT244ATM Samples CD74FCT244E ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 CD74FCT244E Samples CD74FCT244M ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74FCT244M Samples CD74FCT244M96 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74FCT244M Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of