CSD13302W

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents CSD13302W SLPS535 – MARCH 2015 CSD13302W 12 V N Channel NexFET™ Power MOSFET 1 Features • • • • • • • 1 Product Summary Ultra Low On Resistance Low Qg and Qgd Small Footprint 1 mm × 1 mm Low Profile 0.62 mm Height Pb Free RoHS Compliant Halogen Free TA = 25°C TYPICAL VALUE Drain-to-Source Voltage 12 V Qg Gate Charge Total (4.5 V) 6.0 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage 2.1 nC VGS = 2.5 V 21.2 mΩ VGS = 4.5 V 14.6 mΩ 1.0 V Ordering Information(1) 2 Applications • • • UNIT VDS Battery Management Load Switch Battery Protection Device Qty Media Package Ship CSD13302W 3000 7-Inch Reel CSD13302WT 250 7-Inch Reel 1.0 mm × 1.0 mm Wafer Level Package Tape and Reel (1) For all available packages, see the orderable addendum at the end of the data sheet. 3 Description This 14.6 mΩ, 12 V, N-Channel device is designed to deliver the lowest on resistance and gate charge in a small 1 x 1 mm outline with excellent thermal characteristics and an ultra low profile. Top View Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage 12 V VGS Gate-to-Source Voltage ±10 V ID Continuous Drain Current (1) 1.6 A IDM Pulsed Drain Current (2) 29 A PD Power Dissipation (3) 1.8 W TJ, Tstg Operating Junction and Storage Temperature Range –55 to 150 °C (1) Device Operating at a temperature of 105ºC (2) Min Cu Typ RθJA = 275ºC/W, Pulse width ≤100 μs, duty cycle ≤1% (3) Max Cu Typ RθJA = 70ºC/W RDS(on) vs VGS Gate Charge 5 TC = 25° C, I D = 1 A TC = 125° C, I D = 1 A 30 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) 35 25 20 15 10 5 0 ID = 1 A VDS = 6 V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 1 2 3 4 5 6 VGS - Gate-To-Source Voltage (V) 7 8 D007 0 1 2 3 4 5 Qg - Gate Charge (nC) 6 7 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD13302W SLPS535 – MARCH 2015 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 6 Device and Documentation Support.................... 7 6.1 Trademarks ............................................................... 7 6.2 Electrostatic Discharge Caution ................................ 7 6.3 Glossary .................................................................... 7 7 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 CSD13302W Package Dimensions .......................... 8 7.2 Tape and Reel Information ....................................... 9 4 Revision History 2 DATE REVISION NOTES March 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W CSD13302W www.ti.com SLPS535 – MARCH 2015 5 Specifications 5.1 Electrical Characteristics (TA = 25°C) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-Source Voltage VGS = 0 , ID = 250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 9.6 V 1 μA IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 10 V 100 nA VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA V RDS(on) Drain-to-Source On-Resistance gƒs Transconductance 12 V 1.0 1.3 VGS = 2.5 V, ID = 1 A 0.7 21.2 25.8 VGS = 4.5 V, ID = 1 A 14.6 17.1 VDS = 1.2 V, ID = 1 A 10 mΩ S DYNAMIC CHARACTERISTICS CISS Input Capacitance COSS Output Capacitance 663 862 pF 211 274 pF CRSS Rg Reverse Transfer Capacitance 151 196 pF Series Gate Resistance 3.6 7.2 Ω Qg Gate Charge Total (4.5 V) 6.0 7.8 nC Qgd Gate Charge Gate-to-Drain Qgs Gate Charge Gate-to-Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tƒ Fall Time VGS = 0 V, VDS = 6 V, ƒ = 1 MHz VDS = 6 V, ID = 1 A VDS = 6 V, VGS = 0 V VDS = 6 V, VGS = 4.5 V, ID = 1 A RG = 0 Ω 2.1 nC 0.7 nC 0.7 nC 1.3 nC 6 ns 7 ns 17 ns 7 ns DIODE CHARACTERISTICS VSD Diode Forward Voltage IS = 1 A, VGS = 0 V Qrr Reverse Recovery Charge trr Reverse Recovery Time 0.7 VDS= 6 V, IS = 1 A, di/dt = 200 A/μs 1.0 V 11.6 nC 19.6 ns 5.2 Thermal Information (TA = 25°C unless otherwise stated) THERMAL METRIC RθJA (1) (2) MIN TYP Junction-to-Ambient Thermal Resistance (1) 275 Junction-to-Ambient Thermal Resistance (2) 70 MAX UNIT °C/W Device mounted on FR4 material with minimum Cu mounting area. Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu. P-Chan 1.0x1.0 CSP TTA MAX Rev1 P-Chan 1.0x1.0 CSP TTA MIN Rev1 Typical RθJA = 275°C/W when mounted on minimum pad area of 2 oz. Cu. Typical RθJA = 70°C/W when mounted on 1 inch2 of 2 oz. Cu. M0149-01 M0150-01 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W 3 CSD13302W SLPS535 – MARCH 2015 www.ti.com 5.3 Typical MOSFET Characteristics (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W CSD13302W www.ti.com SLPS535 – MARCH 2015 Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 60 18 IDS - Drain-To-Source Current (A) IDS - Drain-to-Source Current (A) 20 16 14 12 10 8 6 4 VGS = 2.5 V VGS = 3.5 V VGS = 4.5 V 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 VDS - Drain-to-Source Voltage (V) 0.7 TC = 125° C TC = 25° C TC = -55° C 50 40 30 20 10 0 0.6 0.8 1 1.4 1.8 2.2 2.6 VGS - Gate-To-Source Voltage (V) D002 3 D003 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 10000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 4 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 5 4.5 3.5 3 2.5 2 1.5 1000 100 1 0.5 0 10 0 1 2 ID = 1 A 3 4 5 Qg - Gate Charge (nC) 6 7 0 2 D004 4 6 8 10 VDS - Drain-to-Source Voltage (V) 12 D005 VDS = 6 V Figure 4. Gate Charge Figure 5. Capacitance 35 RDS(on) - On-State Resistance (m:) 1.4 VGS(th) - Threshold Voltage (V) 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -75 TC = 25° C, I D = 1 A TC = 125° C, I D = 1 A 30 25 20 15 10 5 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 175 0 1 D006 2 3 4 5 6 VGS - Gate-To-Source Voltage (V) 7 8 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W 5 CSD13302W SLPS535 – MARCH 2015 www.ti.com Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 10 1.3 VGS = 2.5 V VGS = 4.5 V 1.2 1.1 1 0.9 0.8 0.7 -75 TC = 25qC TC = 125qC ISD - Source-To-Drain Current (A) Normalized On-State Resistance 1.4 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0 175 0.2 0.4 0.6 0.8 VSD - Source-To-Drain Voltage (V) D008 1 D009 ID = 1 A Figure 9. Typical Diode Forward Voltage Figure 8. Normalized On-State Resistance vs Temperature 4.5 IDS - Drain-to-Source Current (A) IDS - Drain-To-Source Current (A) 100 10 1 100 ms 10 ms 0.1 0.1 1 ms 100 µs 10 µs 1 10 VDS - Drain-To-Source Voltage (V) 50 4 3.5 3 2.5 2 1.5 1 0.5 0 -45 -20 D010 5 30 55 80 105 130 TC - Case Temperature (qC) 155 180 D011 Single Pulse, Max RθJA = 275°C/W Figure 10. Maximum Safe Operating Area 6 Figure 11. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W CSD13302W www.ti.com SLPS535 – MARCH 2015 6 Device and Documentation Support 6.1 Trademarks NexFET is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 6.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W 7 CSD13302W SLPS535 – MARCH 2015 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 CSD13302W Package Dimensions Pin 1 Mark 1 Solder Ball Ø 0.31 ±0.075 2 2 1 A 1.00 0.50 +0.00 –0.10 A B B 1.00 +0.00 –0.10 0.50 Side View Bottom View 0.04 0.62 Max 0.38 Top View 0.62 Max Seating Plate Front View M0151-01 NOTE: All dimensions are in mm (unless otherwise specified) Pin Configuration Table 8 POSITION DESIGNATION A2 Source A1 Gate B1, B2 Drain Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W CSD13302W www.ti.com SLPS535 – MARCH 2015 Land Pattern Recommendation Ø 0.25 1 2 0.50 A B 0.50 M0152-01 NOTE: All dimensions are in mm (unless otherwise specified) 7.2 Tape and Reel Information 4.00 ±0.10 Ø 1.50 ±0.10 4.00 ±0.10 Ø 0.50 ±0.05 0.78 ±0.05 1.18 ±0.05 5° Max 3.50 ±0.05 8.00 +0.30 –0.10 1.75 ±0.10 2.00 ±0.05 0.254 ±0.02 1.18 ±0.05 5° Max M0153-01 NOTE: All dimensions are in mm (unless otherwise specified space Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD13302W 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD13302W ACTIVE DSBGA YZB 4 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM CSD13302WT ACTIVE DSBGA YZB 4 250 RoHS & Green SNAGCU Level-1-260C-UNLIM 302 -55 to 150 302 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of