CSD25401Q3

Not Recommended for New Designs CSD25401Q3 www.ti.com SLPS211C – AUGUST 2009 – REVISED APRIL 2013 P-Channel NexFET™ Power MOSFETs Check for Samples: CSD25401Q3 FEATURES 1 • • • • • • • 2 Table 1. PRODUCT SUMMARY Ultra Low Qg and Qgd Low Thermal Resistance Low RDS(on) Pb Free Terminal Plating RoHS Compliant Halogen Free SON 3.3mm x 3.3mm Plastic Package VDS Drain to Source Voltage –20 V Qg Gate Charge Total (4.5V) 8.8 nC Qgd Gate Charge Gate to Drain 2.1 RDS(on) Drain to Source On Resistance Vth Threshold Voltage nC VGS = –2.5V 13.5 mΩ VGS = –4.5V 8.8 mΩ –0.85 V ORDERING INFORMATION APPLICATIONS • • • • DC-DC Converters Battery Management Load Switch Battery Protection Device Package Media CSD25401Q3 SON 3 × 3 Plastic Package 13-inch reel Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated DESCRIPTION The NexFET™ power MOSFET has been designed to minimize losses in power conversion load management applications. The SON 3×3 package offers excellent thermal performance for the size of the package. Figure 1. Top View D 1 8 S D 2 7 S D 3 6 S S 4 VALUE UNIT VDS Drain to Source Voltage –20 V VGS Gate to Source Voltage +12 / -12 V –60 A ID Continuous Drain Current, TC = 25°C Continuous Drain Current(1) –14 A IDM Pulsed Drain Current, TA = 25°C(2) –82 A PD Power Dissipation(1) 2.8 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C (1) RθJA = 45°C/W on 1inch2 Cu (2 oz.) on 0.060" thick FR4 PCB. (2) Pulse width ≤300µs , duty cycle ≤2% 5 G S RDS(ON) vs VGS Gate Charge 10 30 ID = −10A 20 TC = 125°C 15 10 TC = 25°C 5 ID = −10A VDS = −10V 9 25 −VG − Gate Voltage − V RDS(on) − On-State Resistance − mW Qty 8 7 6 5 4 3 2 1 0 0 0 1 2 3 4 5 6 7 8 −VGS − Gate to Source Voltage − V 9 10 G006 0 2 4 6 8 10 12 14 Qg − Gate Charge − nC 16 G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2013, Texas Instruments Incorporated Not Recommended for New Designs CSD25401Q3 SLPS211C – AUGUST 2009 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = –250μA IDSS Drain to Source Leakage Current VGS = 0V, VDS = –20V to –16V IGSS Gate to Source Leakage Current VDS = 0V, VGS = ±12V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = –250μA RDS(on) Drain to Source On Resistance gfs Transconductance –20 –0.6 V –1 μA –100 nA –0.85 –1.2 V VGS = –2.5V, ID = –10A 13.5 18.2 mΩ VGS = –4.5V, ID = –10A 8.8 11.7 mΩ VDS = –15V, ID = –10A 43 S Dynamic Characteristics CISS Input Capacitance VGS = 0V, VDS = –10V, f = 1MHz 1070 1400 pF pF COSS Output Capacitance 560 730 CRSS Reverse Transfer Capacitance 180 230 pF Qg Gate Charge Total (4.5V) 8.8 12.3 nC Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VDS = –10V, ID = –10A VDS = –10V, VGS = 0V VDS = –10V, VGS = –4.5V, ID = –10A , RG = 5.1Ω 2.1 nC 2.1 nC 0.9 nC 8.2 nC 8.1 ns 3.9 ns 13.5 ns 12.6 ns Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IS = –10A, VGS = 0V –0.7 VDD = –12.5V, IF = –10A, di/dt = 300A/μs 17.4 –1 nC V 21 ns THERMAL INFORMATION THERMAL METRIC (1) (2) CSD25401Q3 8 PIN θJA Junction-to-ambient thermal resistance 42.0 θJCtop Junction-to-case (top) thermal resistance 20.6 θJB Junction-to-board thermal resistance 8.8 ψJT Junction-to-top characterization parameter 0.3 ψJB Junction-to-board characterization parameter 8.7 θJCbot Junction-to-case (bottom) thermal resistance 0.1 (1) (2) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 Not Recommended for New Designs CSD25401Q3 www.ti.com SLPS211C – AUGUST 2009 – REVISED APRIL 2013 DRAIN GATE DRAIN GATE Max RθJA = 158°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 57°C/W when mounted on 1inch2 of 2 oz. Cu. SOURCE SOURCE M0137-02 M0137-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA – NormalizedThermal Impedance 10 1 0.5 0.3 0.1 Duty Cycle = t1/t2 0.1 0.05 0.01 P 0.02 0.01 t1 t2 R qJA = 126oC/W (min Cu) TJ = P x ZqJA x R qJA Single Pulse 0.001 0.001 0.01 0.1 1 10 100 tP – Pulse Duration–s Figure 2. Transient Thermal Impedance G012 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 1k 3 Not Recommended for New Designs CSD25401Q3 SLPS211C – AUGUST 2009 – REVISED APRIL 2013 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 50 50 45 VGS = −4.5V 40 35 VGS = −2V VGS = −3V 30 -ID − Drain Current − A −ID − Drain Current − A 45 25 20 VGS = −2.5V 15 10 VDS = -5V 40 35 30 25 TC = 125°C 20 15 TC = 25°C 10 VGS = −1.5V 5 5 0 0 0.5 0 0.5 1 1.5 2 2.5 3 −VDS − Drain to Source Voltage − V TC = −55°C 1.75 2 2.25 2.5 G002 1400 ID = −10A VDS = −10V 9 C − Capacitance − pF 8 f = 1MHz VGS = 0V 1200 7 6 5 4 3 2 1000 COSS = CDS + CGD CISS = CGD + CGS 800 600 CRSS = CGD 400 200 1 0 0 0 2 4 6 8 10 12 16 14 Qg − Gate Charge − nC 0 2 4 8 10 12 14 16 18 20 G004 Figure 6. Capacitance 30 RDS(on) − On-State Resistance − mW 1.4 ID = −250mA 1.2 1 0.8 0.6 0.4 0.2 0 −75 6 −VDS − Drain to Source Voltage − V G003 Figure 5. Gate Charge −VGS(th) − Threshold Voltage − V 1.5 Figure 4. Transfer Characteristics 10 ID = −10A 25 20 TC = 125°C 15 10 TC = 25°C 5 0 −25 25 75 125 175 TC − Case Temperature − °C 0 1 2 3 4 5 6 7 8 9 −VGS − Gate to Source Voltage − V G005 Figure 7. Threshold Voltage vs. Temperature 4 1.25 -VGS − Gate to Source Voltage − V G001 Figure 3. Saturation Characteristics −VG − Gate Voltage − V 1 0.75 10 G006 Figure 8. On Resistance vs. Gate Voltage Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 Not Recommended for New Designs CSD25401Q3 www.ti.com SLPS211C – AUGUST 2009 – REVISED APRIL 2013 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 1.4 100 ID = −10A VGS = −4.5V −ISD − Source to Drain Current − A Normalized On-State Resistance 1.6 1.2 1 0.8 0.6 0.4 0.2 0 −75 10 1 TC = 125°C 0.1 TC = 25°C 0.01 0.001 −25 25 75 125 175 TC − Case Temperature − °C 0 0.2 0.4 0.6 0.8 1 1.2 −VSD − Source to Drain Voltage − V G007 Figure 9. On Resistance vs. Temperature G008 Figure 10. Typical Diode Forward Voltage 70 1k −ID − Drain Current − A -ID − Drain Current − A 60 100 100ms 10 1ms 10ms 1 0.1 0.01 0.01 Area Limited by RDS(on) 100ms Single Pulse RθJA = 126°C/W (min Cu) 0.1 1 100 -VDS − Drain To Source Voltage − V Figure 11. Maximum Safe Operating Area 40 30 20 10 DC 10 50 0 −50 −25 0 25 50 75 100 125 150 175 TC − Case Temperature − °C G009 G011 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 5 Not Recommended for New Designs CSD25401Q3 SLPS211C – AUGUST 2009 – REVISED APRIL 2013 www.ti.com MECHANICAL DATA CSD25401Q3 Package Dimensions DIM MILLIMETERS MIN MAX MIN NOM MAX 0.043 A 0.950 1.000 1.100 0.037 0.039 A1 0.000 0.000 0.050 0.000 0.000 0.002 b 0.280 0.340 0.400 0.011 0.013 0.016 b1 0.310 NOM 0.012 NOM c 0.150 0.200 0.250 0.006 0.008 0.010 D 3.200 3.300 3.400 0.126 0.130 0.134 D2 1.650 1.750 1.800 0.065 0.069 0.071 0.010 d 0.150 0.200 0.250 0.006 0.008 d1 0.300 0.350 0.400 0.012 0.014 0.016 E 3.200 3.300 3.400 0.126 0.130 0.134 E2 2.350 2.450 2.550 0.093 0.096 0.100 e H 0.650 TYP 0.35 K 6 INCHES NOM 0.450 0.026 TYP 0.550 0.014 0.650 TYP 0.450 0.018 0.022 0.026 TYP L 0.35 0.550 0.014 L1 0 0 0 0 θ 0 0 0 0 Submit Documentation Feedback 0.018 0.022 Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 Not Recommended for New Designs CSD25401Q3 www.ti.com SLPS211C – AUGUST 2009 – REVISED APRIL 2013 Recommended PCB Pattern Recommended Stencil Opening Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 7 Not Recommended for New Designs CSD25401Q3 SLPS211C – AUGUST 2009 – REVISED APRIL 2013 www.ti.com 1.75 ±0.10 Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. Thickness: 0.30 ±0.05mm 6. MSL1 260°C (IR and Conection) PbF Reflow Compatible 8 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 Not Recommended for New Designs CSD25401Q3 www.ti.com SLPS211C – AUGUST 2009 – REVISED APRIL 2013 REVISION HISTORY Changes from Original (August 2009) to Revision A Page • Changed 300s to 300µs in Note 2 of the Abs Max Ratings table ........................................................................................ 1 • Changed Qg Gate Charge Total (4.5V) - max value From: 2.3 To: 12.3 .............................................................................. 2 Changes from Revision A (October 2009) to Revision B • Page Deleted the Package Marking Information section ............................................................................................................... 8 Changes from Revision B (October 2010) to Revision C Page • Replaced the THERMAL CHARACTERISTICS table with the new Thermal Information Table .......................................... 2 • Changed the CSD25401Q3 Package Dimensions section .................................................................................................. 6 • Changed the Recommended PCB Pattern section .............................................................................................................. 7 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CSD25401Q3 9 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CSD25401Q3 VSONCLIP DQG 8 2500 330.0 12.4 3.6 3.6 1.2 8.0 12.0 Q1 CSD25401Q3 VSONCLIP DQG 8 2500 330.0 12.8 3.6 3.6 1.2 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD25401Q3 VSON-CLIP DQG 8 2500 336.6 336.6 41.3 CSD25401Q3 VSON-CLIP DQG 8 2500 335.0 335.0 32.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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