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CSD75208W1015T

CSD75208W1015T

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    DSBGA6

  • 描述:

    MOS管 Dual P-Channel VDS=20V VGS=-6V ID=1.6A RDS(ON)=68mΩ@4.5V DSBGA6

  • 数据手册
  • 价格&库存
CSD75208W1015T 数据手册
Order Now Product Folder Support & Community Tools & Software Technical Documents CSD75208W1015 SLPS512A – JULY 2014 – REVISED MAY 2017 CSD75208W1015 Dual 20-V Common Source P-Channel NexFET™ Power MOSFET 1 Features • • • • • • • • 1 Product Summary Dual P-Channel MOSFETs Common Source Configuration Small Footprint 1 mm × 1.5 mm Gate-Source Voltage Clamp Gate ESD Protection –3 kV Pb Free RoHS Compliant Halogen Free TA = 25°C • • • UNIT Drain-to-Source Voltage –20 V Qg Gate Charge Total (–4.5 V) 1.9 nC Qgd Gate Charge Gate-to-Drain Drain-to-Source On-Resistance RDS(on) Drain-to-Drain On-Resistance RD1D2(on) 2 Applications TYPICAL VALUE VDS VGS(th) Battery Management Load Switch Battery Protection 0.23 nC VGS = –1.8 V 100 mΩ VGS = –2.5 V 70 mΩ VGS = –4.5 V 56 mΩ VGS = –1.8 V 190 mΩ VGS = –2.5 V 120 mΩ VGS = –4.5 V 90 mΩ Threshold Voltage –0.8 V Ordering Information(1) 3 Description This device is designed to deliver the lowest onresistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Low on-resistance coupled with the small footprint and low profile make the device ideal for battery operated space constrained applications. Top View Device Qty Media Package Ship CSD75208W1015 3000 7-Inch Reel CSD75208W1015T 250 7-Inch Reel 1.0 mm × 1.5 mm Wafer Level Package Tape and Reel (1) For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage –20 V VGS Gate-to-Source Voltage –6 V Continuous Drain-to-Drain Current, TC = 25°C –1.6 A Pulsed Drain-to-Drain Current, TC = 25°C(1) –22 A Continuous Source Pin Current –3 A Pulsed Source Pin Current(1) (2) –39 A Continuous Gate Clamp Current –0.5 A ID1D2 IS IG P0099-01 Pulsed Gate Clamp Current(1) PD Power Dissipation TJ, Tstg Operating Junction and Storage Temperature Range –7 A 0.75 W –55 to 150 °C (1) Max RθJA = 165ºC/W, pulse duration ≤100 μs, duty cycle ≤1% (2) Both devices in parallel RD1D2(on) vs VGS RDS(on) vs VGS 150 TC = 25°C, I D = −1 A TC = 125°C, I D = −1 A 240 RDS(on) - On-State Resistance (mΩ) RD1D2(on) - On-State Resistance (mΩ) 270 210 180 150 120 90 60 30 0 0 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) 6 G001 TC = 25°C, I D = −1 A TC = 125°C, I D = −1 A 135 120 105 90 75 60 45 30 15 0 0 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) 6 G001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD75208W1015 SLPS512A – JULY 2014 – REVISED MAY 2017 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 6.5 7 Receiving Notification of Documentation Updates.... Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 CSD75208W1015 Package Dimensions .................. 8 7.2 Recommended PCB Land Pattern............................ 9 7.3 Tape and Reel Information ....................................... 9 4 Revision History Changes from Original (July 2014) to Revision A Page • Changed Figure 1. ................................................................................................................................................................. 4 • Added Community Resources and Receiving Notification of Documentation Updates sections to Device and Documentation Support. ........................................................................................................................................................ 7 2 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 CSD75208W1015 www.ti.com SLPS512A – JULY 2014 – REVISED MAY 2017 5 Specifications 5.1 Electrical Characteristics TA = 25°C unless otherwise stated PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-Source Voltage VGS = 0 V, IDS = –250 μA –20 BVGSS Gate-to-Source Voltage VDS = 0 V, IG = –250 μA –6.1 IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = –16 V IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = –6 V VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = –250 μA RDS(on) Drain-to-Source On-Resistance RD1D2(on) Drain-to-Drain On-Resistance gfs Transconductance –0.5 V –7.2 V –1 μA –100 nA –0.8 –1.1 V VGS = –1.8 V, ID = –1 A 100 150 mΩ VGS = –2.5 V, ID = –1 A 70 88 mΩ VGS = –4.5 V, ID = –1 A 56 68 mΩ VGS = –1.8 V, ID1D2 = –1 A 190 285 mΩ VGS = –2.5 V, ID1D2 = –1 A 120 150 mΩ VGS = –4.5 V, ID1D2 = –1 A 90 108 mΩ VDS = –2 V, ID = –1 A 7.5 S DYNAMIC CHARACTERISTICS CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance Qg Gate Charge Total (–4.5 V) Qgd Gate Charge, Gate-to-Drain Qgs Gate Charge, Gate-to-Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0 V, VDS = –10 V, ƒ = 1 MHz VDS = –10 V, IDS = –1 A VDS = –10 V, VGS = 0 V VDS = –10 V, VGS = –4.5 V, IDS = –1 A, RG = 0 Ω 315 410 pF 132 172 pF 7.7 10 pF 1.9 2.5 nC 0.23 nC 0.48 nC 0.31 nC 2.1 nC 9 ns 5 ns 29 ns 11 ns DIODE CHARACTERISTICS VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IDS = –1 A, VGS = 0 V –0.75 VDD = –10 V, IF = –1 A, di/dt = 200 A/μs –1 V 4.3 nC 9 ns 5.2 Thermal Information TA = 25°C unless otherwise stated THERMAL METRIC RθJA (1) (2) (3) Junction-to-Ambient Thermal Resistance (1) (2) Junction-to-Ambient Thermal Resistance (2) (3) MIN TYP MAX 165 95 UNIT °C/W Device mounted on FR4 material with minimum Cu mounting area Measured with both devices biased in a parallel condition. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 3 CSD75208W1015 SLPS512A – JULY 2014 – REVISED MAY 2017 www.ti.com P-Chan 1.0x1.5 CSP TTA MAX Rev1 P-Chan 1.0x1.5 CSP TTA MIN Rev1 Typ RθJA = 95°C/W when mounted on 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Typ RθJA = 165°C/W when mounted on minimum pad area of 2-oz. (0.071-mm thick) Cu. M0155-01 M0156-01 5.3 Typical MOSFET Characteristics (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 CSD75208W1015 www.ti.com SLPS512A – JULY 2014 – REVISED MAY 2017 Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 10 − IDS - Drain-to-Source Current (A) − IDS - Drain-to-Source Current (A) 10 9 8 7 6 5 4 3 VGS = −4.5 V VGS = −2.5 V VGS = −1.8 V 2 1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 − VDS - Drain-to-Source Voltage (V) 0.9 8 6 4 0 1 TC = 125°C TC = 25°C TC = −55°C 2 0 0.3 0.6 0.9 1.2 1.5 1.8 − VGS - Gate-to-Source Voltage (V) G001 2.1 2.4 G001 VDS = –5 V Figure 3. Transfer Characteristics 400 4 350 3.5 C − Capacitance (pF) − VGS - Gate-to-Source Voltage (V) Figure 2. Saturation Characteristics 4.5 3 2.5 2 1.5 1 300 200 150 100 50 0.5 0 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 250 0 0.2 0.4 0.6 0.8 1 1.2 1.4 Qg - Gate Charge (nC) ID = –1 A 1.6 1.8 0 2 0 2 4 6 8 10 12 14 16 − VDS - Drain-to-Source Voltage (V) G001 20 G001 VDS = –10 V Figure 4. Gate Charge Figure 5. Capacitance 270 RD1D2(on) - On-State Resistance (mΩ) 1.1 − VGS(th) - Threshold Voltage (V) 18 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 −75 −50 −25 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 TC = 25°C, I D = −1 A TC = 125°C, I D = −1 A 240 210 180 150 120 90 60 30 0 0 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) 6 G001 ID = –250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Drain-to-Drain Resistance vs Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 5 CSD75208W1015 SLPS512A – JULY 2014 – REVISED MAY 2017 www.ti.com Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 1.5 TC = 25°C, I D = −1 A TC = 125°C, I D = −1 A 135 Normalized On-State Resistance RDS(on) - On-State Resistance (mΩ) 150 120 105 90 75 60 45 30 15 0 0 1 2 3 4 5 − VGS - Gate-to- Source Voltage (V) VGS = −2.5V VGS = −4.5V 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 −75 −50 −25 6 G001 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 ID = –1 A Figure 8. On-State Drain-to-Source Resistance vs Gate-to-Source Voltage Figure 9. Normalized On-State Resistance vs Temperature 100 TC = 25°C TC = 125°C − IDS - Drain-to-Source Current (A) − ISD − Source-to-Drain Current (A) 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 − VSD − Source-to-Drain Voltage (V) 1 10 1 10us 100us 1ms 0.1 0.1 10ms 100ms 1 10 − VDS - Drain-to-Source Voltage (V) G001 100 G001 Single Pulse, Max RθJA = 165°C/W Figure 10. Typical Diode Forward Voltage Figure 11. Maximum Safe Operating Area IDS - Drain- to- Source Current (A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 −50 −25 0 25 50 75 100 125 150 175 200 TC - Case Temperature (ºC) G001 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 CSD75208W1015 www.ti.com SLPS512A – JULY 2014 – REVISED MAY 2017 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks NexFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 7 CSD75208W1015 SLPS512A – JULY 2014 – REVISED MAY 2017 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 CSD75208W1015 Package Dimensions NOTE: All dimensions are in mm (unless otherwise specified). Table 1. Pinout 8 POSITION DESIGNATION B1, B2 Source C1 Gate1 C2 Drain1 A2 Gate2 A1 Drain2 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 CSD75208W1015 www.ti.com SLPS512A – JULY 2014 – REVISED MAY 2017 7.2 Recommended PCB Land Pattern Ø 0.25 1 2 1.00 0.50 A B C 0.50 M0158-01 NOTE: All dimensions are in mm (unless otherwise specified). 7.3 Tape and Reel Information 4.00 ±0.10 Ø 1.50 ±0.10 4.00 ±0.10 Ø 0.60 0.86 ±0.05 +0.05 –0.10 1.65 ±0.05 2° Max 3.50 ±0.05 8.00 +0.30 –0.10 1.75 ±0.10 2.00 ±0.05 0.254 ±0.02 1.19 ±0.05 2° Max M0159-01 NOTE: All dimensions are in mm (unless otherwise specified). Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Product Folder Links: CSD75208W1015 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CSD75208W1015 ACTIVE DSBGA YZC 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -55 to 150 75208 CSD75208W1015T ACTIVE DSBGA YZC 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -55 to 150 75208 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
CSD75208W1015T 价格&库存

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CSD75208W1015T
  •  国内价格 香港价格
  • 1+9.448991+1.14375
  • 10+7.7313710+0.93584
  • 100+6.01406100+0.72797

库存:4972

CSD75208W1015T
  •  国内价格
  • 1+4.54192
  • 30+4.38530
  • 100+4.07207
  • 500+3.75883
  • 1000+3.60221

库存:0