CY29FCT818CTPCG4

CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 D D D D D D D D D D D D, P, Q, OR SO PACKAGE (TOP VIEW) Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29818 Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times Fully Compatible With TTL Input and Output Logic Levels 8-Bit Pipeline and Shadow Register ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) CY29FCT818CT – 64-mA Output Sink Current – 32-mA Output Source Current CY29FCT818ATDMB – 20-mA Output Sink Current – 3-mA Output Source Current 3-State Outputs OE DCLK D0 D1 D2 D3 D4 D5 D6 D7 SDI GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC MODE Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 SDO PCLK description The CY29FCT818T contains a high-speed 8-bit general-purpose data pipeline register and a high-speed 8-bit shadow register. The general-purpose register can be used in an 8-bit-wide data path for a normal system application. The shadow register is designed for applications such as diagnostics in sequential circuits, where it is desirable to load known data at a specific location in the circuit and to read the data at that location. The shadow register can load data from the output of the device, and can be used as a right-shift register with bit-serial input (SDI) and output (SDO), using DCLK. The data register input is multiplexed to enable loading from the shadow register or from the data input pins, using PCLK. Data can be loaded simultaneously from the shadow register to the pipeline register, and from the pipeline register to the shadow register, provided setup-time and hold-time requirements are satisfied, with respect to the two independent clock inputs. In a typical application, the general-purpose register in this device replaces an 8-bit data register in the normal data path of a system. The shadow register is placed in an auxiliary bit-serial loop that is used for diagnostics. During diagnostic operation, data is shifted serially into the shadow register, then transferred to the general-purpose register to load a known value into the data path. To read the contents at that point in the data path, the data is transferred from the data register into the shadow register, then shifted serially in the auxiliary diagnostic loop to make it accessible to the diagnostics controller. This data then is compared with the expected value to diagnose faulty operation of the sequential circuit. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 ORDERING INFORMATION SPEED (ns) PACKAGE† TA –40°C 40°C to 85°C ORDERABLE PART NUMBER TOP-SIDE MARKING DIP – P Tube 6 CY29FCT818CTPC CY29FCT818CTPC QSOP – Q Tape and reel 6 CY29FCT818CTQCT 29FCT818C Tube 6 CY29FCT818CTSOC Tape and reel 6 CY29FCT818CTSOCT SOIC – SO 29FCT818C –55°C to 125°C CDIP – D Tube 12 CY29FCT818ATDMB † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS MODE SDI DCLK PCLK OUTPUT SDO SHADOW REGISTER PIPELINE REGISTER L X ↑ X S7 S0←SDI Si←Si–1 NA L X X ↑ H L ↑ X S7 L H H ↑ X H NA Si←Yi Hold Pi←Di NA NA OPERATION Serial shift; D7–D0 output disabled Load pipeline register from data input Load shadow register from Y output Hold shadow register; D7–D0 output enabled H X X ↑ SDI NA Pi←Si Load pipeline register from shadow register H = High logic level, L = Low logic level, X = Don’t care, ↑ Low-to-high transition, ← = Transfer direction, NA = Not applicable 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 logic diagram SDI DCLK D0–D7 11 8-Bit Shadow Register 2 14 SD0 CLK S0–S7 8 D MODE Q 23 MUX 8 PCLK 8-Bit Pipeline Register 13 8 OE P0–P7 1 8 Y0–Y7 absolute maximum rating over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, qJA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W (see Note 2): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W (see Note 2): SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150_C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-3. 2. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 recommended operating conditions (see Note 3) CY29FCT818ATDMB CY29FCT818T MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –3 –32 mA IOL TA Low-level output current 20 64 mA 85 °C High-level input voltage 2 Operating free-air temperature 2 –55 125 V V –40 NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS CY29FCT818ATDMB MIN TYP† MAX VCC = 4.5 V, IIN = –18 mA –0.7 VCC = 4.75 V, IIN = –18 mA VCC = 4.5 V, IOH = –3 mA PARAMETER VIK VOH VOL Vhys VCC = 4 4.75 75 V 2.4 2 IOH = –15 mA 2.4 VCC = 4.5 V, IOL = 20 mA VCC = 4.75 V, IOL = 64 mA 0.3 VIN = VCC VCC = 5.5 V, VIN = 2.7 V VCC = 5.25 V, VIN = 2.7 V VCC = 5.5 V, VIN = 0.5 V VCC = 5.25 V, VIN = 0.5 V VCC = 5.5 V, VOUT = 2.7 V VCC = 5.25 V, VOUT = 2.7 V VCC = 5.5 V, VOUT = 0.5 V VCC = 5.25 V, VCC = 5.5 V, VOUT = 0.5 V VOUT = 0 V VCC = 5.25 V, VOUT = 0 V Ioff VCC = 0 V, VOUT = 4.5 V ICC VCC = 5.5 V, VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≤ 0.2 V, ∆ICC VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open IIL IOZH IOZL IOS‡ V 0.55 0.2 VIN = VCC 0.55 0.2 5 ±1 ±1 ±1 ±1 10 10 –10 –10 –120 –225 –60 –120 ±1 VIN ≥ VCC – 0.2 V VIN ≥ VCC – 0.2 V 0.2 0.5 V V 5 –60 V 3.3 0.3 All inputs –1.2 UNIT 3.3 IOH = –32 mA VCC = 5.25 V, IIH –1.2 –0.7 VCC = 5.5 V, II CY29FCT818T TYP† MAX MIN –225 ±1 1.5 0.2 1.5 0.5 2 2 µA µA µA µA µA mA µA mA mA † Typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. § Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER ICCD¶ CY29FCT818ATDMB MIN TYP† MAX TEST CONDITIONS VCC = 5.5 V, Outputs open, One input switching at 50% duty cycle, OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V CY29FCT818T TYP† MAX MIN 0.25 VCC = 5.25 V, Outputs open, One input switching at 50% duty cycle, OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VCC = 5.5 V, Out uts o en, Outputs open f0 = 10 MHz, OE = GND IC# VCC = 5.25 V, Out uts o en, Outputs open f0 = 10 MHz, OE = GND One bit switching at f1 = 5 MHz at 50% duty cycle Eight bits and four controls switching at f1 = 5 MHz at 50% duty cycle One bit switching at f1 = 5 MHz at 50% duty cycle Eight bits and four controls switching at f1 = 5 MHz at 50% duty cycle 0.25 VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 5.3 VIN = 3.4 V or GND 7.3 VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 17.8|| VIN = 3.4 V or GND 30.8|| UNIT mA/ MHz mA VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 5.3 VIN = 3.4 V or GND 7.3 VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 17.8|| VIN = 3.4 V or GND 30.8|| Ci 5 10 5 10 pF Co 9 12 9 12 pF † Typical values are at VCC = 5 V, TA = 25°C. ¶ This parameter is derived for use in total power-supply calculations. # IC = ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. || Values for these conditions are examples of the ICC formula. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY29FCT818AT PARAMETER tw Pulse width MIN 15 5 25 5 6 2 15 3.5 5 2 MODE before DCLK↑ 12 3.5 SDI before DCLK↑ 10 3.5 DCLK before PCLK↑ 15 3.5 PCLK before DCLK↑ Y before DCLK↑ th Hold time MIN DCLK high and low MODE before PCLK↑ Setup time CY29FCT818CT PCLK high and low D before PCLK↑ tsu MAX 45 8.5 D after PCLK↑ 2 1.5 MODE after PCLK↑ 0 0 Y after DCLK↑ 5 1.5 MODE after DCLK↑ 5 1.5 SDI after DCLK↑ 0 0 MAX UNIT ns ns ns switching characteristics over operating free-air temperature range (see Figure 1) PARAMETER tpd d tPZL tPZH tPLZ tPHZ 6 FROM (INPUT) TO (OUTPUT) CY29FCT818AT MIN MAX CY29FCT818CT MIN MAX PCLK Y 12 6 MODE SDO 18 7.2 SDI SDO 18 7.1 DCLK SDO 30 7.2 OE Y 20 8 DCLK D 35 9 OE Y 20 8.5 DCLK D 30 9 OE Y 20 5.5 DCLK D 45 5.5 OE Y 30 8 DCLK D 90 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns CY29FCT818T DIAGNOSTIC SCAN REGISTER WITH 3-STATE OUTPUTS SCCS012B – MAY 1994 – REVISED NOVEMBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output tPLZ ≈3.5 V 1.5 V tPZH VOH 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V Output Waveform 1 (see Note B) tPLH 1.5 V 1.5 V tPZL VOH In-Phase Output 3V Output Control Output Waveform 2 (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 5962-9682701QLA ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682701QL A CY29FCT818ATDM B CY29FCT818ATDMB ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682701QL A CY29FCT818ATDM B CY29FCT818CTSOCT ACTIVE SOIC DW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 29FCT818C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of