CY74FCT399ATQCTG4

CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 D D D D D D D D Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Fully Compatible With TTL Input and Output Logic Levels 64-mA Output Sink Current 32-mA Output Source Current SO PACKAGE (TOP VIEW) S QA I0A I1A I1B I0B QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QD I0D I1D I1C I0C QC CP description The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources (ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge triggered. The data inputs (I0X, I1X) and S input must be stable only one setup time prior to, and hold time after, the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. PIN DESCRIPTION NAME S DESCRIPTION Common select input CP Clock-pulse input (active rising edge) I0 I1 Data inputs from source 0 Q Register noninverted outputs Data inputs from source 1 ORDERING INFORMATION TA SPEED (ns) ORDERABLE PART NUMBER Tube 6.1 CY74FCT399CTSOC Tape and reel 6.1 CY74FCT399CTSOCT PACKAGE† SOIC – SO –40°C 40°C to 85°C SOIC – SO Tube 7 CY74FCT399ATSOC Tape and reel 7 CY74FCT399ATSOCT TOP-SIDE MARKING FCT399C FCT399A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 FUNCTION TABLE INPUTS S OUTPUT Q l I0 l I1 X l h X H h X l L h X h H L H = High logic level, h = High logic level one setup time prior to the low-to-high clock transition, L = Low logic level, l = Low logic level one setup time prior to the low-to-high clock transition, X = Don’t care logic diagram I0A 3 S 1 D I1A I0B Q 4 I0C 6 Q 5 I0D QB 11 Q 12 10 QC CP 14 D 2 7 CP D I1C QA CP D I1B 2 I1D 13 CP 9 Q CP POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 QD CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, θJA (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) MIN NOM MAX UNIT 4.75 5 5.25 V VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 V High-level output current –32 mA IOL TA Low-level output current 64 mA 85 °C High-level input voltage 2 Operating free-air temperature –40 V NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 4.75, VOH VCC = 4 4.75 75 VOL VH VCC = 4.75, All inputs II IIH VCC = 5.25 V, VCC = 5.25 V, VIN = VCC VIN = 2.7 V IIL IOS‡ VCC = 5.25 V, VCC = 5.25 V, VIN = 0.5 V VOUT = 0 V Ioff ICC VCC = 0 V, VCC = 5.25 V, MIN IIN = –18 mA IOH = –32 mA TYP† MAX UNIT –0.7 –1.2 V 2 IOH = –15 mA IOL = 64 mA 2.4 V 3.3 0.3 0.55 V 5 µA ±1 µA 0.2 V ±1 µA –120 –225 mA ±1 µA 0.1 0.2 mA 0.5 2 mA 0.06 0.12 mA/ MHz 0.7 1.4 VIN = 3.4 V or GND VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 1.2 3.4 1.6 3.2|| VIN = 3.4 V or GND 2.9 8.2|| Ci 5 10 Co 9 12 ∆ICC ICCD¶ IC# –60 VOUT = 4.5 V VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.25 V, One input switching at 50% duty cycle, Outputs open, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VCC = 5 5.25 25 V V, f0 = 10 MHz,, Outputs open, S = Steady state One input switching at f1 = 5 MHz at 50% duty cycle Four inputs switching at f1 = 5 MHz at 50% duty cycle VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V mA pF pF † Typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. § Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND ¶ This parameter is derived for use in total power-supply calculations. # IC = ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. || Values for these conditions are examples of the ICC formula. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 timing requirement over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY74FCT399AT MIN tw Pulse duration, CP high or low tsu Setup time, time high or low th time high or low Hold time, MAX CY74FCT399CT MIN 5 5 In before CP↑ 3.5 3.5 S before CP↑ 8.5 8.5 In after CP↑ 1 1 S after CP↑ 0 0 MAX UNIT ns ns ns switching characteristics over operating free-air temperature range (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL CP Q POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CY74FCT399AT CY74FCT399CT MIN MAX MIN MAX 2.5 7 2.5 6.1 2.5 7 2.5 6.1 UNIT ns 5 CY74FCT399T QUAD 2-INPUT REGISTER SCCS024A – MARCH 1994 – REVISED OCTOBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output tPLZ ≈3.5 V 1.5 V tPZH VOH 1.5 V VOL 1.5 V 0V Output Waveform 1 (see Note B) tPLH 1.5 V 1.5 V tPZL VOH In-Phase Output 3V Output Control Output Waveform 2 (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CY74FCT399ATSOC ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT399A CY74FCT399ATSOCT ACTIVE SOIC DW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT399A CY74FCT399CTSOC ACTIVE SOIC DW 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT399C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of