DAC7644
®
DAC
764
4
For most current data sheet and other product
information, visit www.burr-brown.com
16-Bit, Quad Voltage Output
DIGITAL-TO-ANALOG CONVERTER
FEATURES
DESCRIPTION
● LOW POWER: 10mW
● UNIPOLAR OR BIPOLAR OPERATION
The DAC7644 is a 16-bit, quad voltage output digitalto-analog converter with guaranteed 15-bit monotonic
performance over the specified temperature range. It
accepts 16-bit parallel input data, has double-buffered
DAC input logic (allowing simultaneous update of all
DACs), and provides a readback mode of the internal
input registers. Programmable asynchronous reset clears
all registers to a mid-scale code of 8000H or to a zeroscale of 0000H. The DAC7644 can operate from a single
+5V supply or from +5V and –5V supplies.
Low power and small size per DAC make the DAC7644
ideal for automatic test equipment, DAC-per-pin programmers, data acquisition systems, and closed-loop
servo-control. The DAC7644 is available in a 48-lead
SSOP package and offers guaranteed specifications
over the –40°C to +85°C temperature range.
● SETTLING TIME: 10µs to 0.003%
● 15-BIT LINEARITY AND MONOTONICITY:
–40°C to +85°C
● PROGRAMMABLE RESET TO MID-SCALE
OR ZERO-SCALE
● DATA READBACK
● DOUBLE-BUFFERED DATA INPUTS
APPLICATIONS
● PROCESS CONTROL
● CLOSED-LOOP SERVO-CONTROL
● MOTOR CONTROL
● DATA ACQUISITION SYSTEMS
● DAC-PER-PIN PROGRAMMERS
VDD
VSS
VREFL
AB Sense
VCC
VREFL AB VREFH AB
VREFH
AB Sense
DAC7644
16
DATA I/O
I/O
Buffer
Input
Register A
DAC
Register A
Input
Register B
DAC
Register B
DAC A
VOUTA
VOUTA Sense
DAC B
VOUTB
VOUTB Sense
A1
A0
CS
Control
Logic
Input
Register C
DAC
Register C
DAC C
VOUTC
R/W
VOUTC Sense
Input
Register D
DAC
Register D
DAC D
VOUTD
VOUTD Sense
AGND
DGND
RST
RSTSEL LOADDACS
VREFL
CD Sense
VREFL CD VREFH CD
VREFH
CD Sense
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
© 1999 Burr-Brown Corporation
SBAS121
PDS-1535B
1
Printed in U.S.A. November, 1999
DAC7644
SPECIFICATIONS (Dual Supply)
At TA = TMIN to TMAX, VDD = VCC = +5V, VSS = –5V, VREFH = +2.5V, and VREFL = –2.5V, unless otherwise noted.
DAC7644E
PARAMETER
CONDITIONS
ACCURACY
Linearity Error
Linearity Match
Differential Linearity Error
Monotonicity, TMIN to TMAX
Bipolar Zero Error
Bipolar Zero Error Drift
Full-Scale Error
Full-Scale Error Drift
Bipolar Zero Matching
Full Scale Matching
Power Supply Rejection Ratio (PSRR)
ANALOG OUTPUT
Voltage Output
Output Current
Maximum Load Capacitance
Short-Circuit Current
Short-Circuit Duration
TYP
MAX
±3
±4
±2
±4
VREF = –2.5V, RL = 10kΩ, VSS = –5V
VREFL
–1.25
No Oscillation
±2
10
±2
10
±2
±2
100
VREFH
+1.25
VREFL + 1.25
–2.5
+2.5
VREFH – 1.25
8
0.5
2
60
40
f = 10kHz
7FFFH to 8000H or 8000H to 7FFFH
DIGITAL INPUT
VIH
VIL
IIH
IIL
UNITS
±2
±2
±1
±3
✻
✻
✻
✻
±1
±1
✻
✻
✻
✻
✻
±2
±2
✻
LSB
LSB
LSB
Bits
mV
ppm/°C
mV
ppm/°C
mV
mV
ppm/V
✻
✻
✻
✻
✻
✻
✻
10
POWER SUPPLY
VDD
VCC
VSS
ICC
IDD
ISS
Power
3.6
+4.75
+4.75
–5.25
–2.3
TEMPERATURE RANGE
Specified Performance
–40
V
mA
pF
mA
✻
✻
V
V
µA
µA
✻
µs
LSB
nV-s
nV/√Hz
nV-s
✻
0.3 • VDD
±10
±10
IOH = –0.8mA
IOL = 1.2mA
✻
✻
✻
✻
0.7 • VDD
DIGITAL OUTPUT
VOH
VOL
±2
✻
✻
✻
500
–500
To ±0.003%, 5V Output Step
See Figure 5.
MAX
✻
✻
500
–10, +30
Indefinite
GND or VCC or VSS
TYP
15
±1
5
±1
5
±1
±1
10
Channel-to-Channel Matching
Channel-to-Channel Matching
At Full Scale
MIN
±3
14
REFERENCE INPUT
Ref High Input Voltage Range
Ref Low Input Voltage Range
Ref High Input Current
Ref Low Input Current
DYNAMIC PERFORMANCE
Settling Time
Channel-to-Channel Crosstalk
Digital Feedthrough
Output Noise Voltage
DAC Glitch
MIN
DAC7644EB
4.5
0.3
+5.0
+5.0
–5.0
1.5
50
–1.5
15
✻
0.4
+5.25
+5.25
–4.75
2
✻
✻
✻
✻
20
+85
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
µA
µA
✻
V
V
✻
✻
✻
✻
✻
V
V
V
mA
µA
mA
mW
✻
°C
✻ Specifications same as DAC7644E.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
DAC7644
2
SPECIFICATIONS (Single Supply)
At TA = TMIN to TMAX, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, and VREFL = 0V, unless otherwise noted.
DAC7644E
PARAMETER
ACCURACY
Linearity Error(1)
Linearity Match
Differential Linearity Error
Monotonicity, TMIN to TMAX
Zero Scale Error
Zero Scale Error Drift
Full-Scale Error
Full-Scale Error Drift
Zero Scale Matching
Full-Scale Matching
Power Supply Rejection Ratio (PSRR)
ANALOG OUTPUT
Voltage Output
Output Current
Maximum Load Capacitance
Short-Circuit Current
Short-Circuit Duration
CONDITIONS
POWER SUPPLY
VDD
VCC
VSS
ICC
IDD
Power
TEMPERATURE RANGE
Specified Performance
MAX
±3
±4
±2
±4
VREFL = 0V, VSS = 0V, RL = 10kΩ
0
–1.25
No Oscillation
MIN
±3
±2
10
±2
10
±2
±2
100
VREFH
+1.25
VREFL + 1.25
0
+2.5
VREFH – 1.25
8
0.5
2
60
40
7FFFH to 8000H or 8000H to 7FFFH
UNITS
±2
±2
±1
±3
✻
✻
✻
✻
±1
±1
✻
✻
✻
✻
✻
±2
±2
✻
LSB
LSB
LSB
Bits
mV
ppm/°C
mV
ppm/°C
mV
mV
ppm/V
✻
✻
✻
✻
✻
✻
✻
10
+4.75
+4.75
0
–40
V
mA
pF
mA
✻
✻
V
V
µA
µA
✻
µs
LSB
nV-s
nV/√Hz
nV-s
✻
0.3 • VDD
±10
±10
3.6
✻
✻
✻
✻
0.7 • VDD
IOH = –0.8mA
IOL = 1.2mA
±2
✻
✻
✻
250
–250
To ±0.003%, 2.5V Output Step
See Figure 6.
MAX
✻
✻
500
±30
Indefinite
GND or VCC
TYP
15
±1
5
±1
5
±1
±1
10
Channel-to-Channel Matching
Channel-to-Channel Matching
At Full Scale
DIGITAL INPUT
VIH
VIL
IIH
IIL
DIGITAL OUTPUT
VOH
VOL
DAC7644EB
TYP
14
REFERENCE INPUT
Ref High Input Voltage Range
Ref Low Input Voltage Range
Ref High Input Current
Ref Low Input Current
DYNAMIC PERFORMANCE
Settling Time
Channel-to-Channel Crosstalk
Digital Feedthrough
Output Noise Voltage, f = 10kHz
DAC Glitch
MIN
4.5
0.3
+5.0
+5.0
0
1.5
50
7.5
✻
0.4
+5.25
+5.25
0
2
✻
✻
✻
10
+85
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
µA
µA
✻
V
V
✻
✻
✻
✻
✻
V
V
V
mA
µA
mW
✻
°C
NOTE: (1) If VSS = 0V specification applies at Code 0040H and above due to possible negative zero-scale error.
✻ Specifications same as DAC7644E.
®
3
DAC7644
ELECTROSTATIC
DISCHARGE SENSITIVITY
ABSOLUTE MAXIMUM RATINGS(1)
VCC and VDD to VSS .............................................................. –0.3V to 11V
VCC and VDD to GND ........................................................... –0.3V to 5.5V
VREFL to VSS ............................................................. –0.3V to (VCC – VSS)
VCC to VREFH ............................................................ –0.3V to (VCC – VSS)
VREFH to VREFL ......................................................... –0.3V to (VCC – VSS)
Digital Input Voltage to GND ................................... –0.3V to VDD + 0.3V
Digital Output Voltage to GND ................................. –0.3V to VDD + 0.3V
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................ –40°C to +85°C
Storage Temperature Range ......................................... –65°C to +125°C
Lead Temperature (soldering, 10s) ............................................... +300°C
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
PACKAGE/ORDERING INFORMATION
PRODUCT
LINEARITY
ERROR
(LSB)
DIFFERENTIAL
NONLINEARITY
(LSB)
DAC7644E
PACKAGE
PACKAGE
DRAWING
NUMBER(1)
SPECIFICATION
TEMPERATURE
RANGE
±4
±3
48-Lead SSOP
333
–40°C to +85°C
"
"
"
"
"
"
DAC7644EB
±3
±2
48-Lead SSOP
333
–40°C to +85°C
"
"
"
"
"
"
ORDERING
NUMBER(2)
TRANSPORT
MEDIA
DAC7644E
DAC7644E/1K
DAC7644EB
DAC7644EB/1K
Rails
Tape and Reel
Rails
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/)
are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7644/1K” will get a single
1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
DAC7644
4
PIN CONFIGURATION
Top View
SSOP
DB15
1
48
NC
DB14
2
47
NC
DB13
3
46
NC
DB12
4
45
NC
DB11
5
44
VOUTA Sense
DB10
6
43
VOUTA
DB9
7
42
VREFL AB Sense
DB8
8
41
VREFL AB
DB7
9
40
VREFH AB
DB6
10
39
VREFH AB Sense
DB5
11
38
VOUTB Sense
DB4
12
37
VOUTB
DB3
13
36
VOUTC Sense
DB2
14
35
VOUTC
DB1
15
34
VREFH CD Sense
DB0
16
33
VREFH CD
RSTSEL
17
32
VREFL CD
RST
18
31
VREFL CD Sense
LOADDACS
19
30
VOUTD Sense
R/W
20
29
VOUTD
A1
21
28
VSS
A0
22
27
AGND
CS
23
26
VCC
DGND
24
25
VDD
DAC7644
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
PIN
NAME
1
DB15
Data Bit 15, MSB
23
CS
2
DB14
Data Bit 14
24
DGND
3
DB13
Data Bit 13
25
VDD
Positive Power Supply (digital)
4
DB12
Data Bit 12
26
VCC
Positive Power Supply (analog)
5
DB11
Data Bit 11
27
AGND
6
DB10
Data Bit 10
28
VSS
7
DB9
Data Bit 9
29
VOUTD
8
DB8
Data Bit 8
30
VOUTD Sense
9
DB7
Data Bit 7
10
DB6
Data Bit 6
31
VREFL CD Sense
11
DB5
Data Bit 5
32
VREFL CD
12
DB4
Data Bit 4
33
VREFH CD
13
DB3
Data Bit 3
34
VREFH CD Sense
14
DB2
Data Bit 2
35
VOUTC
15
DB1
Data Bit 1
36
VOUTC Sense
16
DB0
17
RSTSEL
18
RST
Data Bit 0, LSB
Reset Select. Determines the action of RST. If
HIGH, a RST command will set the DAC registers to
mid-scale. If LOW, a RST command will set the DAC
registers to zero.
Analog Ground
Negative Power Supply
DAC D Voltage Output
DAC D’s Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
DAC C and D Reference Low Sense Input
DAC C and D Reference Low Input
DAC C and D Reference High Input
DAC C and D Reference High Sense Input
DAC C Voltage Output
DAC C’s Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
37
VOUTB
38
VOUTB Sense
39
VREFH AB Sense
40
VREFH AB
DAC A and B Reference High Input
DAC A and B Reference Low Input
DAC B Voltage Output
DAC B’s Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
DAC A and B Reference High Sense Input
41
VREFL AB
42
VREFL AB Sense
43
VOUTA
44
VOUTA Sense
45
NC
No Connection
46
NC
No Connection
47
NC
No Connection
48
NC
No Connection
LOADDACS
DAC Output Registers Load Control. Rising edge
triggered.
20
R/W
Enabled by the CS, Controls Data Read and Write
from the Input Registers.
21
A1
Enabled by the CS, in Combination With A0 Selects
the Individual DAC Input Registers.
A0
Chip Select. Active LOW.
Digital Ground
Reset, Rising Edge Triggered. Depending on the
state of RSTSEL, the DAC registers are set to either
mid-scale or zero.
19
22
DESCRIPTION
Enabled by the CS, in Combination With A1 Selects
the Individual DAC Input Registers.
DAC A and B Reference Low Sense Input
DAC A Voltage Input
DAC A’s Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
®
5
DAC7644
TYPICAL PERFORMANCE CURVES: VSS = 0V
At TA = +25°C, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +25°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +25°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
DLE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85°C)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
LE (LSB)
LE (LSB)
DLE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
+85°C
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25°C)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
DLE (LSB)
LE (LSB)
+25°C
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
®
DAC7644
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
6
TYPICAL PERFORMANCE CURVES: VSS = 0V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
LE (LSB)
DLE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, –40°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, –40°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
DLE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, –40°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, –40°C)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
LE (LSB)
LE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +85°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +85°C)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–40°C
DLE (LSB)
(cont)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
+85°C
Digital Input Code
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
®
7
DAC7644
TYPICAL PERFORMANCE CURVES: VSS = 0V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
FULL-SCALE ERROR vs TEMPERATURE
ZERO-SCALE ERROR vs TEMPERATURE
2
2
Code (0040H)
1
DAC C
DAC D
UPO (mV)
Positive Full-Scale Error (mV)
1.5
0.5
0
–0.5
DAC A
–1
DAC B
–1.5
1.5
1
DAC B
DAC C
0.5
0
–0.5
DAC A
DAC D
–1
–1.5
–2
–2
–40
–25
0
25
55
–40
85
–25
0
25
55
Temperature (°C)
Temperature (°C)
VREFH CURRENT vs CODE
(all DACs sent to indicated code)
VREFL CURRENT vs CODE
(all DACs sent to indicated code)
0.30
0.00
0.25
–0.05
VREF Current (mA)
VREF Current (mA)
Code (FFFFH)
0.20
0.15
0.10
85
–0.10
–0.15
–0.20
0.05
–0.25
0.00
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
–0.30
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
POSITIVE SUPPLY CURRENT
vs DIGITAL INPUT CODE
POSITIVE SUPPLY CURRENT vs TEMPERATURE
2
2
No Load
Data = FFFFH (all DACs)
No Load
1.5
1.5
ICC (mA)
ICC (mA)
All DACs
1
1
One DAC
0.5
0.5
0
0
–40
–25
0
25
55
85
0000H 0200H 0400H 0800H 1000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Temperature (°C)
Digital Input Code
®
DAC7644
8
TYPICAL PERFORMANCE CURVES: VSS = 0V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to 2mV)
OUTPUT VOLTAGE vs SETTLING TIME
(0V to +2.5V)
+5V
LDAC
0
+5V
LDAC
0
Output Voltage
Output Voltage
Large-Signal Settling Time: 0.5V/div
Small-Signal Settling Time: 4LSB/div
Small-Signal Settling Time: 4LSB/div
Large-Signal Settling Time: 0.5V/div
Time (2µs/div)
Time (2µs/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
+5V
LDAC
0
Output Voltage (50mV/div)
Output Voltage (50mV/div)
+5V
LDAC
0
7FFFH to 8000H
8000H to 7FFFH
Time (1µs/div)
Time (1µs/div)
BROADBAND NOISE
OUTPUT NOISE VOLTAGE vs FREQUENCY
Noise (nV/√Hz)
Noise Voltage (50µV/div)
1000
100
BW = 10kHz
Code = 8000H
10
10
Time (10µs/div)
100
1000
10000
100000
1000000
Frequency (Hz)
®
9
DAC7644
TYPICAL PERFORMANCE CURVES: VSS = 0V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
VOUT vs RLOAD
12
5
10
4
8
VOUT (V)
Logic Supply Current (mA)
LOGIC SUPPLY CURRENT
vs LOGIC INPUT LEVEL FOR DATA BITS
6
3
Source
2
4
1
2
0
0.01
0
1
0
2
3
4
5
0.1
1
RLOAD (kΩ)
Logic Input Level for Data Bits (V)
®
DAC7644
Sink
10
10
100
TYPICAL PERFORMANCE CURVES: VSS = –5V
At TA = +25°C, VDD = VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified.
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
+25°C
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +25°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +25°C)
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
+85°C
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85°C)
LE (LSB)
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +85°C)
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
®
11
DAC7644
TYPICAL PERFORMANCE CURVES: VSS = –5V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified.
+85°C
(cont)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +85°C)
LE (LSB)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +85°C)
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, –40°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, –40°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
DLE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, –40°C)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, –40°C)
LE (LSB)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
DLE (LSB)
LE (LSB)
–40°C
Digital Input Code
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
®
DAC7644
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
12
TYPICAL PERFORMANCE CURVES: VSS = –5V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified.
VREFL CURRENT vs CODE
(all DACs sent to indicated code)
+0.6
0.0
+0.5
–0.1
VREF Current (mA)
VREF Current (mA)
VREFH CURRENT vs CODE
(all DACs sent to indicated code)
+0.4
+0.3
+0.2
–0.4
–0.6
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
0.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
ZERO-SCALE ERROR vs TEMPERATURE
(Code 8000H)
POSITIVE FULL-SCALE ERROR vs TEMPERATURE
(Code FFFFH)
2
2
1.5
1.5
1
DAC A
0.5
Positive Full-Scale Error (mV)
Zero-Scale Error (mV)
–0.3
–0.5
+0.1
DAC B
0
–0.5
DAC D
–1
DAC C
–1.5
1
DAC B
DAC A
0.5
0
–0.5
DAC C
–1
DAC D
–1.5
–2
–2
–40
–25
0
25
55
–40
85
25
NEGATIVE FULL-SCALE ERROR vs TEMPERATURE
(Code 0000H)
POWER SUPPLY CURRENT
vs TEMPERATURE
DAC D
DAC A
IQ (mA)
0.5
0
–0.5
DAC B
DAC C
–1
–1.5
–2
–40
0
Temperature (°C)
1.5
1
–25
Temperature (°C)
2
Negative Full-Scale Error (mV)
–0.2
–25
0
25
55
3
2.5
2
1.5
1
0.5
0
–0.5
–1
–1.5
–2
–2.5
–3
85
55
85
Data = FFFFH (all DACs)
No Load
ICC
ISS
–40
85
55
–25
0
25
Temperature (°C)
Temperature (°C)
®
13
DAC7644
TYPICAL PERFORMANCE CURVES: VSS = –5V
(CONT)
At TA = +25°C, VDD = VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified.
POSITIVE SUPPLY CURRENT
vs DIGITAL INPUT CODE
VOUT vs RLOAD
2
5
No Load
4
All DACs
Source
3
1.5
ICC (mA)
1
0
–1
Sink
–2
One DAC
1
0.5
–3
–4
0
0.1
1
10
0000H 0200H 0400H 0800H 1000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
100
RLOAD (kΩ)
Digital Input Code
OUTPUT VOLTAGE vs SETTLING TIME
(–2.5V to +2.5V)
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to –2.5V)
Large-Signal Settling Time: 1V/div
+5V
LDAC
0
+5V
LDAC
0
Output Voltage
–5
0.01
Output Voltage
VOUT (V)
2
Small-Signal Settling Time: 2LSB/div
Small-Signal Settling Time:
2LSB/div
Large-Signal Settling Time: 1V/div
Time (2µs/div)
Time (2µs/div)
®
DAC7644
14
THEORY OF OPERATION
by the external voltage references (VREFL and VREFH, respectively). The digital input is a 16-bit parallel word and
the DAC input registers offer a readback capability. The
converters can be powered from either a single +5V supply
or a dual ±5V supply. The device offers a reset function
which immediately sets all DAC output voltages and DAC
registers to mid-scale code 8000H or to zero-scale, code
0000H. See Figures 2 and 3 for the basic operation of the
DAC7644.
The DAC7644 is a quad voltage output, 16-bit digital-toanalog converter (DAC). The architecture is an R-2R ladder
configuration with the three MSB’s segmented followed by
an operational amplifier that serves as a buffer. Each DAC
has its own R-2R ladder network, segmented MSBs and
output op amp (see Figure 1). The minimum voltage output
(zero-scale) and maximum voltage output (full-scale) are set
RF
VOUT Sense
VOUT
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
VREFH
VREFH Sense
VREFL
VREFL Sense
FIGURE 1. DAC7644 Architecture.
Data
Bus
1
DB15
NC
48
2
DB14
NC
47
3
DB13
NC
46
4
DB12
NC
45
5
DB11
VOUTA Sense
44
6
DB10
VOUTA
43
7
DB9
VREFL AB Sense
42
8
DB8
VREFL AB
41
9
DB7
VREFH AB
40
10
DB6
VREFH AB Sense
39
11
DB5
VOUTB Sense
38
12
DB4
VOUTB
37
13
DB3
VOUTC Sense
36
14
DB2
VOUTC
35
15
DB1
VREFH CD Sense
34
16
DB0
VREFH CD
33
17
RSTSEL
VREFL CD
32
VREFL CD Sense
31
VOUTD Sense
30
VOUTD
29
DAC7644
Reset DACs
18
RST
Load DAC Registers
19
LOADDACS
READ/WRITE
20
R/W
21
A1
VSS
28
22
A0
AGND
27
23
CS
VCC
26
24
DGND
VDD
25
Address
Chips Select
0V to +2.5V
+2.5000V
0V to +2.5V
0V to +2.5V
+2.5000V
0V to +2.5V
0.1µF
+
1µF
+5V
NC = No Connection
FIGURE 2. Basic Single-Supply Operation of the DAC7644.
®
15
DAC7644
Data
Bus
1
DB15
NC
48
2
DB14
NC
47
3
DB13
NC
46
4
DB12
NC
45
5
DB11
VOUTA Sense
44
6
DB10
VOUTA
43
7
DB9
VREFL AB Sense
42
8
DB8
VREFL AB
41
–2.5V
9
DB7
VREFH AB
40
+2.5V
10
DB6
VREFH AB Sense
39
11
DB5
VOUTB Sense
38
12
DB4
VOUTB
37
13
DB3
VOUTC Sense
36
14
DB2
VOUTC
35
15
DB1
VREFH CD Sense
34
VREFH CD
33
+2.5V
–2.5V
DAC7644
16
DB0
+5V
17
RSTSEL
Reset DACs
18
RST
Load DAC Registers
19
LOADDACS
READ/WRITE
20
R/W
21
VREFL CD
32
VREFL CD Sense
31
VOUTD Sense
30
VOUTD
29
A1
VSS
28
22
A0
AGND
27
23
CS
VCC
26
24
DGND
VDD
25
Address
Chips Select
–2.5V to +2.5V
–2.5V to +2.5V
–2.5V to +2.5V
–2.5V to +2.5V
–5V
0.1µF
0.1µF
+
+
1.0µF
1.0µF
+5V
NC = No Connection
FIGURE 3. Basic Dual-Supply Operation of the DAC7644.
The DAC7644 offers a force and sense output configuration
for the high open-loop gain output amplifier. This feature
allows the loop around the output amplifier to be closed at
the load (see Figure 4), thus ensuring an accurate output
voltage.
ANALOG OUTPUTS
When VSS = –5V (dual supply operation), the output amplifier can swing to within 2.25V of the supply rails, guaranteed over the –40°C to +85°C temperature range. With VSS
= 0V (single-supply operation), and with RLOAD also connected to ground, the output can swing to ground. Care must
also be taken when measuring the zero-scale error when VSS
= 0V. Since the output voltage cannot swing below ground,
the output voltage may not change for the first few digital
input codes (0000H, 0001H, 0002H, etc.) if the output amplifier has a negative offset. At the negative limit of –2mV, the
first specified output starts at code 0040H.
Due to the high accuracy of these D/A converters, system
design problems such as grounding and contact resistance
become very important. A 16-bit converter with a 2.5V fullscale range has a 1LSB value of 38µV. With a load current
of 1mA, series wiring and connector resistance (see Figure
4) of only 40mΩ (RW2) will cause a voltage drop of 40µV.
To understand what this means in terms of a system layout,
the resistivity of a typical 1 ounce copper-clad printed circuit
board is 1/2 mΩ per square. For a 1mA load, a 10 milli-inch
wide printed circuit conductor 600 milli-inches long will
result in a voltage drop of 30µV.
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
DAC7644
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
RW1
RW2
VOUT
+V
+2.5V
RW1
RW2
VOUT
FIGURE 4. Analog Output Closed-Loop Configuration
(1/2 DAC7644). RW represents wiring resistances.
®
DAC7644
16
REFERENCE INPUTS
The current into the VREFH input and out of VREFL depends
on the DAC output voltages and can vary from a few
microamps to approximately 0.5mA. The reference input
appears as a varying load to the reference. If the reference
can sink or source the required current, a reference buffer is
not required. The DAC7644 features a reference drive and
sense connection such that the internal errors caused by the
changing reference current and the circuit impedances can
be minimized. Figures 5 through 12 show different reference
configurations and the effect on the linearity and differential
linearity.
The reference inputs, VREFL and VREFH, can be any voltage
between VSS + 2.5V and VCC – 2.5V provided that VREFH is
at least 1.25V greater than VREFL. The minimum output of
each DAC is equal to VREFL plus a small offset voltage
(essentially, the offset of the output op amp). The maximum
output is equal to VREFH plus a similar offset voltage. Note
that VSS (the negative power supply) must either be
connected to ground or must be in the range of –4.75V to
–5.25V. The voltage on VSS sets several bias points within
the converter. If VSS is not in one of these two configurations, the bias values may be in error and proper operation
of the device is not guaranteed.
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
DAC7644
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
+V
OPA2234
VOUT
–2.5V
500pF
–V
+V
500pF
VOUT
+2.5V
–V
FIGURE 5. Dual Supply Configuration-Buffered References, used for Dual Supply Performance Curves (1/2 DAC7644).
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
DAC7644
+V
OPA2350
VOUT
100Ω
2kΩ
2200pF
1000pF
0.050V
100Ω
+V
98kΩ
1000pF
2200pF
+2.5V
VOUT
NOTE: VREFL has been chosen to be 50mV to allow for current sinking voltage
drops across the 100Ω resistor and the output stage of the buffer op amp.
FIGURE 6. Single-Supply Buffered Reference with a Reference Low of 50mV (1/2 DAC7644).
®
17
DAC7644
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
LE (LSB)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
FIGURE 8. Integral Linearity and Differential Linearity
Error Curves for Figure 9.
FIGURE 7. Integral Linearity and Differential Linearity
Error Curves for Figure 6.
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
DAC7644
+V
OPA2350
VOUT
100Ω
+V
2200pF
+1.25V
1000pF
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
100Ω
1000pF
+V
2200pF
+2.5V
VOUT
FIGURE 9. Single-Supply Buffered Reference with VREFL = +1.25V and VREFH = +2.5V (1/2 DAC7644).
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
DAC7644
VOUT
+V
OPA350
+2.5V
1000pF
2200pF
VOUT
FIGURE 10. Single-Supply Buffered VREFH (1/2 DAC7644).
®
DAC7644
+V
100Ω
18
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
LE (LSB)
3.0
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
DLE (LSB)
DLE (LSB)
LE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25°C)
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
Digital Input Code
FIGURE 13. Linearity and Differential Linearity Error Curves
for Figure 12.
FIGURE 11. Linearity and Differential Linearity Error Curves
for Figure 10.
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
DAC7644
DIGITAL INTERFACE
Table I shows the basic control logic for the DAC7644. Note
that each internal register is edge triggered and not level
triggered. When the LOADDACS signal is transitioned to
HIGH, the digital word currently in the register is latched.
The first set of registers (the input registers) are triggered via
the A0, A1, R/W, and CS inputs. Only one of these registers
is transparent at any given time.
VOUT
The double-buffered architecture is designed mainly so each
DAC input register can be written to at any time and then all
DAC voltages updated simultaneously by the rising edge of
LOADDACS. It also allows a DAC input register to be
written to at any point and the DAC voltages to be synchronously changed via a trigger signal connected to
LOADDACS.
+V
+2.5V
VOUT
FIGURE 12. Low Cost Single-Supply Configuration.
A1
A0
R/W
CS
RST
L
L
H
H
L
L
H
H
X
X
X
X
L
H
L
H
L
H
L
H
X
X
X
X
L
L
L
L
H
H
H
H
X
X
X
X
L
L
L
L
L
L
L
L
H
H
X
X
H
H
H
H
H
H
H
H
H
H
↑
↑
RSTSEL LOADDACS
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
↑
H
X
X
INPUT
REGISTER
DAC
REGISTER
MODE
DAC
Write
Write
Write
Write
Read
Read
Read
Read
Hold
Hold
Hold
Hold
Hold
Hold
Hold
Hold
Hold
Hold
Write
Hold
Reset to Zero
Reset to Midscale
Write Input
Write Input
Write Input
Write Input
Read Input
Read Input
Read Input
Read Input
Update
Hold
Reset to Zero
Reset to Midscale
A
B
C
D
A
B
C
D
All
All
All
All
TABLE I. DAC7644 Logic Truth Table.
®
19
DAC7644
DIGITAL TIMING
Figure 14 and Table II provide detailed timing for the digital
interface of the DAC7644.
VOUT = VREF L +
DIGITAL INPUT CODING
The DAC7644 input data is in Straight Binary format. The
output voltage is given by Equation 1.
(VREF H – VREF L) • N
(1)
65, 536
where N is the digital input code. This equation does not
include the effects of offset (zero-scale) or gain (full-scale)
errors.
tWCS
CS
tWS
tWH
tAS
tAH
R/W
tRCS
CS
tRDH
tRDS
A0/A1
R/W
tLS
tLWD
tAH
tAS
tLX
±0.003% of FSR
Error Band
LOADDACS
A0/A1
tDH
tDS
tDZ
Data In
tS
Data Valid
Data Out
tLH
tCSD
VOUT
Data Read Timing
Data Write Timing
tSS
±0.003% of FSR
Error Band
tSH
RESET SEL
tRSH
tRSS
RST
+FS
VOUT,RESET SEL LOW
–FS
+FS
MS
VOUT,RESET SEL HIGH
–FS
DAC7644 Reset Timing
FIGURE 14. Digital Input and Output Timing.
SYMBOL
DESCRIPTION
MIN
tRCS
tRDS
t RDH
tDZ
tCSD
tWCS
tWS
tWH
tAS
tAH
tLS
tLH
tLX
tDS
tDH
tLWD
tSS
tSH
t RSS
tRSH
tS
CS LOW for Read
R/W HIGH to CS LOW
R/W HIGH after CS HIGH
CS HIGH to Data Bus in High Impedance
CS LOW to Data Bus Valid
CS LOW for Write
R/W LOW to CS LOW
R/W LOW after CS HIGH
Address Valid to CS LOW
Address Valid after CS HIGH
CS LOW to LOADDACS HIGH
CS LOW after LOADDACS HIGH
LOADDACS HIGH
Data Valid to CS LOW
Data Valid after CS HIGH
LOADDACS LOW
RSTSEL Valid Before RESET HIGH
RSTSEL Valid After RESET HIGH
RESET LOW Before RESET HIGH
RESET LOW After RESET HIGH
Settling Time
150
10
10
10
TABLE II. Timing Specifications (TA = –40°C to +85°C).
®
DAC7644
20
TYP
100
MAX
100
150
40
0
10
0
10
30
100
100
0
10
100
0
200
10
10
10
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
DIGITALLY-PROGRAMMABLE
CURRENT SOURCE
Figure 15 shows a DAC7644 in a 4mA to 20mA current
output configuration. The output current can be determined
by Equation 3:
(3)
The DAC7644 offers a unique set of features that allows a
wide range of flexibility in designing applications circuits
such as programmable current sources. The DAC7644 offers
both a differential reference input as well as an open-loop
configuration around the output amplifier. The open-loop
configuration around the output amplifier allows transistor
to be placed within the loop to implement a digitallyprogrammable, uni-directional current source. The availability of a differential reference also allows programmability
for both the full-scale and zero-scale currents. The output
current is calculated as:
V H – VREF L N Value
I OUT = REF
•
R SENSE
65, 536
2.5V – 0.5V N Value 0.5V
•
I OUT =
+
125Ω 65, 536 125Ω
At full-scale, the output current is 16mA plus the 4mA for
the zero current. At zero scale the output current is the offset
current of 4mA (0.5V/125Ω).
(2)
+ (VREF L / R SENSE )
IOUT
VPROGRAMMED
NC
48
NC
47
NC
46
NC
45
VOUTA Sense
44
VOUTA
43
VREFL AB Sense
42
VREFL AB
41
VREFH AB
40
VREFH AB Sense
39
VOUTB Sense
38
VOUTB
37
125Ω
DAC7644
+V
OPA2350
100Ω
20kΩ
2200pF
1000pF
+0.5V
100Ω
1000pF
80kΩ
2200pF
+V
+2.5V
IOUT
VPROGRAMMED
125Ω
GND
FIGURE 15. 4-to-20mA Digitally Controlled Current Source (1/2 DAC7644).
®
21
DAC7644
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
DAC7644E
ACTIVE
SSOP
DL
48
25
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DAC7644E
B
Samples
DAC7644E/1K
ACTIVE
SSOP
DL
48
1000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DAC7644E
B
Samples
DAC7644EB
ACTIVE
SSOP
DL
48
25
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DAC7644E
B
Samples
DAC7644EB/1K
ACTIVE
SSOP
DL
48
1000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DAC7644E
B
Samples
DAC7644EB/1KG4
ACTIVE
SSOP
DL
48
1000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DAC7644E
B
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
