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DRV8818
SLVSAX9E – SEPTEMBER 2011 – REVISED JANUARY 2016
DRV8818 Stepper Motor Controller IC
1 Features
3 Description
•
The DRV8818 provides an integrated stepper motor
driver solution for printers, scanners, and other
automated equipment applications. The device has
two H-bridge drivers, as well as microstepping
indexer logic to control a stepper motor.
1
•
•
•
•
•
•
Pulse Width Modulation (PWM) Microstepping
Motor Driver
– Built-In Microstepping Indexer
– Up to 8 Microsteps/Step
– Step and Direction Control
– Programmable Mixed Decay, Blanking, and Off
Time
Up to 2.5-A Current Per Winding
Low 0.37-Ω (HS + LS) MOSFET RDS(ON) (25°C)
8-V to 35-V Operating Supply Voltage Range
Pin to Pin Upgrade for DRV8811 With Lower
RDS(ON)
Thermally-Enhanced Surface Mount Package
Protection Features
– VM Undervoltage Lockout (UVLO)
– Overcurrent Protection (OCP)
– Thermal Shutdown (TSD)
A simple STEP/DIRECTION interface allows easy
interfacing to controller circuits. The mode pins allow
for configuration of the motor in full-step, half-step,
quarter-step, or eighth-step modes. Decay mode and
PWM off time are programmable.
Internal shutdown functions are provided for over
current protection, short circuit protection, undervoltage lockout and overtemperature.
The DRV8818 is packaged in a 28-pin HTSSOP
package with PowerPAD™.
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
•
The output driver block for each consists of Nchannel power MOSFETs configured as full Hbridges to drive the motor windings.
DRV8818
Printers
Textile Machinery
Positioning/Tracking
Factory Automation
Robotics
PACKAGE
HTSSOP (28)
BODY SIZE (NOM)
9.70 mm x 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
8 to 35 V
STEP
DRV8818
2.5 A
DIR
Controller
Step Size
HOMEn
Stepper
Motor Driver
2.5 A
M
Protection
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV8818
SLVSAX9E – SEPTEMBER 2011 – REVISED JANUARY 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
5
5
6
6
7
Absolute Maximum Ratings .....................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Motor Driver Timing Switching Characteristics .........
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 15
8
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Application ................................................. 16
9
Power Supply Recommendations...................... 19
9.1 Bulk Capacitance .................................................... 19
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 21
10.3 Thermal Considerations ........................................ 21
11 Device and Documentation Support ................. 23
11.1
11.2
11.3
11.4
11.5
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (January 2015) to Revision E
Page
•
Removed nFAULT from Features ......................................................................................................................................... 1
•
Changed the minimum value for VREF input voltage .............................................................................................................. 4
•
Moved the motor driver timing to the Switching Characteristics table.................................................................................... 6
•
Added Community Resources ............................................................................................................................................. 23
Changes from Revision C (November 2013) to Revision D
•
Page
Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 4
Changes from Revision B (Otober 2012) to Revision C
Page
•
Changed Features section ..................................................................................................................................................... 1
•
Changed Logic-Level Inputs test conditions in the ELECTRICAL CHARACTERISTICS ...................................................... 5
•
Changed Timing Requirements .............................................................................................................................................. 6
2
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SLVSAX9E – SEPTEMBER 2011 – REVISED JANUARY 2016
5 Pin Configuration and Functions
PWP Package
28-Pin HTSSOP
Top View
ISENA
HOME
DIR
AOUT1
DECAY
RCA
GND
VREF
RCB
VCC
BOUT1
USM1
USM0
ISENB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
(PPAD)
VMA
SLEEPn
ENABLEn
AOUT2
CP2
CP1
VCP
GND
VGD
STEP
BOUT2
RESETn
SRn
VMB
Pin Functions
PIN
NAME
NO.
TYPE (1)
DESCRIPTION
POWER AND GROUND
CP1
23
IO
Charge pump flying capacitor
Connect a 0.22-μF capacitor between CP1 and CP2.
CP2
24
IO
Charge pump flying capacitor
Connect a 0.22-μF capacitor between CP1 and CP2.
GND
7, 21
—
Device ground
VCC
10
—
Logic supply voltage
Connect to 3-V to 5-V logic supply. Bypass to GND with a 0.1-μF ceramic
capacitor.
VCP
22
IO
High-side gate drive voltage
Connect a 0.22-μF ceramic capacitor to VM.
VGD
20
IO
Low-side gate drive voltage
Bypass to GND with a 0.22-μF ceramic capacitor.
VMA
28
—
Bridge A power supply
VMB
15
—
Bridge B power supply
Connect to motor supply (8 V to 35 V). Both VMA and VMB must be connected to
same supply.
5
I
Decay mode select
Voltage applied sets decay mode - see motor driver description for details. Bypass
to GND with a 0.1-μF ceramic capacitor. Weak internal pulldown.
DIR
3
I
Direction input
Level sets the direction of stepping. Weak internal pulldown.
ENABLEn
26
I
Enable input
Logic high to disable device outputs, logic low to enable outputs. Weak internal
pullup to VCC.
ISENA
1
—
Bridge A ground / Isense
Connect to current sense resistor for bridge A
ISENB
14
—
Bridge B ground / Isense
Connect to current sense resistor for bridge B
RCA
6
I
Bridge A blanking and off time adjust
Connect a parallel resistor and capacitor to GND - see motor driver description for
details.
RCB
9
I
Bridge B blanking and off time adjust
Connect a parallel resistor and capacitor to GND - see motor driver description for
details.
RESETn
17
I
Reset input
Active-low reset input initializes the indexer logic and disables the H-bridge
outputs. Weak internal pullup to VCC.
SLEEPn
27
I
Sleep mode input
Logic high to enable device, logic low to enter low-power sleep mode. Weak
internal pulldown.
SRn
16
I
Sync. Rect. enable input
Active-low. When low, synchronous rectification is enabled. Weak internal
pulldown.
STEP
19
I
Step input
Rising edge causes the indexer to move one step. Weak internal pulldown.
USM0
13
I
Microstep mode 0
USM0 and USM1 set the step mode - full step, half step, quarter step, or eight
microsteps/step. Weak internal pulldown.
USM1
12
I
Microstep mode 1
USM0 and USM1 set the step mode - full step, half step, quarter step, or eight
microsteps/step. Weak internal pulldown.
VREF
8
I
Current set reference input
Reference voltage for winding current set
CONTROL
DECAY
(1)
Directions: I = input, O = output, OZ = 3-state output, OD = open-drain output, IO = input/output
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Pin Functions (continued)
PIN
NAME
NO.
TYPE (1)
DESCRIPTION
OUTPUTS
AOUT1
4
O
Bridge A output 1
Connect to bipolar stepper motor winding
AOUT2
25
O
Bridge A output 2
Positive current is AOUT1 → AOUT2
BOUT1
11
O
Bridge B output 1
Connect to bipolar stepper motor winding
BOUT2
18
O
Bridge B output 2
Positive current is BOUT1 → BOUT2
HOMEn
2
O
Home position
Logic low when at home state of step table, logic high at other states
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
(2) (3)
MIN
MAX
UNIT
VMX
Power supply voltage
–0.3
35
V
VCC
Power supply voltage
–0.3
7
V
Digital pin voltage
–0.5
7
V
0
VCC
V
–0.875
0.875
V
VREF
Input voltage
ISENSEx (4)
Pin voltage
IO(peak)
Peak motor drive output current
PD
Continuous total power dissipation
TJ
Operating junction temperature
–40
150
°C
Tstg
Storage temperature
–60
150
°C
(1)
(2)
(3)
(4)
Internally limited
See Thermal Information
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Power dissipation and thermal limits must be observed.
Transients of ±1V for less than 25ns are acceptable.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±4000
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
TA = 25°C (unless otherwise noted)
MIN
NOM
MAX
UNIT
VM
Motor power supply voltage (1)
8
35
V
VCC
Logic power supply voltage
3
5.5
V
VREF
VREF input voltage
0
VCC
V
RX
RX resistance value
12
56
100
kΩ
CX
CX capacitance value
470
680
1500
pF
(1)
4
All VM pins must be connected to the same supply voltage.
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6.4 Thermal Information
DRV8818
THERMAL METRIC (1)
PWP (HTSSOP)
UNIT
28 PINS
RθJA
Junction-to-ambient thermal resistance
32.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
16.3
°C/W
RθJB
Junction-to-board thermal resistance
14
°C/W
ψJT
Junction-to-top characterization parameter
0.5
°C/W
ψJB
Junction-to-board characterization parameter
13.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.1
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES
IVM
VM operating supply current
VM = 35 V, fPWM < 50 KHz
IVCC
VCC operating supply current
fPWM < 50 KHz
IVMQ
VM sleep mode supply current
VM = 35 V
IVCCQ
VCC sleep mode supply current
VUVLO
7
10
mA
0.4
4
mA
3
20
μA
μA
0.5
20
VM undervoltage lockout voltage
VM rising
6.7
7.5
VCC undervoltage lockout voltage
VCC rising
2.75
2.95
V
VREF INPUT/CURRENT CONTROL ACCURACY
IREF
ΔICHOP
VREF input current
Chopping current accuracy
VREF = 3.3 V
–3
3
VREF = 2.0 V, 70% to 100% current
–5%
5%
VREF = 2.0 V, 20% to 56% current
–10%
10%
μA
LOGIC-LEVEL INPUTS
VIL
Input low voltage
VIH
Input high voltage
0.3 × VCC
VHYS
Input hysteresis
IIL
Input low current
VIN = 0.3 × VCC
–20
20
IIH
Input high current
VIN = 0.3 × VCC
–20
20
RPU
Pullup resistance
ENABLEn, RESETn
1
MΩ
RPD
Pulldown resistance
DIR, STEP, SLEEPn, USM1, USM0, SRn
1
MΩ
0.7 × VCC
V
V
300
mV
μA
μA
HOMEn OUTPUT
VOL
Output low voltage
IO = 200 μA
VOH
Output high voltage
IO = –200 μA
0.3 × VCC
0.7 × VCC
V
V
DECAY INPUT
VIL
Input low threshold voltage
For fast decay mode
0.21 × VCC
V
VIH
Input high threshold voltage
For slow decay mode
0.6 × VCC
V
H-BRIDGE FETS
Rds(on)
HS FET on resistance
VM = 24 V, IO = 2.5 A, TJ = 25°C
0.22
0.30
Ω
Rds(on)
LS FET on resistance
VM = 24 V, IO = 2.5 A, TJ = 25°C
0.15
0.24
Ω
20
μA
180
°C
IOFF
–20
PROTECTION CIRCUITS
TTSD
Thermal shutdown temperature
Die temperature
150
160
IOCP
Overcurrent protection level
tOCP
OCP deglitch time
1.5
µs
tRET
OCP retry time
800
µs
3.5
A
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6.6 Timing Requirements
TA = 25°C (unless otherwise noted)
MIN
NOM
MAX
UNIT
500
kHz
1
fSTEP
Step frequency
2
tWH(STEP)
Pulse duration, STEP high
1
μs
3
tWL(STEP)
Pulse duration, STEP low
1
μs
4
tSU(STEP)
Setup time, command before STEP rising
200
ns
5
tH(STEP)
Hold time, command after STEP rising
200
6
tWAKE
Wakeup time, SLEEPn inactive high to STEP input accepted
1
ms
7
tSLEEP
Sleep time, SLEEPn active low to outputs disabled
5
μs
8
tENABLE
Enable time, ENABLEn inactive high to outputs enabled
20
μs
9
tDISABLE
Disable time, ENABLEn active low to outputs disabled
20
μs
10
tRESETR
Reset release time, RESETn inactive high to outputs enabled
5
μs
11
tRESET
Reset time, RESETn active low to outputs disabled
5
μs
ns
6.7 Motor Driver Timing Switching Characteristics
TA = 25°C (unless otherwise noted)
MIN
TYP
MAX
tOFF
Off time
PARAMETER
Rx = 56 kΩ, Cx = 680 pF
TEST CONDITIONS
35
44
53
UNIT
μs
tBLANK
Current sense blanking time
Rx = 56 kΩ, Cx = 680 pF
900
1250
1500
ns
tDT
Dead time
SRn = 0
100
475
800
ns
tR
Rise time
10
80
ns
tF
Fall time
10
80
ns
1
2
3
STEP
DIR, USMx
4
5
6
SLEEPn, ENABLEn, RESETn
8
10
7
9
11
OUTPUT
Figure 1. Timing Diagram
6
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6.8 Typical Characteristics
7.5
6
7
5
8V
24 V
35 V
6.5
IVMQ (PA)
IVM (mA)
4
8V
24 V
35 V
6
5.5
2
5
1
4.5
4
-40
3
-20
0
20
40
Temperature (qC)
60
80
0
-40
100
-20
0
20
40
Temperature (qC)
D001
Figure 2. IVM vs Temperature
60
80
D002
Figure 3. IVMQ vs Temperature
510
525
480
500
± qC
25qC
85qC
LS (m:)
420
390
RDS(on) HS
RDS(on) HS + LS (m:)
475
450
360
330
450
425
400
375
350
325
8V
24 V
35 V
300
270
-40
100
300
275
-20
0
20
40
Temperature (qC)
60
80
100
6
D003
Figure 4. RDS(ON) HS + LS vs Temperature
9
12
15
18
21
24
VM (V)
27
30
33
Product Folder Links: DRV8818
D004
Figure 5. RDS(ON) HS + LS vs VM
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7
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7 Detailed Description
7.1 Overview
The DRV8818 is a highly configurable, integrated motor driver solution for bipolar stepper motors. The device
integrates two H-bridges, current sense and regulation circuitry, and a microstepping indexer. The DRV8818 can
be powered with a supply voltage between 8 V and 35 V and is capable of providing an output current up to 2.5
A full-scale.
A simple STEP/DIR interface allows for easy interfacing to the controller. The internal indexer is able to execute
high-accuracy microstepping without requiring the controller to manage the current regulation loop.
The current regulation is highly configurable, with three decay modes of operation. They are fast, slow, and
mixed decay, which can be selected depending on the application requirements. The DRV8818 also provides
configurable mixed decay, blanking, and off time in order to adjust to a wide range of motors.
A low-power sleep mode is incorporated which allows for minimal power consumption when the system is idle.
8
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7.2 Functional Block Diagram
LS Gate
Drive
VCC
VM
+
VCC
CP1
LS Gate
Drive
VGD
Internal Logic
Regulator and
References
Charge
Pump
Low Side Gate
Drive
CP2
HS Gate
Drive
VM
VCP
VCC
VM
VREF
VM
VMA
ENABLEn
RESETn
AOUT1
+
Stepper
Motor
Motor Driver
A
SLEEPn
AOUT2
STEP
+
DIR
USM0
USM1
-
ISENA
Control
Logic/
Indexer
VM
VMB
RESETn
SRn
VCC
BOUT1
Motor Driver
B
HOMEn
BOUT2
DECAY
ISENB
RCA
Thermal
Shut
Down
RCB
GND
PPAD
GND
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7.3 Feature Description
7.3.1 PWM H-Bridge Drivers
DRV8818 contains two H-bridge motor drivers with current-control PWM circuitry, and a microstepping indexer. A
block diagram of the motor control circuitry is shown below.
VM
VGD
VMA
VCP
AOUT1
RCA
+
Predrive
Step
Motor
AOUT2
-
PWM
+
ISENA
+
-
A=8
DAC
VM
VGD
Control / Indexer
Logic
VMB
VCP
BOUT1
Predrive
BOUT2
PWM
ISENB
+
A=8
DAC
RCB
DECAY
VREF
Figure 6. Motor Control Circuitry
10
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Feature Description (continued)
7.3.2 Current Regulation
The PWM chopping current is set by a comparator, which compares the voltage across a current sense resistor,
multiplied by a factor of 8, with a reference voltage. The reference voltage is input from the VREF pin. The fullscale (100%) chopping current is calculated as follows:
ICHOP =
VREFX
8 · RISENSE
(1)
Example:
If a 0.22-Ω sense resistor is used and the VREFx pin is 3.3 V, the full-scale (100%) chopping current is
3.3 V / (8 × 0.22 Ω) = 1.875 A.
The reference voltage is also scaled by an internal DAC that allows torque control for fractional stepping of a
bipolar stepper motor, as described in the Microstepping Indexer section.
When a winding is activated, the current through it rises until it reaches the chopping current threshold described
above, then the current is switched off for a fixed off time. The off time is determined by the values of a resistor
and capacitor connected to the RCA (for bridge A) and RCB (for bridge B) pins. The off time is approximated by:
tOFF = R · C
(2)
To avoid falsely tripping on transient currents when the winding is first activated, a blanking period is used
immediately after turning on the FETs, during which the state of the current sense comparator is ignored. The
blanking time is determined by the value of the capacitor connected to the RCx pin and is approximated by:
tBLANK = 1400 · C
(3)
7.3.3 Decay Mode
During PWM current chopping, the H-bridge is enabled to drive through the motor winding until the PWM current
chopping threshold is reached. This is shown in Figure 7, Item 1. The current flow direction shown indicates
positive current flow in the step table below.
Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or
slow decay.
In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to
allow winding current to flow in a reverse direction. If synchronous rectification is enabled (SRn pin logic low), the
opposite FETs are turned on; as the winding current approaches zero, the bridge is disabled to prevent any
reverse current flow. If SRn is high, current is recirculated through the body diodes, or through external Schottky
diodes. Fast-decay mode is shown in Figure 7, Item 2.
In slow-decay mode, winding current is re-circulated by enabling both of the low-side FETs in the bridge. This is
shown in Figure 7, Item 3.
If SRn is high, current is recirculated only through the body diodes, or through external Schottky diodes. In this
case fast decay is always used.
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Feature Description (continued)
VM
1 Drive current
1
xOUT2
xOUT1
3
2
Fast decay (reverse)
3
Slow decay (brake)
2
Figure 7. Decay Mode
The DRV8818 also supports a mixed decay mode. Mixed decay mode begins as fast decay, but after a period of
time switches to slow decay mode for the remainder of the fixed off time.
Fast and mixed decay modes are only active if the current through the winding is decreasing; if the current is
increasing, then slow decay is always used.
Which decay mode is used is selected by the voltage on the DECAY pin. If the voltage is greater than 0.6 × VCC,
slow decay mode is always used. If DECAY is less than 0.21 × VCC, the device operates in fast decay mode
when the current through the winding is decreasing. If the voltage is between these levels, mixed decay mode is
enabled.
In mixed decay mode, the voltage on the DECAY pin sets the point in the cycle that the change to slow decay
mode occurs. This time can be approximated by:
æ 0.6 · VCC ö
tFD = R · C · In ç
è VDECAY ÷ø
(4)
Mixed decay mode is only used while the current though the winding is decreasing; slow decay is used while the
current is increasing.
Operation of the blanking, fixed off time, and mixed decay mode is illustrated in Figure 8.
12
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Feature Description (continued)
PWM
ON
PWM
OFF
ON
ITRIP
ON
0.6 × VCC
(tOFF)
Q
S
Q
R
PWM_ON
ITRIP
VBLANK
BLANK
RCx
Winding
Current
PWM
R
0.6 ×
VBLANK
RCx
VCC
C
VCC
PWM_OFF
0.21 × VCC
VDECAY
Voltage
0.21 × VCC
FAST
BLANK
(tFD)
SLOW
FAST_DECAY
DECAY
DECAY
To other PWM
Figure 8. PWM
7.3.4 Microstepping Indexer
Built-in indexer logic in the DRV8818 allows a number of different stepping configurations. The USM1 and USM0
pins are used to configure the stepping format as shown in Table 1:
Table 1. Microstepping Selection Bits
USM1
USM0
0
0
Full step (2-phase excitation)
STEP MODE
0
1
1/2 step (1-2 phase excitation)
1
0
1/4 step (W1-2 phase excitation)
1
1
Eight microsteps/step
Table 2 shows the relative current and step directions for different settings of USM1 and USM0. At each rising
edge of the STEP input, the indexer travels to the next state in the table. The direction is shown with the DIR pin
high; if the DIR pin is low the sequence is reversed. Positive current is defined as xOUT1 = positive with respect
to xOUT2.
Note that the home state is 45°. This state is entered at power-up or device reset. The HOMEn output pin is
driven low in this state. In all other states it is driven logic high.
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Table 2. Microstepping Indexer
FULL STEP
USM = 00
1/4 STEP
USM = 10
1/8 STEP
USM = 11
1
1
1
100
0
0
2
98
20
11.325
3
92
38
22.5
4
83
56
33.75
5
71
71
45 (home state)
6
56
83
56.25
7
38
92
67.5
8
20
98
78.75
2
1
2
3
4
3
5
6
2
4
7
8
5
9
10
3
6
11
12
7
13
14
4
AOUTx
BOUTx
CURRENT
CURRENT
(% FULL-SCALE) (% FULL-SCALE)
1/2 STEP
USM = 01
8
15
16
STEP ANGLE
(°)
9
0
100
90
10
–20
98
101.25
11
–38
92
112.5
12
–56
83
123.75
13
–71
71
135
14
–83
56
146.25
15
–92
38
157.5
16
–98
20
168.75
17
–100
0
180
18
–98
–20
191.25
19
–92
–38
202.5
20
–83
–56
213.75
21
–71
–71
225
22
–56
–83
236.25
23
–38
–92
247.5
24
–20
–98
258.75
25
0
–100
270
26
20
–98
281.25
27
38
–92
292.5
28
56
–83
303.75
29
71
–71
315
30
83
–56
326.25
31
92
–38
337.5
32
98
–20
348.75
7.3.5 Protection Circuits
7.3.5.1 Overcurrent Protection (OCP)
If the current through any FET exceeds the preset overcurrent threshold, all FETs in the H-bridge will be disabled
for a period of approximately 800 µs, or until the ENABLEn pin has been brought inactive high and then back
low, or power is removed and reapplied. Overcurrent conditions are sensed in both directions; that is, a short to
ground, supply, or across the motor winding will all result in an overcurrent shutdown.
Note that overcurrent protection does not use the current sense circuitry used for PWM current control and is
independent of the Isense resistor value or VREF voltage. Additionally, in the case of an overcurrent event, the
microstepping indexer will be reset to the home state.
7.3.5.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all drivers in the device are shut down and the indexer is reset to the
home state. Once the die temperature has fallen to a safe level operation resumes.
14
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7.3.5.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VM or VCC pins falls below the VM or VCC undervoltage lockout threshold
voltage, all circuitry in the device will be disabled, and the indexer will be reset to the home state. Operation will
resume when VM and VCC both rise above their UVLO thresholds.
7.4 Device Functional Modes
7.4.1 RESETn, ENABLEn, and SLEEPn Operation
The RESETn pin, when driven active low, resets the step table to the home position. It also disables the H-bridge
drivers. The STEP input is ignored while RESETn is active.
The ENABLEn pin is used to control the output drivers. When ENABLEn is low, the output H-bridges are
enabled. When ENABLEn is high, the H-bridges are disabled and the outputs are in a high-impedance state.
Note that when ENABLEn is high, the input pins and control logic, including the indexer (STEP and DIR pins) are
still functional.
The SLEEPn pin is used to put the device into a low power state. If SLEEPn is low, the H-bridges are disabled,
the gate drive charge pump is stopped, and all internal clocks are stopped. In this state all inputs are ignored
until the SLEEPn pin returns high.
7.4.2 Decay Modes
The DRV8818 supports three different decay modes: slow decay, fast decay, and mixed decay. The current
through the motor windings is regulated using a fixed off time scheme.
This means that the current will increase until it reaches the current chopping threshold (ITRIP), after which it will
enter the set decay mode for a fixed period of time. The cycle will then repeat after the decay period expires.
The blanking time tBLANK defines the minimum drive time for the current chopping. ITRIP is ignored during tBLANK,
so the winding current may overshoot the trip level.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV8818 is used for bipolar stepper motor control. The microstepping motor driver provides precise
regulation of the coil current and ensures a smooth rotation from the stepper motor.
8.2 Typical Application
Figure 9 shows a common system application of the DRV8818.
VM
DRV8818
1
2
3
VCC
AOUT1
10 kŸ
10 kŸ
5
1000 pF
6
VMA
SLEEPn
HOMEn
ENABLEn
DIR
VM
28
100 uF
27
0.1 µF
26
25
AOUT1
AOUT2
DECAY
CP2
RCA
CP1
GND
VCP 22
VREF
GND
RCB
VGD 20
VCC
STEP 19
AOUT2
AOUT1
24
23
±
10 kŸ
8
1000 pF 9
VCC
+
0.22 µF
21
±
0.22 µF
47 kŸ
10
BOUT1
11
12
13
100 mŸ
14
BOUT2
BOUT1
USM1
RESETn
USM0
SRn
ISENB
PPAD
10 kŸ
AOUT2
VM
BOUT1
7
Stepper Motor
0.22 µF
47 kŸ
VCC
+
+
0.1 µF
4
ISENA
BOUT2
100 mŸ
VMB
18
BOUT2
17
16
VM
15
0.1 µF
Figure 9. Typical Application Schematic
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Typical Application (continued)
8.2.1 Design Requirements
See Table 3 for the design parameters.
Table 3. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
Supply Voltage
VM
24 V
Motor Winding Resistance
RL
4.0 Ω
Motor Winding Inductance
IL
3.7 mH
Motor Full Step Angle
Target Microstepping Level
Target Motor Speed
Target Full-Scale Current
θstep
1.8°/step
nm
8 µsteps per step
v
120 rpm
IFS
1.25 A
8.2.2 Detailed Design Procedure
8.2.2.1 Stepper Motor Speed
The first step in configuring the DRV8818 requires the desired motor speed and microstepping level. If the target
application requires a constant speed, then a square wave with frequency ƒstep must be applied to the STEP pin.
If the target motor startup speed is too high, the motor will not spin. Make sure that the motor can support the
target speed or implement an acceleration profile to bring the motor up to speed.
For a desired motor speed (v), microstepping level (nm), and motor full step angle (θstep),
fstep µsteps / second
fstep µsteps / second
§ µsteps ·
q
§ rotations ·
§
·
u 360 ¨
u nm ¨
v¨
¸
¸
¸
© minute ¹
© rotation ¹
© step ¹
§ q ·
§ seconds ·
u step ¨
60 ¨
¸
¸
© minute ¹
© step ¹
(5)
§ µsteps ·
q
§ rotations ·
§
·
120 ¨
u 360 ¨
u 8¨
¸
¸
¸
© minute ¹
© rotation ¹
© step ¹
§ q ·
§ seconds ·
60 ¨
¸ u 1.8 ¨ step ¸
© minute ¹
©
¹
(6)
θstep can be found in the stepper motor data sheet or written on the motor itself.
For the DRV8818, the microstepping level is set by the USMx pins. Higher microstepping will mean a smother
motor motion and less audible noise, but will increase switching losses and require a higher fstep to achieve the
same motor speed.
8.2.2.2 Current Regulation
In a stepper motor, the set full-scale current (IFS) is the maximum current driven through either winding. This
quantity will depend on the VREF analog voltage and the sense resistor value (RSENSE). During stepping, IFS
defines the current chopping threshold (ITRIP) for the maximum current step. The gain of DRV8818 is set for 8
V/V.
VREF V
VREF V
IFS A
Av x RSENSE ß 8 x RSENSE ß
(7)
To achieve IFS = 1.25 A with RSENSE of 0.1 Ω, VREF should be 1.56 V.
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8.2.3 Application Curves
Figure 10. Mixed Decay
Figure 11. Slow Decay on Increasing Steps
Figure 12. Mixed Decay on Decreasing Steps
18
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9 Power Supply Recommendations
9.1 Bulk Capacitance
Having an appropriate local bulk capacitance is an important factor in motor drive system design. It is generally
beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size.
The amount of local capacitance needed depends on a variety of factors, including:
• The highest current required by the motor system
• The power supply’s capacitance and ability to source current
• The amount of parasitic inductance between the power supply and motor system
• The acceptable voltage ripple
• The type of motor used (brushed DC, brushless DC, stepper)
• The motor braking method
The inductance between the power supply and the motor drive system limits the rate current can change from
the power supply. If the local bulk capacitance is too small, the system responds to excessive current demands
or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage
remains stable and high current can be quickly supplied.
The data sheet generally provides a recommended value, but system-level testing is required to determine the
appropriate sized bulk capacitor.
Power Supply
Parasitic Wire
Inductance
Motor Drive System
VM
+
–
+
Motor
Driver
GND
Local
Bulk Capacitor
IC Bypass
Capacitor
Figure 13. Example Setup of Motor Drive System With External Power Supply
The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases
when the motor transfers energy to the supply.
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10 Layout
10.1 Layout Guidelines
The VMA and VMB pins should be bypassed to GND using low-ESR ceramic bypass capacitors with a
recommended value of 0.1μF rated for VM. This capacitor should be placed as close to the VMA and VMB pins
as possible with a thick trace or ground plane connection to the device GND pin.
The VMA and VMB pins must be bypassed to ground using an appropriate bulk capacitor. This component may
be an electrolytic and should be located close to the DRV8818.
A low-ESR ceramic capacitor must be placed in between the CP1 and CP2 pins. TI recommends a value of
0.22-μF rated for VM. Place this component as close to the pins as possible.
A low-ESR ceramic capacitor must be placed in between the VM and VCP pins. TI recommends a value of
0.22-μF rated for 16 V. Place this component as close to the pins as possible.
Ensure proper connection of the DRV8818 PowerPAD to the PCB. The PowerPAD should be connected to a
copper plane that is connected to GND. The copper plane should have a large area to allow for thermal
dissipation from the DRV8818.
10.1.1 Heatsinking
The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad
must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,
this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs
without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area
is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and
bottom layers.
For details about how to design the PCB, refer to TI Application Report SLMA002, PowerPAD™ Thermally
Enhanced Package and TI Application Brief SLMA004, PowerPAD™ Made Easy, available at www.ti.com.
In general, the more copper area that can be provided, the more power can be dissipated.
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10.2 Layout Example
GND
100 PŸ
0.1 µF
ISENA
VMA
HOMEn
SLEEPn
DIR
ENABLE
AOUT1
AOUT2
DECAY
CP2
RCA
CP1
GND
VCP
VREF
GND
RCB
VGD
VCC
STEP
BOUT1
BOUT2
USM1
RESETn
USM0
SRn
ISENB
VMB
+
GND
VM
0.22 µF
0.22 µF
GND
0.22 µF
VCC
GND
VM
0.1 µF
100 PŸ
GND
Figure 14. Layout Example Schematic
10.3 Thermal Considerations
The DRV8818 has thermal shutdown (TSD) as described previously. If the die temperature exceeds
approximately 150°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter thermal shutdown is an indication of either excessive power dissipation,
insufficient heatsinking, or too high an ambient temperature.
10.3.1 Power Dissipation
Power dissipation in the DRV8818 is dominated by the power dissipated in the output FET resistance, or RDS(ON).
Average power dissipation when running a stepper motor can be roughly estimated by:
PTOT = 4 · RDS(ON) · (IOUT(RMS))
2
where
•
•
•
PTOT is the total power dissipation.
RDS(ON) is the resistance of each FET.
IOUT(RMS) is the RMS output current being applied to each winding.
(8)
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Thermal Considerations (continued)
IOUT(RMS) is equal to the approximately 0.7x the full-scale output current setting. The factor of 4 comes from the
fact that there are two motor windings, and at any instant two FETs are conducting winding current for each
winding (one high-side and one low-side).
The maximum amount of power that can be dissipated in the DRV8818 is dependent on ambient temperature
and heatsinking. The thermal dissipation ratings table in the datasheet can be used to estimate the temperature
rise for typical PCB constructions.
Note that RDS(ON) increases with temperature, so as the device heats, the power dissipation increases. This must
be taken into consideration when sizing the heatsink.
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
1.
2.
3.
4.
5.
PowerPAD™ Thermally Enhanced Package, SLMA002
PowerPAD™ Made Easy, SLMA004
Current Recirculation and Decay Modes, SLVA321
Calculating Motor Driver Power Dissipation, SLVA504
Understanding Motor Driver Current Ratings, SLVA505
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
DRV8818PWP
ACTIVE
HTSSOP
PWP
28
50
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DRV8818
DRV8818PWPR
ACTIVE
HTSSOP
PWP
28
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
DRV8818
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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