DS25BR150TSDX/NOPB

DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 DS25BR150 3.125 Gbps LVDS Buffer Check for Samples: DS25BR150 FEATURES DESCRIPTION • The DS25BR150 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over printed circuit boards and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. 1 2 • • • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space 7 kV ESD on LVDS I/O Pins Protects Adjoining Components Small 3 mm x 3 mm WSON-8 Space Saving Package APPLICATIONS • • • • Clock or Data Buffering / Repeating OC-48 / STM-16 Clock or Data Buffering / Repeating InfiniBand FireWire The DS25BR150 is a buffer/repeater with very low power consumption. Other LVDS devices with similar IO characteristics and with signal conditioning features include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, the DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, and the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space. Typical Application CML ASIC / FPGA LVDS LVPECL BR150 LVDS ASIC / FPGA 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Block Diagram IN+ OUT+ IN- OUT- Pin Diagram NC 1 IN+ 2 IN- 3 NC 4 8 VCC DAP 7 OUT+ GND 6 OUT- 5 NC WSON Package PIN DESCRIPTION Pin Name Pin Name Pin Type Pin Description NC 1 NA "NO CONNECT" pin. IN+ 2 Input Non-inverting LVDS input pin. IN- 3 Input Inverting LVDS input pin. NC 4 NA "NO CONNECT" pin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output Inverting LVDS output pin. OUT+ 7 Output Non-inverting LVDS Output pin. VCC 8 Power Power supply pin. GND DAP Power Ground pad (DAP - die attach pad) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) Supply Voltage (VCC) −0.3V to +4V LVDS Input Voltage (IN+, IN−) −0.3V to +4V Differential Input Voltage |VID| 1V −0.3V to (VCC + 0.3V) LVDS Output Voltage (OUT+, OUT−) LVDS Differential Output Voltage ((OUT+) - (OUT−)) 0V to 1V LVDS Output Short Circuit Current Duration 5 ms Junction Temperature +150°C −65°C to +150°C Storage Temperature Range Lead Temperature Range Soldering (4 sec.) Maximum Package Power Dissipation at 25°C NGQ Package +260°C Package Thermal Resistance θJA +60.0°C/W θJC +12.3°C/W 2.08W Derate NGQ Package 16.7 mW/°C above +25°C HBM (3) ESD Susceptibility MM ≥7 kV (4) ≥250V CDM (5) (1) (2) (3) (4) (5) ≥1250V “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Human Body Model, applicable std. JESD22-A114C Machine Model, applicable std. JESD22-A115-A Field Induced Charge Device Model, applicable std. JESD22-C101-C Recommended Operating Conditions Supply Voltage (VCC) Receiver Differential Input Voltage (VID) Min Typ Max Units 3.0 3.3 3.6 V 1 V +25 +85 °C 0 −40 Operating Free Air Temperature (TA) DC Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (1) (2) (3) Symbol Parameter Conditions Min Typ Max Units 250 350 450 mV 35 mV 1.375 V 35 mV LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) VOD Differential Output Voltage ΔVOD Change in Magnitude of VOD for Complimentary Output States VOS Offset Voltage ΔVOS Change in Magnitude of VOS for Complimentary Output States RL = 100Ω IOS Output Short Circuit Current (4) OUT to GND -25 -50 mA OUT to VCC 7.5 50 mA RL = 100Ω -35 1.05 1.2 -35 COUT Output Capacitance Any LVDS Output Pin to GND 1.2 pF ROUT Output Termination Resistor Between OUT+ and OUT- 100 Ω (1) (2) (3) (4) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and ΔVOD. Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 3 DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com DC Electrical Characteristics (continued) Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units 1 V 0 +100 mV LVDS INPUT DC SPECIFICATIONS (IN+, IN-) VID Input Differential Voltage VTH Differential Input High Threshold 0 VTL Differential Input Low Threshold VCMR Common Mode Voltage Range VID = 100 mV IIN Input Current VIN = 3.6V or 0V VCC = 3.6V or 0V CIN Input Capacitance Any LVDS Input Pin to GND 1.7 pF RIN Input Termination Resistor Between IN+ and IN- 100 Ω VCM = +0.05V or VCC-0.05V −100 0 0.05 ±1 mV VCC 0.05 V ±10 μA SUPPLY CURRENT ICC Supply Current 27 35 mA Typ Max Units 370 520 ps 355 520 ps AC Electrical Characteristics (1) Over recommended operating supply and temperature ranges unless otherwise specified. (2) (3) Symbol Parameter Conditions Min LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High RL = 100Ω (4) tSKD1 Pulse Skew |tPLHD − tPHLD| 15 100 ps tSKD2 Part to Part Skew (5) 45 160 ps tLHT Rise Time 80 150 ps tHLT Fall Time 80 150 ps RL = 100Ω JITTER PERFORMANCE (Figure 5) tDJ1 tDJ2 tRJ1 tRJ2 tTJ1 tTJ2 (1) (2) (3) (4) (5) (6) (7) (8) 4 Deterministic Jitter (Peak-to-Peak Value ) (6) VID = 350 mV VCM = 1.2V K28.5 (NRZ) 2.5 Gbps 11 33 ps 3.125 Gbps 15 41 ps Random Jitter (RMS Value) (7) VID = 350 mV VCM = 1.2V Clock (RZ) 1.25 GHz 0.5 1 ps 1.5625 GHz 0.5 1 ps Total Jitter (Peak to Peak Value) (8) VID = 350 mV VCM = 1.2V PRBS-23 (NRZ) 2.5 Gbps 0.04 0.11 UIP-P 3.125 Gbps 0.07 0.15 UIP-P Specification is ensured by characterization and is not tested in production. The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. tSKD1, |tPLHD − tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. tSKD2, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range. Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted algebraically. Measured on a clock edge with a histogram and an accumulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically. Measured on an eye diagram with a histogram and an accumulation of 3500 histogram hits. Input stimulus jitter is subtracted. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 DC TEST CIRCUITS VOH OUT+ IN+ Power Supply R D RL Power Supply IN- OUTVOL Figure 1. Differential Driver DC Test Circuit AC Test Circuits and Timing Diagrams OUT+ IN+ R Signal Generator D IN- RL OUT- Figure 2. Differential Driver AC Test Circuit Figure 3. Propagation Delay Timing Diagram Figure 4. LVDS Output Transition Times CHARACTERIZATION BOARD 50: Microstrip DS25BR150 50: Microstrip L=4" L=4" L=4" L=4" 50: Microstrip 50: Microstrip PATTERN GENERATOR OSCILLOSCOPE Figure 5. Jitter Measurements Test Circuit Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 5 DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Device Operation INPUT INTERFACING The DS25BR150 accepts differential signals and allows simple AC or DC coupling. With a wide common mode range, the DS25BR150 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures illustrate typical DC-coupled interface to common differential drivers. Note that the DS25BR150 inputs are internally terminated with a 100Ω resistor. 100: Differential T-Line IN+ OUT+ LVDS DS25BR150 OUT- IN- Figure 6. Typical LVDS Driver DC-Coupled Interface to DS25BR150 Input CML3.3V or CML2.5V VCC 50: 100: Differential T-Line 50: IN+ OUT+ DS25BR150 IN- OUT- Figure 7. Typical CML Driver DC-Coupled Interface to DS25BR150 Input LVPECL Driver OUT+ 100: Differential T-Line LVDS Receiver IN+ 100: OUT150-250: IN150-250: Figure 8. Typical LVPECL Driver DC-Coupled Interface to DS25BR150 Input OUTPUT INTERFACING The DS25BR150 outputs signals are compliant to the LVDS standard. It can be DC-coupled to most common differential receivers. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. While most differential receivers have a common mode input range that can accommodate LVDS compliant signals, it is recommended to check the respective receiver's data sheet prior to implementing the suggested interface implementation. 6 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 100: Differential T-Line OUT+ DS25BR150 IN+ CML or LVPECL or LVDS 100: IN- OUT- Figure 9. Typical DS25BR150 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 7 DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 60 TOTAL RESIDUAL JITTER (ps) VCC = 3.3V 50 TA = 25°C NRZ PRBS-7 2.5 Gbps 40 VICM = 1.0V 30 20 VICM = 2.4V 10 0 0.25 0.40 0.55 0.70 0.85 1.00 DIFFERENTIAL INPUT VOLTAGE (V) Figure 10. A 2.5 Gbps NRZ PRBS-7 Output Eye Diagram V:100 mV / DIV, H:75 ps / DIV Figure 11. Total Jitter as a Function of Input Amplitude 60 TOTAL RESIDUAL JITTER (ps) VCC = 3.3V 50 40 TA = 25°C NRZ PRBS-7 3.125 Gbps VICM = 1.0V 30 VICM = 2.4V 20 10 0 0.25 0.40 0.55 0.70 0.85 1.00 DIFFERENTIAL INPUT VOLTAGE (V) Figure 12. A 3.125 Gbps NRZ PRBS-7 Output Eye Diagram V:100 mV / DIV, H:50 ps / DIV 8 Figure 13. Total Jitter as a Function of Input Amplitude Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision D (April 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ............................................................................................................ 8 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS25BR150 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) DS25BR150TSD/NOPB ACTIVE WSON NGQ 8 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 85 2R150 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of