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DS26LV31TM/NOPB

DS26LV31TM/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16

  • 描述:

    IC DRIVER 4/0 16SOIC

  • 详情介绍
  • 数据手册
  • 价格&库存
DS26LV31TM/NOPB 数据手册
DS26LV31T SNLS114D – MARCH 1999 – REVISED JULY 2000 DS26LV31T 3-V Enhanced CMOS Quad Differential Line Driver 1 Features 3 Description • The DS26LV31T is a high-speed quad differential CMOS driver that meets the requirements of both TIA/ EIA-422-B and ITU-T V.11. The CMOS DS26LV31T features low static ICC of 100 μA MAX which makes it ideal for battery powered and power conscious applications. • • • • • • • • • • • • Industrial product meets TIA/EIA-422-B (RS-422) and ITU-T V.11 recommendation Military product conforms to TIA/EIA-422-B (RS-422) Interoperable with existing 5V RS-422 networks Industrial and military temperature range VOD of 2-V min over operating conditions Balanced output crossover for low EMI (typical within 40 mV of 50% voltage level) Low power design (330 μW at 3.3V static) ESD ≥ 7 kV on cable I/O pins (HBM) Specified AC parameter: – Maximum driver skew:2 ns – Maximum transition time: 10 ns Pin compatible with DS26C31 High Output Impedance in Power-Off Condition Available in SOIC packaging Standard microcircuit drawing (SMD) 5962-98584 2 Applications • • Motor Control: Brushless DC and Brushed DC Field Transmitters: Temperature Sensors and Pressure Sensors Differential outputs have the same VOD specifies (≥2 V) as the 5 V version. The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. Protection diodes protect all the driver inputs against electrostatic discharge. Outputs have enhanced ESD protection providing greater than 7 kV tolerance. The driver and enable inputs (DI, EN, EN*) are compatible with low voltage LVTTL and LVCMOS devices. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) DS26LV31T D (16) 9.90 mm x 3.91 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Application schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Resistance Characteristics........................... 4 6.5 Electrical Characteristics.............................................5 6.6 Switching Characteristics - Industrial DS26LV31T......6 6.7 Switching Characteristics - Military DS26LV31W .......6 6.8 Typical Characteristics................................................ 7 7 Parameter Measurement Information............................ 8 8 Detailed Description......................................................10 8.1 Overview................................................................... 10 8.2 Functional Block Diagram......................................... 10 8.3 Feature Description...................................................10 8.4 Device Functional Modes..........................................10 9 Application and Implementation.................................. 11 9.1 Application Information..............................................11 9.2 Typical Application.................................................... 11 10 Power Supply Recommendations..............................13 11 Layout........................................................................... 14 11.1 Layout Guidelines................................................... 14 11.2 Layout Example...................................................... 14 12 Device and Documentation Support..........................15 12.1 Documentation Support.......................................... 15 12.2 Receiving Notification of Documentation Updates..15 12.3 Support Resources................................................. 15 12.4 Trademarks............................................................. 15 12.5 Electrostatic Discharge Caution..............................15 12.6 Glossary..................................................................15 13 Mechanical, Packaging, and Orderable Information.................................................................... 15 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (February 2013) to Revision D (June 2020) Page • Added Feature: High Output Impedance in Power-Off Condition.......................................................................1 • Added Device Information table, ESD Ratings table. Thermal Information table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section............................................................................................................................................. 1 Changes from Revision B (March 1999) to Revision C (February 2013) Page • Changed layout of National Data Sheet to TI format.......................................................................................... 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 5 Pin Configuration and Functions Di 1 (1) (16) VCC DO 1+ (2) (15) DI 4 D1 DO 1- (3) (14) DO 4+ D4 EN (4) (13) DO 4(12) EN* DO 2- (5) D2 (11) DO 3- DO 2+ (6) D3 DI 2 (7) (10) DO 3+ (9) DI 3 GND (8) Figure 5-1. Dual-In-Line Package (Top View) Pin Functions PIN NAME NO. I/O(1) DESCRIPTION DI 1 1 I Driver 1 input DO 1+ 2 O Driver 1 output DO 1- 3 O Driver 1 inverted output EN 4 I Active high enable DO 2- 5 O Driver 2 inverted output DO 2+ 6 O Driver 2 output DI 2 7 I Driver 2 input GND 8 G Ground pin DI 3 9 I Dirver 3 input DO 3+ 10 O Driver 3 output DO 3- 11 O Driver 3 inverted output EN* 12 I Active low enable DO 4- 13 O Driver 4 inverted output DO 4+ 14 O Driver 4 output DI 4 15 I Driver 4 input VCC 16 P Power pin (1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 3 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 6 Specifications over operating free-air temperature range (unless otherwise noted)(1) (2) 6.1 Absolute Maximum Ratings MIN MAX UNIT VCC Supply Voltage −0.5 7 V EN, EN* Enable Input Voltage −0.5 VCC+ 0.5 V DI Driver Input Voltage −0.5 VCC+ 0.5 Clamp Diode Current −20 20 mA −150 150 mA DC Output Current, per pin V Driver Output Voltage Tstg (1) (2) (Power Off: DO+, DO−) −0.5 7 V Storage temperature −65 150 °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. 6.2 ESD Ratings VALUE V (ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Driver output pins ±7000 Other pins ±2500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. over operating free-air temperature range (unless otherwise noted) 6.3 Recommended Operating Conditions VCC Supply Voltage TA Operating Free Air Temperature Range MIN NOM MAX 3 3.3 3.6 V DS26LV31T −40 25 85 °C DS26LV31W −55 25 125 °C 500 ns Input Rise and Fall Time UNIT 6.4 Thermal Resistance Characteristics DS26LV31T THERMAL METRIC(1) SOIC (D) UNIT 16 Pins R θJA Junction-to-ambient thermal resistance 73.6 °C/W R θJB Junction-to-board thermal resistance 32.5 °C/W R θJC Junction-to-board thermal resistance 31.1 °C/W ψ JT Junction-to-top characterization parameter 3.7 °C/W ψ JB Junction-to-board characterization parameter 30.8 °C/W R θJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 over operating free-air temperature range (unless otherwise noted)(1) (2) 6.5 Electrical Characteristics PARAMETER TEST CONDITIONS VOD1 Output Differential Voltage VOD2 Output Differential Voltage ΔVOD2 Change in Magnitude of Output Differential Voltage VOD3 Output Differential Voltage VOC Common Mode Voltage ΔVOC Change in Magnitude of Common Mode Voltage RL = 100 Ω (Figure 7-1) IOZ TRI-STATE Leakage Current VOUT = VCC or GND Drivers Disabled Output Short Circuit Current TA = −40°C to +85°C VOUT = 0 V VIN = VCC or GND (4) TA = −55°C to +125°C (5) ISC Pin MIN RL = ∞ (No Load) RL = 100 Ω (Figure 7-1), IO ≥ 20 mA Output Leakage Current 4 UNIT V 2.6 −400 7 400 mV 3.2 3.6 V 1.5 2 V 6 400 mV ±0.5 ±20 μA −70 −150 mA −160 mA 0.03 100 μA −0.08 −100 μA −200 μA RL = 3900 Ω (V.11) Figure 7-1 and (3) VCC = 0 V, VOUT = −0.25 V MAX 3.3 2 −400 DO+, DO− −40 −30 VCC = 0 V, VOUT = 3 V or 6 V IOFF TYP TA = −40°C to +85°C TA = −55°C to +125°C V VIH High Level Input Voltage 2 VCC V VIL Low Level Input Voltage GND 0.8 V IIH High Level Input Current VIN = VCC 10 μA IIL Low Level Input Current VIN = GND VCL Input Clamp Voltage IIN = −18 mA ICC (1) (2) (3) (4) (5) Power Supply Current No Load, VIN (all) = VCC or GND DI, EN, EN* −10 TA = −40°C to +85°C TA = −55°C to +125°C μA −1.5 V 100 μA 125 μA VCC Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except differential voltages VOD1, VOD2, VOD3. All typicals are given for VCC = +3.3 V, TA = +25°C. This specification limit is for compliance with TIA/EIA-422-B and ITU-T V.11. Only one output shorted at a time. The output (true or complement) is configured High. This parameter does not meet the TIA/EIA-422-B specification. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 5 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 over operating free-air temperature range (unless otherwise noted)(1) (2) 6.6 Switching Characteristics - Industrial DS26LV31T MIN TYP MAX tPHLD Differential Propagation Delay High to Low PARAMETER TEST CONDITIONS 6 10.5 16 ns tPLHD Differential Propagation Delay Low to High 6 11 16 ns tSKD Differential Skew (same channel) | tPHLD − tPLHD| 0.5 2 ns tSK1 Skew, Pin to Pin (same device) 1 2 ns RL = 100 Ω, CL = 50 pF (Figure 7-2 and Figure 7-3) (3) UNIT tSK2 Skew, Part to Part 3 5 ns tTLH Differential Transition Time Low to High (20% to 80%) 4.2 10 ns tTHL Differential Transition Time High to Low (80% to 20%) 4.7 10 ns tPHZ Disable Time High to Z 12 20 ns tPLZ Disable Time Low to Z 9 20 ns tPZH Enable Time Z to High 22 32 ns tPZL Enable Time Z to Low 22 32 ns fmax (1) (2) (3) (4) Maximum Operating Frequency (Figure 7-4 and Figure 7-5) (4) 32 MHz f = 1 MHz, tr and tf ≤ 6 ns, 10% to 90%. See TIA/EIA-422-B specifications for exact test conditions. Devices are at the same VCC and within 5°C within the operating temperature range. All channels switching, output duty cycle criteria is 40%/60% measured at 50%. This parameter is specified by design and characterization. over operating free-air temperature range (unless otherwise noted) (1) (2) 6.7 Switching Characteristics - Military DS26LV31W PARAMETER tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD Differential Skew (same channel) | tPHLD − tPLHD| tSK1 Skew, Pin to Pin (same device) tPHZ tPLZ RL = 100 Ω, CL = 50 pF (Figure 7-2 and Figure 7-3) MIN TYP MAX UNIT 5 25 ns 5 25 ns 5 ns 5 ns Disable Time High to Z 35 ns Disable Time Low to Z 35 ns tPZH Enable Time Z to High 40 ns tPZL Enable Time Z to Low 40 ns (1) (2) 6 TEST CONDITIONS (Figure 7-4 and Figure 7-5) f = 1 MHz, tr and tf ≤ 6 ns, 10% to 90%. See TIA/EIA-422-B specifications for exact test conditions. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 6.8 Typical Characteristics Figure 6-1. Voltage vs Time Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 7 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 7 Parameter Measurement Information D0+ R/L 2 2V DI D 0.8 V VOC VOD S1 R/L 2 Driver Enabled D0- Figure 7-1. Differential Driver DC Test Circuit CL D0+ DI D Generator RL CL D0- 50 Ÿ Driver Enabled CL Figure 7-2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 1.5 V 1.5 V tPLHD tPLHD GND D0- VOH 0 V (Differential) VOL D0+ 80% VOD 80% 0V 0V 20% 20% tTHL tTLH A. B. Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50% ZO = 50 Ω, tr ≤ 10 ns, tf ≤ 10. CL includes probe and fixture capacitance Figure 7-3. Differential Driver Propagation Delay and Transition Time Waveforms 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 Test Point D0+ VCC S1 S2 VCC S3 110 D0- CL EN EN EN* A. B. If EN is the input, then EN* = High If EN* is the input, then EN = Low Figure 7-4. Driver Single-Ended TRI-STATE Test Circuit EN 3V 1.5 V 1.5 V 0V EN* tPHZ Input = EN or EN* S1 = VCC S2 = DO+ S3 = GND And / or S1 = GND S2 = D0S3 = GND Input = EN or EN* S1 = GND S2 = DO+ S3 = VCC And / or S1 = VCC S2 = D0S3 = VCC tPZH VOH 1.3 V VOH - 0.3 V § *1' tPLZ tPZL § 9CC 1.3 V VOL + 0.3 V VOL VOL Figure 7-5. Driver Single-Ended TRI-STATE Waveforms Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 9 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 8 Detailed Description 8.1 Overview The DS26LV31T is a high speed CMOS quadruple differential line drivers with 3-state outputs. The devices are designed to be similar to TIA/EIA-422-B and ITU Recommendation V.11 drivers with a single 3.3-V power supply. The drivers also integrate active-high and active-low enables for precise device control. 8.2 Functional Block Diagram 8.3 Feature Description The devices can be configured using the EN and EN* logic inputs to select transmitter output. A logic high on the EN pin or a logic low on the EN* pin enables the device to operate. These pins are simply a way to configure the logic to match that of the receiving or transmitting controller or microprocessor. The DS26LV31T are optimized for balanced-bus transmission at switching rates up to 32 MHz. The CMOS DS26LV31T consumes low static ICC of 100 uA MAX that makes it ideal for battery powered applications. 8.4 Device Functional Modes Table 8-1. Truth Table Enables(1) Iput Outputs EN EN* DI DO+ DO- L H X Z Z L L H H H L All other combinations of enable inputs (1) 10 L = Low logic state, X = Irrelevant, H = High logic state, Z = TRI-STATE Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information When designing a system that uses drivers, receivers, and transceivers, proper cable termination is essential for highly reliable applications with reduced reflections in the transmission line. If termination is used, it can be placed at the end of the cable near the last receiver. A single driver and receiver, TI DS26LV31T and DS26LV32AT, respectively, were tested at room temperature with a 3.3-V supply voltage. For laboratory experiments, 100 feet of 120-Ω, 24-AWG, twisted-pair cable (Bertek) was used. The communication was succssful with 1Mbps data rate. 9.2 Typical Application 9.2.1 Application Figure 9-1. Application Schematic - Encoder Application 9.2.2 Design Requirements Resistor and capacitor (if used) termination values are shown for each laboratory experiment, but vary from system to system. For example, the termination resistor, RT, must be within 20% of the characteristic impedance, Zo, of the cable and can vary from about 80 Ω to 120 Ω. This example requires the following: • • • 3.3-V power source RS-485 bus operating at 32 MHz or less Connector that ensures the correct polarity for port pins Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 11 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 9.2.3 Detailed Design Procedure Ensure values in Absolute Maximum Ratings are not exceeded. Supply voltage, VIH, and VIL must comply with Recommended Operating Conditions. Place the device close to bus connector to keep traces (stub) short to prevent adding reflections to the bus line. If desired, add external fail-safe biasing to ensure 200 mV on the A-B port, if the drive is in high impedance state. General application guidelines and hints for differential drivers and receivers may be found in the following application notes: • AN-214 Transmission Line Drivers and Receivers for TIA/EIA Standards RS-422 and RS-423 • AN-457 High Speed, Low Skew RS-422 Drivers and Receivers Solve Critical System Timing Problems • AN-805 Calculating Power Dissipation for Differential Line Drivers • AN-847 FAILSAFE Biasing of Differential Buses • AN-903 A Comparison of Differential Termination • AN-912 Common Data Transmission Parameters and their Definitions • AN-916 A Practical Guide To Cable Selection 9.2.3.1 Power Decoupling Recommendations Bypass caps must be used on power pins. High frequency ceramic (surface mount is recommended) 0.1 μF in parallel with 0.01 μF at the power supply pin. A 10 μF or greater solid tantalum or electrolytic should be connected at the power entry point on the printed circuit board. + DATA IN DATA OUT RT ± ¼ DS26LV32AT Or ¼ DS26C32T 1 / 4 DS26LV31T Or 1 / 4 DS26C31T Figure 9-2. Typical Driver Connection - RT is optional although highly recommended to reduce reflection + 3.3 V ± 0.3 V With external failsage resistors, Refer to AN-847 DATA IN 680 ± 732 Ÿ + DATA OUT RT 100 Ÿ ± 1 / 4 DS26LV31T Or 1 / 4 DS26C31T 680 ± 732 Ÿ ¼ DS26LV32AT Or ¼ DS26C32T GND Figure 9-3. Typical Driver Connection 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 3V DATA IN 0V D0- VOH D0+ VOL Figure 9-4. Typical Driver Output Waveforms 9.2.4 Application Performance Plots Differential 120-Ω Terminated Output Waveforms (Cat 5E Cable). The DO measured at the TX end Figure 9-5. Voltage vs Time 10 Power Supply Recommendations Place a 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 13 DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 11 Layout 11.1 Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: • • • • • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. Connect low-ESR, 0.1-μF ceramic bypass capacitors between supply pin and ground, placed as close to the device as possible. Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 Layout Example Differential Output 1 0.1 PF Input 1 VCC 1 1A VCC 16 2 1Y 4A 15 3 1Z 4Y 14 4 G 4Z 13 5 2Z G 12 6 2Y 3Z 11 7 2A 3Y 10 8 GND 3A DS26LV31T Differential Output 2 Input 2 Active Low Enable 9 Figure 11-1. Trace Layout on PCB and Recommendations 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T DS26LV31T www.ti.com SNLS114D – MARCH 1999 – REVISED JULY 2000 12 Device and Documentation Support TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below. 12.1 Documentation Support 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DS26LV31T 15 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) DS26LV31TM/NOPB ACTIVE SOIC D 16 48 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 DS26LV31 TM DS26LV31TMX/NOPB ACTIVE SOIC D 16 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 DS26LV31 TM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
DS26LV31TM/NOPB
物料型号:DS26LV31T

器件简介:DS26LV31T是一款高速四路差分CMOS驱动器,符合TIA/EIA-422-B (RS-422)和ITU-T V.11标准。它具有低静态工作电流(最大100μA),适合于电池供电和对功耗有严格要求的应用。

引脚分配:DS26LV31T有16个引脚,其中包括8个地(GND)、4个使能输入(EN和EN)、4个数据输入(DI)和4对差分输出(DO+和DO-)。

参数特性: - 供电电压范围:-0.5V至7V - 存储温度范围:-65°C至150°C - 工作温度范围:工业级为-40°C至85°C,军用级为-55°C至125°C - 最大驱动偏斜:2ns - 最大转换时间:10ns - 输出差分电压:≥2V - 静态工作电流:最大330μW(3.3V静态时)

功能详解:DS26LV31T具有高输出阻抗、在断电条件下保持高阻态的特点。它还具有ESD保护,电缆I/O引脚的ESD等级达到7kV(人体模型HBM)。

应用信息:DS26LV31T适用于电机控制、无刷直流和有刷直流领域传感器、伺服驱动等应用。

封装信息:DS26LV31T提供SOIC封装,具体尺寸为9.90 mm x 3.91 mm。
DS26LV31TM/NOPB 价格&库存

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