ESD752, ESD762
SLVSGX0B – MAY 2022 – REVISED NOVEMBER 2022
ESD752 and ESD762 24-V, 2-Channel, ESD Protection With 5.7 A of 8/20 µs
Surge Protection in a SOT-23 and SOT-323 / SC-70 Package
1 Features
3 Description
•
The ESD752 and ESD762 are bidirectional ESD
protection diodes for USB power delivery (USB-PD)
and industrial interfaces. The ESD752 and ESD762
are rated to dissipate contact ESD that meets
or exceeds the maximum level specified in the
IEC 61000-4-2 level 4 standard (±30-kV or ±20-kV
contact and ±30-kV or ±20-kV airgap). The low
dynamic resistance and low clamping voltage enables
system level protection against transient events. This
protection is key because industrial systems require a
high level of robustness and reliability.
•
•
•
•
•
•
•
•
•
Robust surge protection:
– IEC 61000-4-5 (8/20 µs): 5.7 A or 2.5 A
IEC 61000-4-2 level 4 ESD protection:
– ±30-kV or ±20-kV contact discharge
– ±30-kV or ±20-kV air-gap discharge
24 V working voltage
Bidirectional ESD protection
2-channel device provides complete ESD and
surge protection with single component
Low clamping voltage protects downstream
components
I/O capacitance = 3 pF or 1.7 pF (typical)
SOT-23 (DBZ) small, standard, common footprint
SOT-323 / SC-70 (DCK) very small, standard,
space saving, common footprint
Leaded packages used for automatic optical
inspection (AOI)
These devices feature a low IO capacitance per
channel and a pin-out to suit two IO lines from
damage caused by electrostatic discharge (ESD) and
other transients. The IPP = 5.7 A (8/20 µs surge
waveform) capability of the ESD752 makes it suitable
for protecting USB VBUS against transient surge
events as well as industrial I/O lines. Additionally, the
3 pF or 1.7 pF line capacitance of the ESD752 and
ESD762 are suitable for protecting the slower speed
signals for USB power delivery and IO signals for
industrial applications.
2 Applications
•
•
USB power delivery (USB-PD):
– VBUS protection
– IO protection (withstand short to VBUS)
Industrial control networks:
– Smart distribution system (SDS)
– DeviceNet IEC 62026-3
– CANopen – CiA 301/302-2 and EN 50325-4
– 4/20 mA circuits
– PLC surge protection
– ADC surge protection
The ESD752 and ESD762 are offered in two leaded
packages for easy flow through routing.
Package Information(1)
PART NUMBER
PACKAGE
ESD752
ESD762
(1)
BODY SIZE (NOM)
DCK
2.00 mm × 1.25 mm
(SOT-323 / SC-70, 3)
DBZ (SOT-23, 3)
2.92 mm × 1.30 mm
DBZ (SOT-23, 3)
2.92 mm × 1.30 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
USB
Connector
VBUS
CC1
USB PD
Controller
Over Voltage
Protection
CC2
SBU1
SBU2
D+
D2
1
3
ESD752
2
3
1
1
ESD752
2
2
ESD7x1
1
3
ESD762
USB Power Delivery Applicaon
USB Power Delivery Typical Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
ESD752, ESD762
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SLVSGX0B – MAY 2022 – REVISED NOVEMBER 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings—JEDEC Specification...........................4
6.3 ESD Ratings—IEC Specification................................ 4
6.4 Recommended Operating Conditions.........................4
6.5 Thermal Information....................................................4
6.6 Electrical Characteristics.............................................5
6.7 Typical Characteristics – ESD752...............................6
6.8 Typical Characteristics – ESD762...............................7
7 Detailed Description........................................................8
7.1 Overview..................................................................... 8
7.2 Functional Block Diagram........................................... 8
7.3 Feature Description.....................................................8
7.4 Device Functional Modes............................................9
8 Application and Implementation.................................. 10
8.1 Application Information............................................. 10
8.2 Typical Application.................................................... 10
9 Power Supply Recommendations................................11
10 Layout...........................................................................12
10.1 Layout Guidelines................................................... 12
10.2 Layout Example...................................................... 12
11 Device and Documentation Support..........................13
11.1 Documentation Support.......................................... 13
11.2 Receiving Notification of Documentation Updates.. 13
11.3 Support Resources................................................. 13
11.4 Trademarks............................................................. 13
11.5 Electrostatic Discharge Caution.............................. 13
11.6 Glossary.................................................................. 13
12 Mechanical, Packaging, and Orderable
Information.................................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (August 2022) to Revision B (November 2022)
Page
• Added ESD762 Specifications to the data sheet................................................................................................ 1
• Added the Application Curves section.............................................................................................................. 11
Changes from Revision * (May 2022) to Revision A (August 2022)
Page
• Changed the status of the data sheet from: Advanced Information to: Production Data ...................................1
2
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5 Pin Configuration and Functions
IO
1
3
IO
GND
2
Not to scale
Figure 5-1. DCK and DBZ Package,
3-Pin SOT-323 / SC-70 and SOT-23
(Top View)
Table 5-1. Pin Functions
PIN
NAME
IO
GND
(1)
NO.
TYPE(1)
DESCRIPTION
1, 2
I/O
ESD protected IO
3
G
Connect to ground.
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER
Ppp
Ipp
DEVICE
MIN
MAX
UNIT
IEC 61000-4-5 Power (tp – 8/20 µs) at 25°C
ESD752
210
W
IEC 61000-4-5 Power (tp – 8/20 µs) at 25°C
ESD762
90
W
IEC 61000-4-5 current (tp – 8/20 µs) at 25°C
ESD752
5.7
A
IEC 61000-4-5 current (tp – 8/20 µs) at 25°C
ESD762
2.5
A
TA
Operating free-air temperature
-55
150
°C
TJ
Junction temperature
-55
150
°C
Tstg
Storage temperature
-65
155
°C
(1)
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings—JEDEC Specification
PARAMETER
V(ESD)
(1)
(2)
TEST CONDITION
Electrostatic discharge
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
± 2500
Charged device model (CDM), per JEDEC specification JS-002 (2)
UNIT
V
± 1000
JEDEC document JEP155 states that 500-V HBM allows safe manufactuuring with a standard ESD control proccess.
JEDEC document JEP157 states that 250-V CDM allows safe manufactuuring with a standard ESD control proccess.
6.3 ESD Ratings—IEC Specification
over TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITION
IEC 61000-4-2 Contact Discharge, all pins
V(ESD)
Electrostatic discharge
IEC 61000-4-2 Air Discharge, all pins
DEVICE
VALUE
UNIT
ESD752
±30000
V
ESD762
±20000
V
ESD752
±30000
V
ESD762
±20000
V
NOM
MAX
6.4 Recommended Operating Conditions
PARAMETER
MIN
UNIT
VIN
Input voltage
-24
24
V
TA
Operating free-air temperature
-55
150
°C
6.5 Thermal Information
ESD752
THERMAL
4
METRIC(1)
ESD762
DBZ (SOT-23)
DCK (SOT-323 / SC-70)
DBZ (SOT-23)
3 PINS
3 PINS
3 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
291.5
283.0
325.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
147.1
164.1
178.8
°C/W
RθJB
Junction-to-board thermal resistance
131.1
105.1
165.5
°C/W
ΨJT
Junction-to-top characterization parameter
32.0
67.1
52.4
°C/W
ΨJB
Junction-to-board characterization parameter
130.2
104.4
164.4
°C/W
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6.5 Thermal Information (continued)
ESD752
THERMAL
RθJC(bot)
(1)
METRIC(1)
Junction-to-case (bottom) thermal resistance
ESD762
DBZ (SOT-23)
DCK (SOT-323 / SC-70)
DBZ (SOT-23)
3 PINS
3 PINS
3 PINS
N/A
N/A
N/A
UNIT
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Electrical Characteristics
over TA = 25°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
VRWM
Reverse stand-off voltage
VBRF
Forward breakdown voltage(2)
IIO = 10 mA, IO to GND
VBRR
voltage(2)
IIO = –10 mA, IO to GND
Reverse breakdown
VCLAMP Clamping voltage(3)
VCLAMP Clamping voltage(4)
MAX
UNIT
–24
24
V
25.5
35.5
V
–25.5
V
–35.5
37
V
IPP = 2.5 A, tp = 8/20 µs, from IO to GND
ESD762
36
V
ESD752
35
V
ESD762
38
V
ESD752
30
V
IPP = 16 A, TLP, IO to GND or GND to IO
ILEAK
Leakage current
VIO = ±24 V, IO to GND
RDYN
Dynamic resistance(4)
IO to GND and GND to IO
CL
Line capacitance(6)
VIO = 0 V, f = 1 MHz, Vpp = 30 mV
(6)
TYP
ESD752
Holding voltage after snapback(5) TLP
(3)
(4)
(5)
MIN
IPP = 5.7 A, tp = 8/20 µs, IO to GND
VHold
(1)
(2)
DEVICE
ESD762
30
-50
5
V
50
nA
ESD752
0.35
Ω
ESD762
0.57
Ω
ESD752
3
5
pF
ESD762
1.7
2.8
pF
Measurements made on each IO channel.
VBRF and VBRR are defined as the voltage when +/- 10 mA is applied in the positive or negative direction respectively, before the device
latches into the snapback state.
Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5.
Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008
VHOLD is defined as the lowest voltage on the TLP plot once the trigger threshold is reached and the device snapbacks and begins
clamping the voltage.
Measured from IO to GND on each channel.
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28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
Ipp (A)
Ipp (A)
6.7 Typical Characteristics – ESD752
5
10
15
20
25
Vclamp (V)
30
35
40
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
5
10
Figure 6-1. Positive TLP Curve
25
125
0
35
40
-25
Voltage (V)
Voltage (V)
30
Figure 6-2. Negative TLP Curve
150
100
75
50
Vclamp_ESD at 30ns = 28V
25
Vclamp_ESD at 30ns = -32.9V
-50
-75
-100
-125
0
-150
-25
-100
0
100
200
300
400
Time(ns)
500
600
-175
-100
700
Figure 6-3. +8-kV Clamped IEC Waveform
0
100
200
300
400
Time(ns)
500
600
700
Figure 6-4. −8-kV Clamped IEC Waveform
3.2
10
3.1
8
6
3
4
2.9
ILEAK (nA)
Capacitance (pF)
20
25
Vclamp (V)
tp = 100 ns, Transmission Line Pulse (TLP)
tp = 100 ns, Transmission Line Pulse (TLP)
2.8
2.7
2
0
-2
2.6
-4
2.5
-6
-8
2.4
2.3
-10
-25
Frequency = 1MHz, V pp = 30 mV
-20
2.2
0
0.2
0.4
0.6
0.8
1
1.2
VR (V)
1.4
1.6
1.8
Figure 6-5. Capacitance vs. Bias Voltage
6
15
2
-15
-10
-5
0
VR (V)
5
10
15
20
25
TA = 150 C
ILEAK is less than 1 nA at -55 C and 25 C.
Figure 6-6. Leakage Current vs. Bias Voltage Across
Temperature
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6
5
60
Current 55
Voltage
50
4.5
45
Current (A)
5.5
4
40
3.5
35
3
30
2.5
25
2
20
1.5
15
1
Voltage (V)
6.7 Typical Characteristics – ESD752 (continued)
10
0.5
5
0
-5
0
5
10
15
20
Time ( s)
25
30
0
40
35
Figure 6-7. 8/20 µs Surge Response at 5.7 A
6.8 Typical Characteristics – ESD762
200
50
175
25
0
150
-25
Voltage (V)
Voltage (V)
125
100
75
Vclamp_ESD at 30ns = 27.7V
50
-75
-100
-125
25
-150
0
-175
-25
-100
Vclamp_ESD at 30ns = -29.3V
-50
0
100
200
300
400
Time(ns)
500
600
Figure 6-8. +8-kV Clamped IEC Waveform
700
-200
-100
0
100
200
300
400
Time(ns)
500
600
700
Figure 6-9. −8-kV Clamped IEC Waveform
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7 Detailed Description
7.1 Overview
The ESD752 and ESD762 are dual-channel ESD TVS diodes in SOT-23 and SOT-323 (SC-70) leaded packages
which are convenient for automatic optical inspection. This product offers IEC 61000-4-2 ±30-kV or ±20-kV
air-gap, ±30-kV or ±20-kV contact ESD protection respectively, and has a clamp circuit with a back-to-back TVS
diode for bidirectional signal support.
A typical application of this product is the ESD protection for USB-PD slower speed signals (CC1, CC2, SBU1,
SBU2, D+, and D-). The IPP = 5.7 A (8/20 µs surge waveform) capability of the ESD752 makes it suitable for
protecting VBUS. The ESD752 device is also a good fit for protecting industrial IOs requiring 5.7 A or less of
surge current protection. The 3 pF or 1.7 pF line capacitance of these ESD protection diodes are suitable for
USB-PD slower speed signals and industrial IO applications.
7.2 Functional Block Diagram
1
2
3
7.3 Feature Description
The ESD752 and ESD762 are bidirectional TVS diodes with a high ESD protection level. This device protects
the circuit from ESD strikes up to ±30-kV or ±20-kV contact and ±30-kV or ±20-kV air-gap respectively as
specified in the IEC 61000-4-2 standard. The ESD752 and ESD762 can also handle up to 5.7 A or 2.5 A of
surge current (IEC 61000-4-5 8/20 µs) respectively. The I/O capacitance of 3 pF or 1.7 pF (typical) are suitable
for USB power delivery slower speed signals and industrial applications. These clamping devices have a small
dynamic resistance, which makes the clamping voltage low when the device is actively protecting other circuits.
For example, the ESD752 clamping voltage is only 37 V when the device is taking 5.7 A transient current.
The breakdown is bidirectional so these protection devices are a good fit for applications requiring postive and
negative polarity protection. Low leakage allows these diodes to conserve power when working below the VRWM.
The temperature range of −55°C to +150°C makes this ESD device work at extensive temperatures in most
environments. The leaded SOT-23 and SOT-323 (SC-70) packages are good for applications requiring automatic
optical inspection (AOI).
7.3.1 Temperature Range
These devices are qualified to operate from –55°C to +150°C.
7.3.2 IEC 61000-4-5 Surge Protection
The IO pins can withstand surge events up to 5.7 A and 2.5 A (8/20 µs waveform) for the ESD752 and ESD762
respectively. An ESD-surge clamp diverts this current to ground.
7.3.3 IO Capacitance
The capacitance between the I/O pins is 3 pF and 1.7 pF for the ESD752 and ESD762 respectively. These
capacitances are suitable for USB power delivery slower speed signals and industrial applications.
8
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7.3.4 Dynamic Resistance
The IO pins feature an ESD clamp that has a low RDYN of 0.35 Ω for the ESD752 device, and 0.57 Ω for the
ESD762 device, which prevents system damage during ESD events.
7.3.5 DC Breakdown Voltage
The DC breakdown voltage between the IO pins is a minimum of ± 25.5 V. This protects sensitive equipment is
protected from surges above the reverse standoff voltage of ± 24 V.
7.3.6 Ultra Low Leakage Current
The IO pins feature an ultra-low leakage current of 50 nA (maximum) with a bias of ± 24 V.
7.3.7 Clamping Voltage
The IO pins feature an ESD clamp that is capable of clamping the voltage to 37 V (IPP = 5.7 A for 8/20 μs surge
waveform), 35 V (IPP = 16 A for TLP), 36 V (IPP = 2.5 A for 8/20 μs surge waveform), and 38 V (IPP = 16 A for
TLP) for the ESD752 and ESD762, respectively.
7.3.8 Industry Standard Leaded Packages
These devices feature industry standard SOT-23 (DBZ) and SC-70 (DCK) leaded packages for automatic optical
inspection (AOI).
7.4 Device Functional Modes
The ESD752 and ESD762 are dual channel passive clamp devices that have low leakage during normal
operation when the voltage between IO and GND is below VRWM, and activate when the voltage between IO and
GND goes above VBR. During IEC 61000-4-2 ESD events, transient voltages as high as ±30 kV can be clamped
on either channel. When the voltages on the protected lines fall below the VHOLD, the device reverts back to the
low leakage passive state.
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The ESD752 and ESD762 are dual channel TVS diodes which are used to provide a path to ground for
dissipating ESD events on USB-PD or industrial IO signal lines. As the current from the ESD passes through the
TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC.
The low RDYN of the triggered TVS holds this voltage (VCLAMP) to a safe level for the protected IC.
8.2 Typical Application
USB
Connector
VBUS
CC1
USB PD
Controller
Over Voltage
Protection
CC2
SBU1
SBU2
D+
D2
1
3
ESD752
2
3
1
1
ESD752
2
2
ESD7x1
1
3
ESD762
USB Power Delivery Applicaon
Figure 8-1. USB Power Delivery Typical Application
8.2.1 Design Requirements
For this design example, the ESD752 and ESD762 are used to provide ESD protection on a USB-PD connector.
Table 8-1 lists the known design parameters for this application.
Table 8-1. Design Parameters for the USB Power Delivery Typical Application
10
Design Parameter
Value
Diode configuration
Bidirectional
VBUS Voltage
+ 20 V
VIO signal range
+ 3.3 V
VRWM
± 24 V
Short to VBUS event on VIO
± 20 V
Data rate
Up to 480 Mbps
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8.2.2 Detailed Design Procedure
The ESD752 and ESD762 has a VRWM of ± 24 V to prevent the diode from being damaged during a short event
that can occur when one of the USB-PD slower speed lines (CC1, CC2, SBU1, SBU2, D+, and D-) is shorted to
VBUS. The bidirectional characteristic protects both positive and negative polarity. The low 1.7 pF capacitance of
the ESD762 device enables data rates up to 480 Mbps, which allows the designer to meet the requirements for
the D+ and D- signals. The ESD752 has an IPP = 5.7 A (8/20 µs) surge current capability making it suitable for
protecting the VBUS power rail.
8.2.3 Application Curves
Figure 8-2. +8-kV Clamped IEC Waveform
Figure 8-3. −8-kV Clamped IEC Waveform
9 Power Supply Recommendations
These are passive TVS diode-based ESD protection devices; therefore, there is no requirement to power it.
Ensure that the maximum voltage specifications for each pin are not violated.
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10 Layout
10.1 Layout Guidelines
•
•
•
•
The optimum placement of the device is as close to the connector as possible.
– EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,
resulting in early system failures.
– The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away
from the protected traces which are between the TVS and the connector.
Route the protected traces as straight as possible.
Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded
corners with the largest radii possible.
– Electric fields tend to build up on corners, increasing EMI coupling.
If pin 3 is connected to ground, use a thick and short trace for this return path.
10.2 Layout Example
This is a typical example of a dual channel IO routing.
IO1
GND
IO2
= VIA to GND
Figure 10-1. Routing with DBZ and DCK Package
12
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11 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation, see the following:
•
•
•
•
•
Texas Instruments, ESD Layout Guide user's guide
Texas Instruments, ESD and Surge Protection for USB Interfaces application note
Texas Instruments, ESD Protection Diodes EVM user's guide
Texas Instruments, Generic ESD Evaluation Module user's guide
Texas Instruments, Reading and Understanding an ESD Protection data sheet
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: ESD752 ESD762
13
PACKAGE OPTION ADDENDUM
www.ti.com
15-Aug-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
ESD752DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 150
2RP8
Samples
ESD752DCKR
ACTIVE
SC70
DCK
3
3000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-55 to 150
1MP
Samples
ESD762DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 150
2RK8
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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