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INA105KPG4

INA105KPG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    DIP8

  • 描述:

    IC OPAMP DIFF 1 CIRCUIT 8DIP

  • 数据手册
  • 价格&库存
INA105KPG4 数据手册
® INA105 Precision Unity Gain DIFFERENTIAL AMPLIFIER FEATURES APPLICATIONS ● CMR 86dB min OVER TEMPERATURE ● DIFFERENTIAL AMPLIFIER ● GAIN ERROR: 0.01% max ● NONLINEARITY: 0.001% max ● INSTRUMENTATION AMPLIFIER BUILDING BLOCK ● NO EXTERNAL ADJUSTMENTS REQUIRED ● EASY TO USE ● UNITY-GAIN INVERTING AMPLIFIER ● GAIN-OF-1/2 AMPLIFIER ● NONINVERTING GAIN-OF-2 AMPLIFIER ● COMPLETE SOLUTION ● HIGHLY VERSATILE ● AVERAGE VALUE AMPLIFIER ● ABSOLUTE VALUE AMPLIFIER ● LOW COST ● PLASTIC DIP, TO-99 HERMETIC METAL, AND SO-8 SOIC PACKAGES ● SUMMING AMPLIFIER ● SYNCHRONOUS DEMODULATOR ● CURRENT RECEIVER WITH COMPLIANCE TO RAILS ● 4mA TO 20mA TRANSMITTER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● ALL-PASS FILTERS DESCRIPTION The INA105 is a monolithic Gain = 1 differential amplifier consisting of a precision op amp and on-chip metal film resistors. The resistors are laser trimmed for accurate gain and high common-mode rejection. Excellent TCR tracking of the resistors maintains gain accuracy and common-mode rejection over temperature. The differential amplifier is the foundation of many commonly used circuits. The INA105 provides this precision circuit function without using an expensive precision resistor network. The INA105 is available in 8-pin plastic DIP, SO-8 surface-mount and TO-99 metal packages. –In 2 25kΩ 25kΩ 5 7 6 4 +In 3 25kΩ 25kΩ 1 Sense V+ Output V– Ref International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1985 Burr-Brown Corporation SBOS145 PDS-617G Printed in U.S.A. August, 1993 SPECIFICATIONS ELECTRICAL At +25°C, VCC = ±15V, unless otherwise noted. INA105AM PARAMETER CONDITIONS MIN GAIN Initial(1) Error vs Temperature Nonlinearity(2) OUTPUT Rated Voltage Rated Current Impedance Current Limit Capacitive Load IO = +20mA, –5mA VO = 10V To Common Stable Operation INPUT Impedance(3) Differential Common-Mode Differential Common-Mode TA = TMIN to TMAX Voltage Range(4) Common-Mode 10 +20, –5 Rejection(5) TYP MAX 1 0.005 1 0.0002 0.01 5 0.001 MIN ✻ ✻ 12 INA105KP, KU TYP MAX ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ MIN ✻ ✻ TYP MAX UNITS ✻ 0.01 ✻ ✻ 0.025 ✻ ✻ V/V % ppm/°C % ✻ 0.01 +40/–10 1000 ✻ ✻ ✻ ✻ ✻ ✻ 50 50 ✻ ✻ ✻ ✻ ✻ ✻ 86 90 ✻ ✻ 72 100 V mA Ω mA pF kΩ kΩ V V dB ✻ RTO(6), (7) OFFSET VOLTAGE Initial vs Temperature vs Supply vs Time 50 5 1 20 ±VS = 6V to 18V ✻ 5 ✻ ✻ 250 20 25 ✻ 10 15 ✻ ✻ ✻ ✻ 500 ✻ ✻ µV µV/°C µV/V µV/mo RTO(6), (8) OUTPUT NOISE VOLTAGE fB = 0.01Hz to 10Hz fO = 10kHz DYNAMIC RESPONSE Small Signal Bandwidth Full Power Bandwidth Slew Rate Settling Time: 0.1% 0.01% 0.01% ±10 ±20 80 INA105BM ✻ ✻ 2.4 60 –3dB VO = 20Vp-p 30 2 VO = 10V Step VO = 10V Step VCM = 10V Step, VDIFF = 0V POWER SUPPLY Rated Voltage Range Quiescent Current Derated Performance VO = 0V TEMPERATURE RANGE Specification Operation Storage ±5 –40 –55 –65 1 50 3 4 5 1.5 ±15 ±1.5 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ±18 ±2 ✻ +85 +125 +150 ✻ ✻ ✻ ✻ ✻ ✻ µVp-p nV/√Hz ✻ ✻ ✻ ✻ ✻ ✻ MHz kHz V/µs µs µs µs ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ –40 –40 ✻ ✻ ✻ V V mA ✻ +85 +125 °C °C °C ✻ Specification same as for INA105AM. NOTES: (1) Connected as difference amplifier (see Figure 4). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peakto-peak output. (3) 25kΩ resistors are ratio matched but have ±20% absolute value. (4) Maximum input voltage without protection is 10V more than either ±15V supply (±25V). Limit IIN to 1mA. (5) With zero source impedance (see “Maintaining CMR” section). (6) Referred to output in unity-gain difference configuration. Note that this circuit has a gain of 2 for the operational amplifier’s offset voltage and noise voltage. (7) Includes effects of amplifier’s input bias and offset currents. (8) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA105 2 PIN CONFIGURATIONS Top View TO-99 Tab Top View DIP/SOIC No Internal Connection 8 Ref 1 V+ 7 Ref 1 8 No Internal Connection (1) –In 2 6 3 –In 2 7 V+ +In 3 6 Output V– 4 5 Sense Output 5 Sense +In 4 INA105AM INA105BM V– Case internally connected to V–. Make no connection. NOTE: (1) Performance grade identifier box for small outline surface mount. Blank indicates K grade. Part is marked INA105U. ABSOLUTE MAXIMUM RATINGS ELECTROSTATIC DISCHARGE SENSITIVITY Supply ................................................................................................ ±18V Input Voltage Range ............................................................................ ±VS Operating Temperature Range: M .................................. –55°C to +125°C P, U ................................ –40°C to +85°C Storage Temperature Range: M ..................................... –65°C to +150°C P, U ................................. –40°C to +125°C Lead Temperature (soldering, 10s) M, P ....................................... +300°C Wave Soldering (3s, max) U .......................................................... +260°C Output Short Circuit to Common .............................................. Continuous This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) INA105AM INA105BM INA105KP INA105KU TO-99 Metal TO-99 Metal 8-Pin Plastic DIP 8-Pin SOIC 001 001 006 182 TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. ® 3 INA105 TYPICAL PERFORMANCE CURVES At TA = 25°C, VS = ±15V, unless otherwise noted. SMALL SIGNAL RESPONSE (No Load) Output Voltage (V) –10 to +10 Output Voltage (mV) STEP RESPONSE 0 4 8 12 +50 0 –50 0 16 5 10 Time (µs) Time (µs) MAXIMUM VOUT vs IOUT (Negative Swing) SMALL SIGNAL RESPONSE (RLOAD = ∞ Ω, CLOAD = 1000pF) –17.5 VS = ±18V +50 VOUT (V) Output Voltage (mV) –15 0 –12.5 VS = ±15V –10 VS = ±12V –7.5 –5 –50 VS = ±5V –2.5 0 5 0 10 0 –2 –4 –6 –IOUT (mA) Time (µs) MAXIMUM VOUT vs IOUT (Positive Swing) –8 –10 –12 CMR vs FREQUENCY 110 17.5 VS = ±18V 15 BM CMR (dB) 12.5 VOUT (V) 100 VS = ±15V VS = ±12V 10 7.5 AM, KP, U 90 80 5 VS = ±5V 70 2.5 60 0 6 0 12 18 IOUT (mA) 24 30 10 36 ® INA105 4 100 1k Frequency (Hz) 10k 100k TYPICAL PERFORMANCE CURVES (CONT) At TA = 25°C, VS = ±15V, unless otherwise noted. COMMON-MODE INPUT RANGE vs SUPPLY (Difference Amplifier Connected, VOUT = 0) 140 36 120 30 Input Range (V) PSRR (dB) POWER SUPPLY REJECTION vs FREQUENCY 100 V– 80 60 V+ 10 100 1k Frequency (Hz) Negative CMV 18 Positive CMV 12 6 40 1 24 10k 0 100k ±6 ±3 APPLICATION INFORMATION ±9 ±12 ±15 Supply Voltage (V) ±21 V+ V– Figure 1 shows the basic connections required for operation of the INA105. Power supply bypass capacitors should be connected close to the device pins. ±18 1µF 1µF 7 4 INA105 The differential input signal is connected to pins 2 and 3 as shown. The source impedances connected to the inputs must be nearly equal to assure good common-mode rejection. A 5Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80dB. If the source has a known mismatch in source impedance, an additional resistor in series with one input can be used to preserve good common-mode rejection. The output is referred to the output reference terminal (pin 1) which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage as shown in Figure 2. The source impedance of a signal applied to the Ref terminal should be less than 10Ω to maintain good common-mode rejection. Do not interchange pins 1 and 3 or pins 2 and 5, even though nominal resistor values are equal. These resistors are laser trimmed for precise resistor ratios to achieve accurate gain and highest CMR. Interchanging these pins would not provide specified performance. V2 2 R1 R2 25kΩ V3 3 5 25kΩ 6 R3 VOUT = V3 – V2 25kΩ R4 25kΩ 1 FIGURE 1. Basic Power Supply and Signal Connections. ® 5 INA105 V1 INA105 R1 2 V2 –In R2 INA105 A1 5 6 5 2 R2 VO 6 R1 10Ω V3 V0 0utput R2 R3 3 1 3 R4 +15V 499kΩ VO = (1 + 2R2/R1) (V2 –V1) 100kΩ For low source impedance applications, an input stage using OPA27 op amps will give the best low noise, offset, and temperature drift performance. At source impedances above about 10kΩ, the bias current noise of the OPA27 reacting with the input impedance begins to dominate the noise performance. For these applications, using the OPA111 or dual OPA2111 FET input op amp will provide lower noise performance. For lower cost use the OPA121 plastic. To construct an electrometer use the OPA128. 10Ω –15V FIGURE 2. Offset Adjustment. INA105BM –In V2 2 R1 25kΩ R2 5 3 A1, A2 R1 (Ω) R2 (Ω) OPA27A OPA111B OPA128LM 50.5 202 202 2.5k 10k 10k GAIN CMRR (V/V) (dB) 100 100 100 128 110 118 MAX IB NOISE AT 1kHz (nV/√HZ) 40nA 1pA 75fA 4 10 38 25kΩ 6 +In V3 A2 +In 1 VO = V3 – V3 Offset Adjustment Range = ±300µV V1 R3 R4 25kΩ 25kΩ FIGURE 4. Precision Instrumentation Amplifier. V0 1 INA105 2 V0 = V3 – V2 Gain Error = 0.005% CMR = 100dB Nonlinearity = 0.0002% 5 100Ω 1% 6 V– V0 0 to 2V 100Ω 1% 3 FIGURE 3. Precision Difference Amplifier. 1 IIN 0 to 20mA FIGURE 5. Current Receiver with Compliance to Rails. ® INA105 6 INA105 INA105 2 2 V2 5 5 6 V0 6 V0 1 V1 3 V0 = V1 Gain Error = 0.001% maximum 1 3 V0 = – V2 Gain Error = 0.01% maximum Nonlinearity = 0.001% maximum Gain Drift = 2ppm/°C FIGURE 9. Precision Unity-Gain Buffer. V+ V+ 3 FIGURE 6. Precision Unity-Gain Inverting Amplifier. INA105 2 +15V 2 5 +10V Out 6 REF10 6 INA105 2 7 5 (V+)/2 –10V Out 4 6 1 1 Common 3 4 Common FIGURE 10. Pseudoground Generator. FIGURE 7. ±10V Precision Voltage Reference. INA105 2 V+ 2 5 REF10 6 6 +5V Out 2 V1 INA105 4 V3 5 –5V Out V0 3 V0 = (V1 + V3)/2, ±0.01% maximum 6 1 1 FIGURE 11. Precision Average Value Amplifier. 3 FIGURE 8. ±5V Precision Voltage Reference. ® 7 INA105 INA105 INA105 2 0 to +10V Output ±2ppm/°C 5 2 5 6 1 V0 Output 6 (1) 1 V1 –10V to +10V Input 3 Device VFC320 VFC100 DAC80 DAC703 XTR110 3 V 0 = 2 • V1 Gain Error = 0.01% maximum Gain Drift = 2ppm/°C 2 FIGURE 12. Precision (G = 2) Amplifier. Output 0-10kHz 0-FCLOCK/2 0-FS (12 bits) 0-FS (16 bits) 4-20mA 6 REF10 10V INA105 4 NOTE: (1) Unipolar Input Device. 2 5 FIGURE 15. Precision Bipolar Offsetting. 6 V1 V3 1 V0 R1 3 R2 2 5 INA105 V0 = V1 + V3, ±0.01% maximum FIGURE 13. Precision Summing Amplifier. 6 V1 V3 INA105 2 1 V0 3 ( V0 = 1 + R2 R1 )( V 1 + V3 2 ) For G=10, See INA106. 5 FIGURE 16. Precision Summing Amplifier with Gain. 6 V3 3 V0 = 1/2 V3 ±20V 1 V0 = V3/2, ±0.01% FIGURE 14. Precision Gain = 1/2 Amplifier. ® INA105 8 Offset Adjust 6 7 8 Noise (60Hz hum) INA101AG 3 A1 4 Transducer or Analog Signal 10kΩ 5 20kΩ 10kΩ A3 RG 1 10 20kΩ Output 10kΩ 11 A2 10kΩ 12 Noise (60Hz hum) 100kΩ Shield 2 +VCC 13 –VCC 9 14 Common 3 INA105 2 5 6 1 FIGURE 17. Instrumentation Amplifier Guard Drive Generator. INA105 2 5 INA105 2 6 V1 V2 5 3 6 1 3 V3 V0 = V3 + V4 – V1 – V2 V4 V0 1 FIGURE 18. Precision Summing Instrumentation Amplifier. ® 9 INA105 INA105 INA105 5 2 V2 R 2 5 6 R V1 6 V1 1 3 1 3 IO = (V1 – V2) (1/25k + 1/R) For R ≅ 200 Ω, Figure 24 will provide superior performance. Load V01 IO V2 FIGURE 19. Precision Voltage-to-Current Converter with Differential Inputs. INA105 2 5 INA105 V2 6 V02 5 2 1 3 6 R V3 V01 – V02 = 2 (V2 – V1) 3 1 FIGURE 22. Differential Output Difference Amplifier. IO = (V3 – V2)/R IO Load V2 2 INA105 FIGURE 20. Differential Input Voltage-to-Current Converter for Low IOUT. 5 6 R ≥ 200 Ω R V3 INA105 V2 2 1 3 Gate can be +VCC –5V 5 IO = (V3 – V2)/R R Load 6 IO R < 200Ω R V3 Gate can be +VS –5V 1 3 IO = (V3 – V2) (1/25k + 1/R) Load FIGURE 23. Isolating Current Source with Buffering Amplifier for Greater Accuracy. IO FIGURE 21. Isolating Current Source. ® INA105 10 Window Center–Window Span 2 5 Window Span 0 to +5V 6 1 3 INA105 2 Window Center ±10V 4115 3 9 Window Comparator 7 2 VIN 5 10 5 Lower Limit Upper Limit HI GO LO 8 6 3 INA105 1 Window Center + Window Span FIGURE 24. Window Comparator with Window Span and Window Center Inputs. –In V1 INA105 (1) V+ R2 2 5 R1 R 6 R2 3 1kΩ R 1 +In (1) V2 Load IO IO = (E2 – E1) (1 +2R2/R1) (1/25k + 1/R) NOTE: (1) See Figure 5 for op amp recommendation. FIGURE 25. Precision Voltage-Controlled Current Source with Buffered Differential Inputs and Gain. INA105 2 5 V1 DG188 6 VO 3 1 Logic In 1 Logic In VO 0 –V1 1 +V1 FIGURE 26. Digitally Controlled Gain of ±1 Amplifier. ® 11 INA105 INA105 R2 V1 2 R2 A1 5 R1 49.5Ω 6 R1 V0 = 200 (V2 – V1) 1 A3 R1 49.5Ω 3 R2 R2 A2 V2 Conventional Instrumentation Amplifier (e.g., INA101 or INA102) A = 100 INA105 A=2 FIGURE 27. Boosting Instrumentation Amplifier Common-Mode Range From ±5 to ±7.5V with 10V Full-Scale Output. INA105 R1 2 D1 5 10pF D2 OPA111 6 R3 3 V1 Input R2 V0 = |V1| R4 1 R5 2kΩ FIGURE 28. Precision Absolute Value Buffer. 0 to 10V In 12.5kΩ 1kΩ 50kΩ INA105 OPA27 +15V 2 5 2 50.1Ω 6 REF10 6 10V 50.1Ω 1 3 4 RLOAD 4 to 20mA Out FIGURE 29. Precision 4-20mA Current Transmitter. ® INA105 12 PACKAGE OPTION ADDENDUM www.ti.com 7-Oct-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) INA105AM NRND TO-99 LMC 8 1 RoHS & Green Call TI N / A for Pkg Type INA105AM INA105BM NRND TO-99 LMC 8 1 RoHS & Green Call TI N / A for Pkg Type INA105BM INA105KP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type INA105KP INA105KPG4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type INA105KP INA105KU ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA 105U INA105KU/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA 105U INA105KU/2K5E4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA 105U INA105KUE4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA 105U (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
INA105KPG4 价格&库存

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