LM2639M/NOPB

OBSOLETE LM2639 www.ti.com SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 LM2639 5-Bit Programmable, High Frequency Multi-phase PWM Controller Check for Samples: LM2639 FEATURES DESCRIPTION • • • • • • • • • • • The LM2639 provides an attractive solution for power supplies of high power microprocessors (such as Pentium II™, M II™, K6™-2, K6™-3, etc.) exhibiting ultra fast load transients. Compared to a conventional single-phase supply, an LM2639 based multi-phase supply distributes the thermal and electrical loading among components in multiple phases and greatly reduces the corresponding stress in each component. The LM2639 can be programmed to control either a 3-phase converter or a 4-phase converter. Phase shift among the phases is 120° in the case of three phase and 90° with four-phase. Because the power channels are out of phase, there can be significant ripple cancellation for both the input and output current, resulting in reduced input and output capacitor size. Due to the nominal operating frequency of 2 MHz per phase, the size of the output inductors can be greatly reduced which results in a much faster load transient response and a dramatically shrunk output capacitor bank. Microprocessor power supplies with all surface mount components can be easily built. 1 234 Ultra Fast Load Transient Response Enables all Surface-Mount-Design Selectable 2, 3, 4 Phase Operation Clock Frequency from 40 kHz to 10 MHz Precision Load Current Sharing 5-bit Programmable from 3.5V to 1.3V VID Code Compatible to VRM 8.X Specification Output Voltage is 2.0V for VID Code 11111 Selectable Internal or External Clock Digital 16-Step Soft Start Input Under-Voltage Lock-Out, Over-Current Protection APPLICATIONS • • Servers and Workstations High Current, Ultra-Fast Transient Microprocessors The internal high speed transconductance amplifier specifies good dynamic performance. The output drive voltages can be adjusted through a resistor divider to control switching loss in the external FETs. The internal master clock frequency of up to 8 MHz is set by an external reference resistor. An external clock of 10 MHz can also be used to drive the chip to achieve frequency control and multi-chip operation. The LM2639 also provides input under-voltage lockout with hysteresis and input over-current protection. 1 2 3 4 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. M II is a trademark of Cyrix Corporation. Pentium II is a trademark of Intel Corporation. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated OBSOLETE LM2639 SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 www.ti.com Pin Configuration 24-Pin Plastic SOIC (Top View) See Package Number DW0024B These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VCC5V 7V VCC12V 20V Junction Temperature 125°C (3) 1.6W Storage Temperature −65°C to +150°C Power Dissipation ESD Susceptibility (4) 2 kV Soldering Time, Temperature (1) (2) (3) (4) 10 sec., 300°C Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating ratings do not imply specified performance limits. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Maximum allowable power dissipation is a function of the maximum junction temperature, TJMAX, the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PMAX = (TJMAX − TA)/θJA. The junction-to-ambient thermal resistance, θJA, for LM2639 is 78°C/W. For a TJMAX of 150°C and TA of 25°C, the maximum allowable power dissipation is 1.6W. ESD ratings for pins DRV0, DRV1, DRV2 and DRV3 is 1kV. ESD rating for all other pins is 2kV. Operating Ratings (1) VCC 4.75V to 5.25V Junction Temperature Range (1) 2 0°C to 70°C Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating ratings do not imply specified performance limits. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 OBSOLETE LM2639 www.ti.com SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 Electrical Characteristics VCC5V = 5V, VCC12V = 12V unless otherwise specified. Typicals and limits appearing in plain type apply for TA = TJ = +25°C. Limits appearing in boldface type apply over the entire operating temperature range. Symbol Parameter Vcc5V VCC5V Pin Voltage Vcc12V VCC12V Pin Voltage VDACOUT 5-bit DAC Output Voltage Conditions See (1) ICC12V Quiescent VCC12V Current Enable = 5V, VID = 00001, DRV Outputs Floating ICC5V Operating VCC5V Current VOUT = 2.00V VREF Rref Pin Voltage VINL VINH Vid0:4, Clksel, Divsel, and Enable Pins Logic Threshold Vid0:4 and Enable Pins Internal Pullup Current IINL Clksel, Divsel Pins Internal Pullup Current Min Typ Max Units 4.5 5.0 5.5 V 10.0 V 12.0 18.0 N−1% N N+1% N−1.5% N N+1.5% 1.3 3 mA 4.3 8 mA 1.225 Logic Low (2) Logic High (3) The Corresponding Pin = 0V 1.8 V 1.5 3.5 2.8 60 100 140 −10 0 10 Gate Driver Resistance When Sinking Current ISINK = 50 µA, VCC12V = 14V VDRV DRV0:3 Output Voltage IDRV = 10 mA, VCC12V = 14V, OutV = 12V or 5V tfall DRV0:3 Fall Time See ISRC DRV0:3 Source Current DRV0:3 = 0V, VCC12V = 14V, OutV = 5V ISINK DRV0:3 Sink Current DRV0:3 = 5V, VCC12V = 14V, OutV = 5V BgOUT Voltage Current Limit Not Activated 4 Current Limit Activated 0 FB Pin Bias Current FB = 2V 30 IFB V V V µA Ω 12 OutV − 0.3V (4) OutV OutV + 0. 3V V 7 ns 40 60 mA 90 160 250 mA V nA BgOUT Sink Current BgOUT = 1V 1.0 2.4 5 mA FOSC Oscillator Frequency 8.02kΩ from Rref Pin to Ground 7.0 8.0 8.7 MHz ΔD DRV0:3 Duty Cycle Match Duty Cycle = 50% −1 +1 % Δph DRV0:3 Phase Accuracy Duty Cycle = 50%, Fclock = 8 MHz −1 +1 Deg Toff PWM Off time Toff Divide by 4 22 Divide by 3 22 OutV Drive Voltage Range VOCC_CM Over-current Comparator Common Mode Range IB_OC+ OC+ Input Bias Current VIN = 5V, OC+ = 5V, OC− = 4V 100 IB_OC− OC− Input Bias Current VIN = 5V, OC+ = 6V, OC− = 5V VOS_OCC Over-current Comparator Input Offset Voltage VIN = 5V DMAX Maximun Duty Cycle FB = 0V gm Error Amplifier Transconductance Vramp Ramp Signal Peak-to-Peak Amplitude Icomp COMP Pin Source Current (1) (2) (3) (4) Output Freq.= 2MHz, VO = 2.00V 0 12 % Vcc12 V 12 V 145 200 µA 85 125 165 µA 2 16 42 3 VIN = 12V mV 21 250 78 % 1.36 mmho 2 V 400 550 µA The letter N stands for the typical output voltages appearing in italic boldface type in 5-Bit DAC Output Voltage Table. Max value of logic low means any voltage below this value is specified to be taken as logic low whereas a voltage higher than this value is not specified to be taken as a logic low. Min value of logic high means any voltage above this value is specified to be taken as logic high whereas a voltage lower than this value is not specified to be taken as a logic high. When driving bipolar FET drivers in the typical application circuit. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 3 OBSOLETE LM2639 SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) VCC5V = 5V, VCC12V = 12V unless otherwise specified. Typicals and limits appearing in plain type apply for TA = TJ = +25°C. Limits appearing in boldface type apply over the entire operating temperature range. Symbol Parameter Conditions Min Typ Max Units 160 280 400 µA Icomp COMP Pin Sink Current Vcomp_hi COMP Pin High Clamp 2.9 V Vcomp_lo COMP Pin Low Clamp 0.19 V VPOR Power On Reset Trip Point tSS (5) 4 Vcc5V Pin Voltage Rising 4.0 Vcc5V Pin Voltage Falling 3.6 (5) Vcc12V Minimum Working Voltage See Soft Start Delay FOSC = 8MHz V 3.8 V 1.6 ms When Vcc12V pin goes below this voltage, all DRV pins go to 0V. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 OBSOLETE LM2639 www.ti.com SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 5-BIT DAC OUTPUT VOLTAGE TABLE Symbol VDACOUT Parameter Conditions 5-Bit DAC Output Voltages for Different VID Codes Typical Units VID4:0 = 01111 1.30 V VID4:0 = 01110 1.35 VID4:0 = 01101 1.40 VID4:0 = 01100 1.45 VID4:0 = 01011 1.50 VID4:0 = 01010 1.55 VID4:0 = 01001 1.60 VID4:0 = 01000 1.65 VID4:0 = 00111 1.70 VID4:0 = 00110 1.75 VID4:0 = 00101 1.80 VID4:0 = 00100 1.85 VID4:0 = 00011 1.90 VID4:0 = 00010 1.95 VID4:0 = 00001 2.00 VID4:0 = 00000 2.05 VID4:0 = 11111 2.0 VID4:0 = 11110 2.1 VID4:0 = 11101 2.2 VID4:0 = 11100 2.3 VID4:0 = 11011 2.4 VID4:0 = 11010 2.5 VID4:0 = 11001 2.6 VID4:0 = 11000 2.7 VID4:0 = 10111 2.8 VID4:0 = 10110 2.9 VID4:0 = 10101 3.0 VID4:0 = 10100 3.1 VID4:0 = 10011 3.2 VID4:0 = 10010 3.3 VID4:0 = 10001 3.4 VID4:0 = 10000 3.5 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 5 OBSOLETE LM2639 SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 www.ti.com Pin Description Pin 6 Pin Name Pin Function 1 Vcc5V Supply Voltage Input (5V nominal) 2 Divsel Selects Phase Mode. Logic low selects 4 phase. Logic high selects 3 phase. 2 phase operation is achieved by using 2 outputs in 4 phase mode. 3 Clksel Clock Select: Logic high selects internal clock. Logic low selects external clock. 4 Extclk External Clock Input. Output frequency = Clock Input / No. of Phases. Connect to Vcc5V to select internal clock. 5 Rref Connects to external reference resistor. Sets the operating frequency of the internal clock and the ramp time for the PWM. Reference voltage at this pin is 1.26V. 6 Vid0 5-Bit DAC Input (LSB). 7 Vid1 5-Bit DAC Input. 8 Vid2 5-Bit DAC Input. 9 Vid3 5-Bit DAC Input. 10 Vid4 5-Bit DAC Input (MSB) 11 OC+ Over-current Comparator. Non-inverting input. 12 OC− Over-current Comparator. Inverting input. 13 COMP Compensation Pin. This is the output of the internal transconductance amplifier. Compensation network should be connected between this pin and feedback ground FBG. 14 FB Feedback Input. Normally Kelvin connected to supply output. 15 Bgout Current Limit Flag. Goes to logic low when current limit is activated. When over-current condition is removed, this pin is weakly pulled up to Vcc5V. 16 FBG Feedback Ground. This pin should be connected to the ground at the supply output. 17 ENABLE Output Enable Pin. Tie to logic high to enable and logic low to disable. 18 GND Power Ground Pin. 19 DRV2 Phase 2 Output. 20 DRV0 Phase 0 Output. 21 Vcc12V Supply Voltage for FET Drivers DRV0:3. 22 DRV1 Phase 1 Output. 23 DRV3 Phase 3 Output. 24 OutV Sets the maximum DRV0:3 drive voltage to reduce switching loss in external FET's. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 OBSOLETE LM2639 www.ti.com SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 Block Diagram Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 7 OBSOLETE LM2639 SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 www.ti.com Typical Application 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 OBSOLETE LM2639 www.ti.com SNVS059C – FEBRUARY 2000 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ............................................................................................................ 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM2639 9 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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