LM2694EVAL

User's Guide SNVA161A – May 2006 – Revised May 2013 AN-1472 LM2694 Evaluation Board 1 Introduction The LM2694EVAL evaluation board provides the design engineer with a fully functional buck regulator, employing the constant on-time (COT) operating principle. This evaluation board provides a 5 V output over an input range of 8 V - 30 V. The circuit delivers load currents to 0.5A, with current limit set at ≊0.65A. The board is populated with all external components except R4, C6, C9 and C12. These components provide options for managing the output ripple voltage as described later in this document. The board’s specification are: • Input Voltage: 8V to 30V • Output Voltage: 5V • Maximum load current: 0.5A • Minimum load current: 0A • Current Limit: 0.65A • Measured Efficiency: 93.4% (VIN = 8V, IOUT = 200 mA) • Nominal Switching Frequency: 250 kHz • Size: 2.25 in. x 0.88 in. x 0.55 in Figure 1. Evaluation Board - Top Side 2 Theory of Operation Refer to the evaluation board schematic in Figure 5. When the circuit is in regulation, the buck switch is on each cycle for a time determined by R1 and VIN according to Equation 1: tON = 1.14 x 10-10 x (R1 + 1.4k) (VIN ± 1.5V) + 95 ns (1) All trademarks are the property of their respective owners. SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback AN-1472 LM2694 Evaluation Board Copyright © 2006–2013, Texas Instruments Incorporated 1 Board Layout and Probing www.ti.com The on-time of this evaluation board ranges from ≊2600 ns at VIN = 8V, to ≊660 ns at VIN = 30V. The ontime varies inversely with VIN to maintain a nearly constant switching frequency. At the end of each ontime the Minimum Off-Timer ensures the buck switch is off for at least 265 ns. In normal operation, the offtime is much longer. During the off-time, the output capacitor (C7) is discharged by the load current. When the output voltage falls sufficiently that the voltage at FB is below 2.5V, the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, ≊25 mV of ripple is required at FB to switch the regulation comparator. For a detailed block diagram and a complete description of the various functional blocks, see the LM2694 30V, 600 mA Step Down Switching Regulator Data Sheet (SNVS444). 3 Board Layout and Probing The pictorial in Figure 1 shows the placement of the circuit components. The following should be kept in mind when the board is powered: • When operating at high input voltage and high load current, forced air flow is recommended. • The LM2694, and diode D1 may be hot to the touch when operating at high input voltage and high load current. • Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible damage to the circuit. • At maximum load current (0.5A), the wire size and length used to connect the load becomes important. Ensure there is not a significant drop in the wires between this evaluation board and the load. 4 Board Connection/Start-up The input connections are made to the J1 connector. The load is connected to the OUT and GND terminals. Ensure the wires are adequately sized for the intended load current. Before start-up a voltmeter should be connected to the input terminals, and to the output terminals. The load current should be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased gradually to 8 V, at which time the output voltage should be 5 V. If the output voltage is correct with 8 V at VIN, then increase the input voltage as desired and proceed with evaluating the circuit. 5 Output Ripple Control The LM2694 requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the switching waveform at the SW pin, for proper operation. In the simplest configuration that ripple is derived from (see Figure 4), the ripple at the output, generated by the inductor’s ripple current flowing through R4. That ripple voltage is attenuated by the feedback resistors, requiring that the ripple amplitude at OUT be higher than the minimum of 25 mVp-p by the gain factor. Options for reducing the output ripple are discussed below, and the results are shown in the graph of Figure 8. 5.1 Minimum Output Ripple This evaluation board is supplied configured for minimum ripple at OUT. The output ripple, that ranges from 2 mVp-p at VIN = 8 V to 3 mVp-p at VIN = 30 V, is determined primarily by the ESR of output capacitor (C7) and the inductor’s ripple current that ranges from 60 mAp-p to 100 mAp-p over the input voltage range. The ripple voltage required by the FB pin is generated by R6, C10 and C11 since the SW pin switches from -1 V to VIN, and the right end of C10 is a virtual ground. The values for R6 and C10 are chosen to generate a 30-40 mVp-p triangle waveform at their junction. That triangle wave is then coupled to the FB pin through C11. Equation 2The following procedure is used to calculate values for R6, C10 and C11: • Calculate the voltage VA using Equation 2: VA = VOUT - (VSW x (1 - (VOUT/VIN))) • R6 x C10 = 2 (2) where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1V), and VIN is the minimum input voltage. For this circuit VA calculates to 4.63V. This is the DC voltage at the R6/C10 junction, and is used in Equation 3. Calculate the R6 x C10 product: (VIN ± VA) x tON 'V (3) AN-1472 LM2694 Evaluation Board SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Output Ripple Control www.ti.com where tON is the maximum on-time (≊2600 ns), VIN is the minimum input voltage, and ΔV is the desired ripple amplitude at the R6/C10 junction, 30 mVp-p for this example. R6 x C10 = (8V ± 4.63V) x 2600 ns = 2.9 x 10-4 0.03V (4) R6 and C10 are then chosen from standard value components to satisfy the above product. For example, C10 can be 2700 pF requiring R6 to be 110 kΩ. C11 is chosen to be 0.01 µF, large compared to C10. The circuit as supplied on this EVB is shown in Figure 2. 8V - 30 V Input IN GND J1 C1 3.3 PF VIN 13 LM2694 C2 R1 VCC 12 0.1 140k PF BST 3 C5 RON/SD 11 SW 2 SS 10 C4 0.022 PF C3 0.1 PF 0.022 PF 6 5V Out 150 PH 2700 pF 110k D1 ISEN 4 FB 9 L1 R6 C8 C10 C11 0.01PF R2 C7 2.49k 22 PF SGND 5 RTN J2 0.1 PF J3 R3 2.49k Gnd Figure 2. Minimum Output Ripple Configuration 5.2 Intermediate Ripple Level Configuration This configuration generates more ripple at the output than the above configuration, but uses one less capacitor. If some ripple can be tolerated in the application, this configuration is slightly more economical, and simpler. R4 and C6 and C9 are used instead of R6, C7, C8, C10 and C11, as shown in Figure 3. 8V - 30 V Input IN GND J1 C1 3.3 PF VIN 13 C2 R1 LM2694 0.1 140k PF BST 3 C5 RON/SD 11 C4 0.022 PF VCC 12 SW 2 SS 10 ISEN 4 FB 9 6 RTN C3 0.1 PF 0.022 PF L1 5V Out 150 PH J2 D1 C9 R2 2.49k 2700 pF SGND 5 R3 2.49k R4 0.5: C6 22 PF J3 Gnd Figure 3. Intermediate Ripple Configuration SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback AN-1472 LM2694 Evaluation Board Copyright © 2006–2013, Texas Instruments Incorporated 3 Minimum Load Current www.ti.com R4 is chosen to generate ≥25 mV - 30 mVp-p at the output, knowing that the minimum ripple current in this circuit is 60 mAp-p at minimum VIN. C9 couples that ripple to the FB pin without the attenuation of the feedback resistors. C9's minimum value is calculated from Equation 5: C9 = tON(max) (R2//R3) (5) where tON(max) is the maximum on-time (at minimum VIN), and R2//R3 is the equivalent parallel value of the feedback resistors. For this evaluation board, tON(max) is approximately 2600 ns, and R2//R3 = 1.25 kΩ, and C9 calculates to a minimum of 2080 pF. The resulting ripple at the output ranges from 30 mVp-p to 50 mVp-p over the input voltage range. 5.3 Lowest Cost Configuration This configuration is the same as option B above, but without C9. Since 25 mVp-p are required at the FB pin, R4 is chosen to generate 50 mV at OUT, knowing that the minimum ripple current in this circuit is 60 mAp-p at minimum VIN. To allow for tolerances, 1.0 Ω is used for R4. The resulting ripple at OUT ranges from ≊60 mVp-p to ≊100 mVp-p over the input voltage range. If the application can tolerate this ripple level, this is the most economical solution. The circuit is shown in Figure 4. An alternative to this circuit is to eliminate R4 if C6 has sufficient ESR. 8V - 30 V Input IN GND J1 C1 3.3 PF VIN 13 C2 R1 LM2694 0.1 140k PF BST 3 C5 RON/SD 11 C4 0.022 PF VCC 12 SW 2 SS 10 C3 0.1 PF 0.022 PF L1 6 RTN J2 D1 ISEN 4 FB 9 5V Out 150 PH SGND 5 R2 2.49k R3 2.49k R4 1.0: C6 22 PF J3 Gnd Figure 4. Lowest Cost Configuration 6 Minimum Load Current The LM2694 requires a minimum load current of ≊500 µA to ensure the boost capacitor (C5) is recharged sufficiently during each off-time. In this evaluation board, the minimum load current is provided by the feedback resistor (R2, R3), allowing the board’s minimum load current to be specified at zero. 7 Circuit Performance Figure 6 through Figure 9 indicate the performance of this evaluation board. Figure 10 indicates waveforms at various points within the circuit and Figure 11 indicates how the output responds to the load current changing between 200 mA and 400 mA. Figure 12 indicates the preferred method for using a scope probe to measure output ripple and transient waveforms. The probe’s ground ring touches the output ground terminal (J3) and the probe’s tip touches the 5V output terminal (J2). This method eliminates noise and switching spikes which the probe’s ground lead would pick up if it were used. 4 AN-1472 LM2694 Evaluation Board SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Circuit Performance www.ti.com 8V - 30 V Input IN GND J1 C1 3.3 PF VIN 13 C2 R1 LM2694 0.1 140k PF BST 3 C5 RON/SD 11 C4 0.022 PF VCC 12 SW 2 SS 10 ISEN 4 FB 9 6 RTN C3 0.1 PF 0.022 PF L1 5V Out 150 PH 2700 pF 110k D1 R6 0.01PF SGND 5 C10 C11 C12 C8 R2 2.49k C9 R3 2.49k R4 C7 22 PF C6 J2 0.1 PF J3 Gnd Figure 5. Evaluation Board Schematic Table 1. Bill of Materials (BOM) Item Description Mfg Part Number Package Value C1 Ceramic Capacitor TDK C3225X7R1H335M 1210 3.3 µF, 50 V C2, 3, 8 Ceramic Capacitor TDK C2012X7R2A104M 0805 0.1 µF, 100 V C4, 5 Ceramic Capacitor TDK C2012X7R2A223M 0805 0.022 µF, 100 V Unpopulated 1210 TDK C3225X7R1C226M 1210 Unpopulated 0805 C6 C7 Ceramic Capacitor C9 22 µF, 16 V C10 Ceramic Capacitor TDK C2012X7R2A272M 0805 2700 pF, 100 V C11 Ceramic Capacitor TDK C2012X7R2A103M 0805 0.01 µF, 100 V C12 Ceramic Capacitor Unpopulated 0805 D1 Schottky Diode Diodes Inc. DFLS160 Power DI 123 60 V, 1A L1 Inductor TDK SLF10145-151MR79, or Cooper Bussman DR74-151 10 mm x 10 mm 150 µH, 0.8A R1 Resistor Vishay CRCW08051413F 0805 140 kΩ R2, R3 Resistor Vishay CRCW08052491F 0805 2.49 kΩ R4 Resistor Unpopulated 2010 R6 Resistor Vishay CRCW08051103F 0805 U1 Switching Regulator Texas Instruments LM2694MT TSSOP-14 SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback 110 kΩ AN-1472 LM2694 Evaluation Board Copyright © 2006–2013, Texas Instruments Incorporated 5 Circuit Performance 8 www.ti.com Circuit Performance 100 100 Vin = 8V 500 mA 90 12V EFFICIENCY (%) EFFICIENCY (%) 90 30V 80 70 60 100 mA 80 IOUT = 50 mA 70 60 50 50 0 100 200 300 400 500 5 10 LOAD CURRENT (mA) 25 30 Figure 7. Efficiency vs Input Voltage 350 100 IOUT = 100 mA Option C 80 FREQUENCY (kHz) OUTPUT RIPPLE AMPLITUDE (mVp-p) 20 VIN (V) Figure 6. Efficiency vs Load Current 60 Option B 40 300 250 200 20 Load Current = 400 mA Option A 150 0 5 10 15 20 25 30 5 10 15 20 25 30 VIN (V) VIN (V) 6 15 Figure 8. Output Voltage Ripple Figure 9. Switching Frequency vs. Input Voltage Figure 10. Circuit Waveforms Figure 11. Transient Response AN-1472 LM2694 Evaluation Board SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated PCB Layout www.ti.com Figure 12. Preferred Method for Measuring Output Waveforms 9 PCB Layout Figure 13. Board Silkscreen Figure 14. Board Top Layer SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback AN-1472 LM2694 Evaluation Board Copyright © 2006–2013, Texas Instruments Incorporated 7 PCB Layout www.ti.com Figure 15. Board Bottom Layer (viewed from top) 8 AN-1472 LM2694 Evaluation Board SNVA161A – May 2006 – Revised May 2013 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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