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LM2775
SNVSA57 – MAY 2015
LM2775 Switched Capacitor 5-V Boost Converter
1 Features
3 Description
•
•
•
•
The LM2775 is a regulated switched-capacitor
doubler that produces a low-noise output voltage. The
LM2775 can supply up to 200 mA of output current
over a 3.1-V to 5.5-V input range, as well as up to
125 mA of output current when the input voltage is as
low as 2.7 V. At low output currents, the LM2775 can
reduce its quiescent current by operating in a pulse
frequency modulation (PFM) mode. PFM mode can
be enabled or disabled by driving the PFM pin to high
or low. Additionally, when the LM2775 is in shutdown,
the user can chose to have the output voltage pulled
to GND or left in a high impedance state by setting
the OUTDIS pin high or low.
1
•
•
•
•
2.7-V to 5.5-V Input Range
Fixed 5-V Output
200-mA Output Current
Inductorless Solution: Only Requires 3 Small
Ceramic Capacitors
Shutdown Disconnects Load from VIN
Current Limit and Thermal Protection
2-MHz Switching Frequency
PFM Operation During Light Load Currents (PFM
pin tied high)
2 Applications
•
•
•
The LM2775 has been placed in TI's 8-pin WSON, a
package with excellent thermal properties that keeps
the part from overheating under almost all rated
operating conditions.
USB OTG
HDMI Power
Portable Electronics
Device Information(1)
PART NUMBER
LM2775
PACKAGE
BODY SIZE (NOM)
WSON (8)
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
space
space
space
Typical Application Circuit
LM2775
Load Regulation
5 V @ up to 200 mA
VIN
VOUT
EN
C1+
PFM
C1-
5.04
2.7 V to 5.5 V
2.2 PF
5.02
2.2 PF
5.00
OUTDIS
GND
VOUT (V)
1 PF
4.98
4.96
4.94
4.92
4.90
1E-5
TA = -40°C
TA = +25°C
TA = +85°C
0.0001
0.001
IOUT (A)
0.01
0.05
0.2 0.5
D003
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2775
SNVSA57 – MAY 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 11
8
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application ................................................. 12
9 Power Supply Recommendations...................... 17
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 18
11 Device and Documentation Support ................. 19
11.1 Trademarks ........................................................... 19
11.2 Electrostatic Discharge Caution ............................ 19
11.3 Glossary ................................................................ 19
Detailed Description .............................................. 9
12 Mechanical, Packaging, and Orderable
Information ........................................................... 19
7.1 Overview ................................................................... 9
4 Revision History
2
DATE
REVISION
NOTES
May 2015
*
Initial release.
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5 Pin Configuration and Functions
DSG Package
8-Pin WSON with Thermal Pad
Top View
8
PA
D
1
TH
E
RM
AL
2
3
4
7
6
5
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
PFM
I
PFM mode enable. Allow or disallow PFM operation. 1 = PFM enabled, 0 = PWM disabled
2
C1–
P
Flying capacitor pin
3
C1+
P
Flying capacitor pin
4
OUTDIS
I
Output disconnect option. 1 = Active output discharge during shutdown, 0 = High impedance
output without pull-down during shutdown.
5
EN
I
Chip enable. 1 = Enabled, 0 = Disabled
6
VOUT
O
Charge pump output
7
VIN
P
Input voltage
8
GND
G
Ground
Thermal Pad
GND
GND
Connect to GND
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VIN, VOUT
–0.3
6
V
EN, OUTDIS, PFM
–0.3
VIN + 0.3 with 6 V Max
Continuous power dissipation
Internally Limited
Junction temperature (TJ-MAX)
Storage temperature, Tstg
(1)
–65
V
°C
125
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±250
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
2.7
5.5
V
Junction temperature (TJ )
–40
125
°C
Ambient temperature (TA )
–40
85
°C
6.4 Thermal Information
LM2775
THERMAL METRIC (1)
DSG (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
71.6
RθJC(top)
Junction-to-case (top) thermal resistance
95.0
RθJB
Junction-to-board thermal resistance
41.5
ψJT
Junction-to-top characterization parameter
3.2
ψJB
Junction-to-board characterization parameter
41.8
RθJC(bot)
Junction-to-case (bottom) thermal resistance
12.8
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
Typical limits tested at TA = 25°C. Minimum and maximum limits apply over the full operating ambient temperature range
(−40°C ≤ TA ≤ 85°C). VIN = 3.6 V, CIN = COUT = 2.2 µF, C1 = 1 µF
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
4.8
5
5.2
IOUT = 0 mA, PFM = ‘1’
75
150
IOUT = 0 mA, PFM = ‘0’
5
VOUT
Output voltage regulation
IOUT = 180 mA
IQ
Quiescent current
ISD
Shutdown current
EN = '0'
0.7
IOUTDIS
Output discharge current
OUTDIS = '1'
500
ICL
Input current limit
VIL
Input logic low: EN, OUTDIS, PFM
VIH
Input logic high: EN, OUTDIS, PFM
UVLO
Undervoltage lockout
UNIT
V
µA
mA
3
µA
µA
600
mA
0
0.4
V
1.2
VIN
V
VIN falling
2.4
VIN rising
2.6
V
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
ƒSW
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.7
2
2.3
MHz
Switching frequency
6.7 Typical Characteristics
5.2
5.2
5.1
5.1
5.0
5.0
4.9
4.9
VOUT (V)
VOUT (V)
TA = 25°C, VIN = 3.6 V, CIN = COUT = 10 µF (10-V 0402 case), C1 = 1 µF (10-V 0402 case), VEN = VIN.
4.8
4.7
4.7
4.6
4.6
TA = -40°C
TA = +25°C
TA = +85°C
4.5
4.4
2.7
4.8
3.1
3.5
ILOAD = 200 mA
3.9
4.3
VIN (V)
4.7
5.1
TA = -40°C
TA = +25°C
TA = +85°C
4.5
5.5
4.4
2.7
3.1
3.5
D001
PFM = '0'
ILOAD = 200 mA
Figure 1. PWM Output Regulation
3.9
4.3
VIN (V)
4.7
5.1
5.5
Figure 2. PFM Output Regulation
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D002
PFM = '1'
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Typical Characteristics (continued)
TA = 25°C, VIN = 3.6 V, CIN = COUT = 10 µF (10-V 0402 case), C1 = 1 µF (10-V 0402 case), VEN = VIN.
5.04
5.15
5.02
5.10
VOUT (V)
VOUT (V)
5.00
4.98
4.96
5.05
5.00
4.94
4.95
TA = -40°C
TA = +25°C
TA = +85°C
4.92
4.90
1E-5
0.0001
0.001
IOUT (A)
VIN = 3.3 V
0.01
0.05
TA = -40°C
TA = +25°C
TA = +85°C
4.90
1E-5
0.2 0.5
0.0001
PFM = '0'
VIN = 3.3 V
Figure 3. Load Regulation
0.01
0.05
0.2 0.5
D004
PFM = '1'
Figure 4. Load Regulation
2.25E-6
5.2
TA = -40°C
TA = +25°C
TA = +85°C
2E-6
5
1.75E-6
1.5E-6
4.8
ISD (A)
VOUT (V)
0.001
IOUT (A)
D003
4.6
1.25E-6
1E-6
7.5E-7
4.4
TA = -40°C
TA = +25°C
TA = +85°C
4.2
0.0001
5E-7
0.001
VIN = 2.7 V
0.01 0.02 0.05 0.1 0.2
IOUT (A)
2.5E-7
2.7
0.5
3.1
4.7
5.1
5.5
D005
Figure 6. Shutdown Current
0.0100
0.0070
0.0050
1.50E-6
1.25E-6
TA = -40°C
TA = +25°C
TA = +85°C
0.0030
0.0020
IQ (A)
1.00E-6
IOUT (A)
3.9
4.3
VIN (V)
EN = '0'
PFM = '0'
Figure 5. Load Regulation
7.50E-7
0.0010
0.0007
0.0005
0.0003
0.0002
5.00E-7
TA = -40°C
TA = +25°C
TA = +85°C
2.50E-7
0.00E+0
2.7
3.1
EN = '0'
3.5
3.9
4.3
VIN (V)
4.7
5.1
5.5
0.0001
0.0001
0.0001
2.7
3
3.3
D017
ILOAD = 0 mA
OUTDIS = '0'
Figure 7. Output Leakage Current
6
3.5
D016
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3.6
3.9
4.2 4.5
VIN (V)
4.8
5.1
5.4
5.7
D006
PFM = '1'
Figure 8. PFM Quiescent Current
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Typical Characteristics (continued)
0.015
0.014
0.013
0.012
0.011
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0.000
2.7
2.08E+6
TA = -40°C
TA = +25°C
TA = +85°C
TA = -40°C
TA = +25°C
TA = +85°C
2.06E+6
2.04E+6
fSW (A)
IQ (A)
TA = 25°C, VIN = 3.6 V, CIN = COUT = 10 µF (10-V 0402 case), C1 = 1 µF (10-V 0402 case), VEN = VIN.
2.02E+6
2E+6
1.98E+6
1.96E+6
3.1
3.5
3.9
4.3
VIN (V)
ILOAD = 0 mA
4.7
5.1
5.5
1.94E+6
2.7
3.1
3.5
3.9
4.3
VIN (V)
D007
4.7
5.1
5.5
D008
PFM = '0'
Figure 10. Switching Frequency
Figure 9. PWM Quiescent Current
90%
80%
TA = -40°C
TA = +25°C
TA = 85°C
85%
80%
60%
Efficiency (%)
Efficiency (%)
75%
70%
65%
60%
40%
55%
20%
50%
TA = -40°C
TA = 25°C
TA = 85°C
45%
40%
2.7
3.1
3.5
3.9
4.3
VIN (V)
ILOAD = 100 mA
4.7
5.1
5.5
0
2E-5
0.0001
PFM = '0'
0.001
0.01
0.05
0.2
0.5
IOUT (V)
D013
VIN = 3.3 V
Figure 11. Efficiency vs Input Voltage
D014
PFM = '0'
Figure 12. Efficiency vs Load Current
80%
Efficiency (%)
60%
VOUT (100 mV/DIV)
+5 V Offset
40%
ILOAD (100 mA/DIV)
20%
TA = -40°C
TA = 25°C
TA = 85°C
0
2E-5
Time (200 Ps / DIV)
0.0001
0.001
0.01
0.05
0.2
IOUT (V)
VIN = 3.3 V
0.5
D015
PFM = '1'
VIN = 3.6 V
Figure 13. Efficiency vs Load Current
ILOAD = 1 mA to 100 mA
PFM = '1'
Figure 14. PFM Load Step
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Typical Characteristics (continued)
TA = 25°C, VIN = 3.6 V, CIN = COUT = 10 µF (10-V 0402 case), C1 = 1 µF (10-V 0402 case), VEN = VIN.
VOUT (2 V/DIV)
VOUT (100 mV/DIV)
+5 V Offset
EN
ILOAD (100 mA/DIV)
Time (200 Ps / DIV)
VIN = 3.6 V
Time (10 ms / DIV)
ILOAD = 1 mA to 100 mA
PFM = '0'
VIN = 3.6 V
Figure 15. PWM Load Step
OUTDIS = '0'
Figure 16. Output Discharge Disabled
VIN (2 V/DIV)
EN
EN
VOUT (2 V/DIV)
VOUT (2 V/DIV)
IIN (1 A/DIV)
IOUT (100 mA/DIV)
Time (20 ms / DIV)
VIN = 3.6 V
Time (200 Ps / DIV)
OUTDIS = '1'
VIN = 3.6 V
Figure 17. Output Discharge Enabled
8
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ILOAD = 100 mA
Figure 18. Start-Up into a Load
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7 Detailed Description
7.1 Overview
The LM2775 is a regulated switched capacitor doubler that, by combining the principles of switched-capacitor
voltage boost and linear regulation, generates a regulated output from an extended Li-Ion input voltage range. A
two-phase non-overlapping clock generated internally controls the operation of the doubler. During the charge
phase (φ1), the flying capacitor (C1) is connected between the input and ground through internal pass transistor
switches and is charged to the input voltage. In the pump phase that follows (φ2), the flying capacitor is
connected between the input and output through similar switches. Stacked atop the input, the charge of the flying
capacitor boosts the output voltage and supplies the load current.
A traditional switched capacitor doubler operating in this manner uses switches with very low on-resistance to
generate an output voltage that is 2× the input voltage. Regulation is achieved by modulating the current of the
two switches connected to the VIN pin (one switch in each phase).
7.2 Functional Block Diagram
C1-
S1
C1+
S3
I1
I2
S2
I1
LM2775
S4
I2
VOUT
OCL =
Current Limit
VIN
OCL
OUTDIS
PFM
PFM EN
GND
EN
1.2-V
Ref.
2-MHz
Osc.
7.3 Feature Description
7.3.1 Pre-Regulation
The very low input current ripple of the LM2775, resulting from internal pre-regulation, adds minimal noise to the
input line. The core of the LM2775 is very similar to that of a basic switched capacitor doubler: it is composed of
four switches and a flying capacitor (external). Regulation is achieved by controlling the current through the two
switches connected to the VIN pin (one switch in each phase). The regulation is done before the voltage
doubling, giving rise to the term "pre-regulation". It is pre-regulation that eliminates most of the input current
ripple that is a typical and undesirable characteristic of a many switched capacitor converters.
7.3.2 Input Current Limit
The LM2775 contains current limit circuitry that protects the device in the event of excessive input current and/or
output shorts to ground. The input current is limited to 600 mA (typical) when the output is shorted directly to
ground. When the LM2775 is current limiting, power dissipation in the device is likely to be quite high. In this
event, thermal cycling should be expected.
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Feature Description (continued)
7.3.3 PFM Mode
To minimize quiescent current during light load operation, the LM2775 provides a PFM operation option
(selectable via the PFM pin. '1' = PFM allowed, '0' = Fixed frequency). By allowing the charge pump to only
switch when the VOUT voltage decays to a typical 5.05 V, the quiescent current drawn from the power source is
minimized. The frequency of pulsed operation is not limited and can drop into the sub-1-kHz range when
unloaded. As the load increases, the frequency of pulsing increases.
When PFM mode is disabled, the device operates in a constant frequency mode. In this mode, the quiescent
current remains at normal levels even when the load current is decreased. The main advantages of fixed
frequency operation include a lower output voltage ripple level due to the constant switching and a predictable
switching frequency that stays at 2 MHz which can be important in noise sensitive applications.
7.3.4 Output Discharge
The LM2775 provides two different output discharge modes upon entering a shutdown state (EN pin = '0') after
running in the on state (EN = '1'). The first mode is high impendance mode (OUTDIS = '0'). In this mode, the
output remains high even when the EN pin is driven low. This enables use in applications where the LM2775
output might be tied to a system rail that has another power source connected (USBOTG). When OUTDIS = 0,
the output of the LM2775 draws a minimal current from the output supply (1.6 µA typical).
In Discharge Mode (OUTDIS pin = '1'), the LM2775 actively pulls down on the output of the device until the
output voltage reaches GND. In this mode, the current drawn from the output is approximately 450 µA.
7.3.5 Thermal Shutdown
The LM2775 implements a thermal shutdown mechanism to protect the device from damage due to overheating.
When the junction temperature rises to 150°C (typical), the part switches into shutdown mode. The LM2775
releases thermal shutdown when the junction temperature of the part is reduced to 130°C (typical).
Thermal shutdown is most often triggered by self-heating, which occurs when there is excessive power
dissipation in the device and/or insufficient thermal dissipation. LM2775 power dissipation increases with
increased output current and input voltage. When self-heating brings on thermal shutdown, thermal cycling is the
typical result. Thermal cycling is the repeating process where the part self-heats, enters thermal shutdown
(where internal power dissipation is practically zero), cools, turns on, and then heats up again to the thermal
shutdown threshold. Thermal cycling is recognized by a pulsing output voltage and can be stopped be reducing
the internal power dissipation (reduce input voltage and/or output current) or the ambient temperature. If thermal
cycling occurs under desired operating conditions, thermal dissipation performance must be improved to
accommodate the power dissipation of the LM2775. The WSON package is designed to have excellent thermal
properties that, when soldered to a PCB designed to aid thermal dissipation, allows the LM2775 to operate under
very demanding power dissipation conditions.
7.3.6 Undervoltage Lockout
The LM2775 has an internal comparator that monitors the voltage at VIN and forces the LM2775 into shutdown if
the input voltage drops to 2.4 V. If the input voltage rises above 2.6 V, the LM2775 resumes normal operation
10
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7.4 Device Functional Modes
7.4.1 Shutdown
The LM2775 enters Shutdown Mode if one of the two conditions are met.
• If VIN is removed or allowed to sag to ground, the device enters shutdown.
• If the EN pin is driven low when VIN is within the normal operating range.
In Shutdown, the LM2775 typically draws less than 1 µA from the supply. Depending on the state of the OUTDIS
pin, the output is pulled low when entering shutdown (OUTDIS = '1'), or it remains near the final output voltage
with the output in a low leakage state (OUTDIS = '0').
7.4.2 Boost Mode
The LM2775 is in Boost Mode if VIN is within the normal operating range, and the EN pin is driven high.
Depending on the state of the PFM pin, the LM2775 either regulates the output via a PFM burst mode (PFM =
'1') or via a constant switching mode (PFM = '0').
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM2775 can create a 5-V system rail capable of delivering up to 200 mA of output current to the load. The 2MHz switched capacitor boost allows for the use of small value discrete external components.
8.2 Typical Application
LM2775
VIN
Battery
5V @ 200mA
VOUT
10 PF
PFM
System
10 PF
C1+
1 PF
OUTDIS
C1GND
Controller
EN
Figure 19. Typical LM2775 Configuration
8.2.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
2.7 V to 5.5 V
Output current range
0 mA to 200 mA (Max. current will depend on VIN)
8.2.2 Detailed Design Procedure
8.2.2.1 Output Current Capability
The LM2775 provides 200 mA of output current when the input voltage is within 3.1 V to 5.5 V.
NOTE
Understanding relevant application issues is recommended and a thorough analysis of the
application circuit should be performed when using the part outside operating ratings
and/or specifications to ensure satisfactory circuit performance in the application. Special
care should be paid to power dissipation and thermal effects. These parameters can have
a dramatic impact on high-current applications, especially when the input voltage is high.
(see the Power Dissipation section).
The schematic of Figure 20 is a simplified model of the LM2775 that is useful for evaluating output current
capability. The model shows a linear pre-regulation block (Reg), a voltage doubler (2×), and an output resistance
(ROUT). Output resistance models the output voltage droop that is inherent to switched capacitor converters. The
output resistance of the LM2775 is 3.5 Ω (typical) and is approximately equal to twice the resistance of the four
LM2775 switches. When the output voltage is in regulation, the regulator in the model controls the voltage V' to
keep the output voltage equal to 5 V ± 4%. With increased output current, the voltage drop across ROUT
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increases. To prevent droop in output voltage, the voltage drop across the regulator is reduced, V' increases, and
VOUT remains at 5 V. When the output current increases to the point that there is zero voltage drop across the
regulator, V' equals the input voltage, and the output voltage is near the edge of regulation. Additional output
current causes the output voltage to fall out of regulation, and the LM2775 operation is similar to a basic openloop doubler. As in a voltage doubler, increase in output current results in output voltage drop proportional to the
output resistance of the doubler. The out-of-regulation LM2775 output voltage can be approximated by:
VOUT= 2 × VIN – IOUT × ROUT
(1)
Again, Equation 1 only applies at low input voltage and high output current where the LM2775 is not regulating.
See Output Current vs. Output Voltage curves in the Typical Characteristics section for more details.
LM2775
VIN
Reg
V'
2×
2×V
'
VOUT
ROUT
Output Resistance Model
Figure 20. LM2775 Output Resistance Model
A more complete calculation of output resistance takes into account the effects of switching frequency, flying
capacitance, and capacitor equivalent series resistance (ESR) (see Equation 2).
R OUT
2 R SW
1
FSW u C 1
4 ESR C1 ESR COUT
(2)
Switch resistance component (3 Ω typical) dominates the output resistance equation of the LM2775. With a 2MHz typical switching frequency, the 1/(F×C) component of the output resistance contributes only 0.5 Ω to the
total output resistance. Increasing the flying capacitance only provides minimal improvement to the total output
current capability of the LM2775. In some applications it may be desirable to reduce the value of the flying
capacitor below 1 µF to reduce solution size and/or cost, but this should be done with care so that output
resistance does not increase to the point that undesired output voltage droop results. If ceramic capacitors are
used, ESR will be a negligible factor in the total output resistance, as the ESR of quality ceramic capacitors is
typically much less than 100 mΩ.
8.2.2.2 Efficiency
Charge-pump efficiency is derived in Equation 3 and Equation 4 (supply current and other losses are neglected
for simplicity):
IIN = G × IOUT E = (VOUT × IOUT) ÷ (VIN × IIN) = VOUT ÷ (G × VIN)
(3)
If one includes the quiescent current drawn by the LM2775 to operate, the following can be derived :
POUT
VOUT u IOUT
E
PIN
VIN u (2 IOUT IQ )
(4)
In Equation 3, G represents the charge pump gain. Efficiency is at its highest as G × VIN approaches VOUT. For
the LM2775 device, G = 2.
8.2.2.3 Power Dissipation
LM2775 power dissipation (PD) is calculated simply by subtracting output power from input power:
PD = PIN – POUT = [VIN × (2 × IOUT + IQ)] – [VOUT × IOUT]
(5)
Power dissipation increases with increased input voltage and output current, up to 1.35 W at the ends of the
operating ratings (VIN = 5.5 V, IOUT = 200 mA). Internal power dissipation self-heats the device. Dissipating this
amount power/heat so the LM2775 does not overheat is a demanding thermal requirement for a small surfacemount package. When soldered to a PCB with layout conducive to power dissipation, the excellent thermal
properties of the WSON package enable this power to be dissipated from the LM2775 with little or no derating,
even when the circuit is placed in elevated ambient temperatures.
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LM2775
VIN
IIN = (2 × IOUT) + IQ
SwitchedCapacitor
Doubler
V ' # 2 × VIN
I ' = IOUT
Ideal
Linear
Regulato
r (IQ = 0)
VOUT = 5 V
IOUT
IQ
Power Model
Figure 21. Power Model
8.2.2.4 Recommended Capacitor Types
The LM2775 requires 3 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors
are recommended. These capacitors are small, inexpensive, and have very low ESR (≤ 15 mΩ typical). Tantalum
capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not recommended for use
with the LM2775 due to their high ESR compared to ceramic capacitors.
For most applications, ceramic capacitors with an X7R or X5R temperature characteristic are preferred for use
with the LM2775. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over
temperature (X7R: ±15% over –55°C to 125°C; X5R: ±15% over –55°C to 85°C).
Capacitors with a Y5V or Z5U temperature characteristic are generally not recommended for use with the
LM2775. These types of capacitors typically have wide capacitance tolerance (80% to 20%) and vary
significantly over temperature (Y5V: 22%, –82% over –30°C to 85°C range; Z5U: 22%, –56% over 10°C to 85°C
range). Under some conditions, a 1-µF-rated Y5V or Z5U capacitor could have a capacitance as low as 0.1 µF.
Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance
requirements of the LM2775.
Net capacitance of a ceramic capacitor decreases with increased DC bias. This degradation can result in lower
capacitance than expected on the input and/or output, resulting in higher ripple voltages and currents. Using
capacitors at DC-bias voltages significantly below the capacitor voltage rating usually minimizes DC-bias effects.
Consult capacitor manufacturers for information on capacitor DC-bias characteristics.
Capacitance characteristics can vary quite dramatically with different application conditions, capacitor types, and
capacitor manufacturers. It is strongly recommended that the LM2775 circuit be thoroughly evaluated early in the
design-in process with the mass-production capacitors of choice. This helps ensure that any such variability in
capacitance does not negatively impact circuit performance.
The voltage rating of the output capacitor should be 10 V or more. All other capacitors should have a voltage
rating at or above the maximum input voltage of the application.
8.2.2.5 Output Capacitor and Output Voltage Ripple
The output capacitor in the LM2775 circuit (COUT) directly impacts the magnitude of output voltage ripple. Other
prominent factors also affecting output voltage ripple include input voltage, output current, and flying capacitance.
One important generalization can be made: increasing (decreasing) the output capacitance results in a
proportional decrease (increase) in output voltage ripple. A simple approximation of output ripple is determined
by calculating the amount of voltage droop that occurs when the output of the LM2775 is not being driven. This
occurs during the charge phase (φ1). During this time, the load is driven solely by the charge on the output
capacitor. The magnitude of the ripple thus follows the basic discharge equation for a capacitor (I = C × dV/dt),
where discharge time is one-half the switching period, or 0.5/FSW (see Equation 6).
I
0 .5
RIPPLE Peak - Peak = OUT u
C OUT FSW
14
(6)
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A more thorough and accurate examination of factors that affect ripple requires including effects of phase nonoverlap times and output capacitor ESR. In order for the LM2775 to operate properly, the two phases of
operation must never coincide. (If this were to happen all switches would be closed simultaneously, shorting
input, output, and ground). Thus, non-overlap time is built into the clocks that control the phases. Since the
output is not being driven during the non-overlap time, this time should be accounted for in calculating ripple.
Actual output capacitor discharge time is approximately 60% of a switching period, or 0.6/FSW (see Equation 7).
RIPPLE Peak Peak
§ IOUT
0 .6
¨
u
¨C
© OUT FSW
·
¸ 2 u IOUT u ESR COUT
¸
¹
(7)
NOTE
In typical high-current applications, a 10-µF, 10-V low-ESR ceramic output capacitor is
recommended. Different output capacitance values can be used to reduce ripple, shrink
the solution size, and/or cut the cost of the solution. But changing the output capacitor
may also require changing the flying capacitor and/or input capacitor to maintain good
overall circuit performance. If a small output capacitor is used and PFM mode is enabled,
the output ripple can become large during the transition between PFM mode and constant
switching. To prevent toggling, a 2-µF capacitance is recommended. For example, a 10µF, 10-V output capacitor in a 0402 case size will typically only have 2-µF capacitance
when biased to 5 V.
High ESR in the output capacitor increases output voltage ripple. If a ceramic capacitor is used at the output, this
is usually not a concern because the ESR of a ceramic capacitor is typically very low and has only a minimal
impact on ripple magnitudes. If a different capacitor type with higher ESR is used (tantalum, for example), the
ESR could result in high ripple. To eliminate this effect, the net output ESR can be significantly reduced by
placing a low-ESR ceramic capacitor in parallel with the primary output capacitor. The low ESR of the ceramic
capacitor is in parallel with the higher ESR, resulting in a low net ESR based on the principles of parallel
resistance reduction.
8.2.2.6 Input Capacitor and Input Voltage Ripple
The input capacitor (CIN) is a reservoir of charge that aids a quick transfer of charge from the supply to the flying
capacitor during the charge phase of operation. The input capacitor helps to keep the input voltage from
drooping at the start of the charge phase when the flying capacitor is connected to the input. It also filters noise
on the input pin, keeping this noise out of sensitive internal analog circuitry that is biased off the input line.
Much like the relationship between the output capacitance and output voltage ripple, input capacitance has a
dominant and first-order effect on input ripple magnitude. Increasing (decreasing) the input capacitance results in
a proportional decrease (increase) in input voltage ripple. Input voltage, output current, and flying capacitance
also affect input ripple levels to some degree.
In typical high-current applications, a 10-µF low-ESR ceramic capacitor is recommended on the input. Different
input capacitance values can be used to reduce ripple, shrink the solution size, and/or cut the cost of the
solution. But changing the input capacitor may also require changing the flying capacitor and/or output capacitor
to maintain good overall circuit performance.
8.2.2.7 Flying Capacitor
The flying capacitor (C1) transfers charge from the input to the output. Flying capacitance can impact both output
current capability and ripple magnitudes. If flying capacitance is too small, the LM2775 may not be able to
regulate the output voltage when load currents are high. On the other hand, if the flying capacitance is too large,
the flying capacitor might overwhelm the input and output capacitors, resulting in increased input and output
ripple.
In typical high-current applications, 1-µF low-ESR ceramic capacitors are recommended for the flying capacitor.
Polarized capacitors (tantalum, aluminum electrolytic, etc.) must not be used for the flying capacitor, as they
could become reverse-biased during LM2775 operation.
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8.2.3 Application Curve
5.04
5.02
VOUT (V)
5.00
4.98
4.96
4.94
TA = -40°C
TA = +25°C
TA = +85°C
4.92
4.90
1E-5
0.0001
0.001
IOUT (A)
VIN = 3.3 V
0.01
0.05
0.2 0.5
D003
PFM = '0'
Figure 22. Load Regulation
8.2.4 USB OTG / Mobile HDMI Power Supply
VBAT (System Voltage)
PFM
EN
LM2775 (Host
Mode VBUS
Power)
OUTDIS
USB Connector
VOUT / VBUS (5 V)
VBUS
Dual Role
Application
Processor
ID
D+
D-
USB OTG
Transceiver
GND
Figure 23. USB OTG Configuration
8.2.4.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
2.7 V to 5.5 V
Output current range
0 mA to 200 mA (Max. current will depend on VIN)
8.2.4.2 Detailed Design Procedure
The 5-V output mode is normally used for the USB OTG / Mobile HDMI application. Therefore, the LM2775 can
be enabled/disabled by applying a logic signal on only the EN pin while grounding the OUTDIS pin. Depending
on the USB/HDMI mode of the application, the LM2775 can be enabled to drive the power bus line (Host), or
disabled to put its output in high impedance allowing an external supply to drive the bus line (Slave). In addition
to the high impedance-backdrive protection, the output current limit protection is 250 mA (typical), well within the
USB OTG and HDMI requirements.
16
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8.2.4.3 Application Curve
1.50E-6
1.25E-6
IOUT (A)
1.00E-6
7.50E-7
5.00E-7
2.50E-7
0.00E+0
2.7
TA = -40°C
TA = +25°C
TA = +85°C
3.1
EN = '0'
3.5
3.9
4.3
VIN (V)
4.7
5.1
5.5
D017
OUTDIS = '0'
Figure 24. Output Leakage Current High Z
9 Power Supply Recommendations
The LM2775 is designed to operate from an input voltage supply range between 2.7 V and 5.5 V. This input
supply must be well regulated and capable to supply the required input current. If the input supply is located far
from the LM2775 additional bulk capacitance may be required in addition to the ceramic bypass capacitors.
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10 Layout
10.1 Layout Guidelines
Proper board layout helps to ensure optimal performance of the LM2775 circuit. The following guidelines are
recommended:
• Place capacitors as close to the LM2775 as possible, and preferably on the same side of the board as the
device.
• Use short, wide traces to connect the external capacitors to the LM2775 to minimize trace resistance and
inductance.
• Use a low resistance connection between ground and the GND pin of the LM2775. Using wide traces and/or
multiple vias to connect GND to a ground plane on the board is most advantageous.
10.2 Layout Example
CONNECT TO GND PLANE
LM2775
C1C1+
THERMAL PAD
PFM
GND
VIN
VOUT
EN
OUTDIS
CONNECT TO GND PLANE
Figure 25. Example LM2775 Layout
18
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11 Device and Documentation Support
11.1 Trademarks
All trademarks are the property of their respective owners.
11.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM2775DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
2775
LM2775DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
2775
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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