LM2940S-10

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 LM2940x 1-A Low Dropout Regulator 1 Features 3 Description • • • • • • • • The LM2940-N and LM2940C positive voltage regulators feature the ability to source 1 A of output current with a dropout voltage of typically 0.5 V and a maximum of 1 V over the entire temperature range. Furthermore, a quiescent current reduction circuit has been included which reduces the ground current when the differential between the input voltage and the output voltage exceeds approximately 3 V. The quiescent current with 1 A of output current and an input-output differential of 5 V is therefore only 30 mA. Higher quiescent currents only exist when the regulator is in the dropout mode (VIN − VOUT ≤ 3 V). 1 Input Voltage Range = 6 V to 26 V Dropout Voltage Typically 0.5 V at IOUT = 1 A Output Current in Excess of 1 A Output Voltage Trimmed Before Assembly Reverse Battery Protection Internal Short Circuit Current Limit Mirror Image Insertion Protection P+ Product Enhancement Tested 2 Applications • • • Post Regulator for Switching Supplies Logic Power Supplies Industrial Instrumentation space space space Designed also for vehicular applications, the LM2940N and LM2940C and all regulated circuitry are protected from reverse battery installations or 2battery jumps. During line transients, such as load dump when the input voltage can momentarily exceed the specified maximum operating voltage, the regulator will automatically shut down to protect both the internal circuits and the load. The LM2940-N and LM2940C cannot be harmed by temporary mirrorimage insertion. Familiar regulator features such as short circuit and thermal overload protection are also provided. Device Information(1) PART NUMBER LM2940-N LM2940C PACKAGE BODY SIZE (NOM) SOT-223 (4) 6.50 mm x 3.50 mm WSON (8) 4.00 mm x 4.00 mm TO-263 (3) 10.18 mm x 8.41 mm TO-220 (3) 14.986 mm x 10.16 mm TO-263 (3) 10.18 mm x 8.41 mm TO-220 (3) 14.986 mm x 10.16 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic VIN Unregulated Input C1* 0.47 µF IN LM2940 OUT VOUT Regulated Output + COUT** 22 µF IQ *Required if regulator is located far from power supply filter. **COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating temperature range as the regulator and the ESR is critical; see curve. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 4 4 4 5 5 6 7 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics (5 V and 8 V) .................... Electrical Characteristics (9 V and 10 V) .................. Electrical Characteristics (12 V and 15 V) ................ Typical Characteristics .............................................. Detailed Description ............................................ 13 7.1 Overview ................................................................. 13 7.2 Functional Block Diagram ....................................... 13 7.3 Feature Description................................................. 13 7.4 Device Functional Modes........................................ 14 8 Application and Implementation ........................ 15 8.1 Application Information............................................ 15 8.2 Typical Application .................................................. 15 9 Power Supply Recommendations...................... 17 10 Layout................................................................... 17 10.1 Layout Guidelines ................................................. 17 10.2 Layout Examples................................................... 17 10.3 Heatsinking ........................................................... 18 11 Device and Documentation Support ................. 20 11.1 11.2 11.3 11.4 11.5 Documentation Support ........................................ Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 20 20 20 20 20 12 Mechanical, Packaging, and Orderable Information ........................................................... 20 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (April 2013) to Revision J Page • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 • Deleted information re: obsolete CDIP and CLGA package options ; Change pin names from Vin, Vout to IN, OUT; delete Heatsinking sections re: packages apart from TO-220 ............................................................................................... 1 • Changed symbols for Thermal Information ......................................................................................................................... 19 Changes from Revision H (April 2013) to Revision I 2 Submit Documentation Feedback Page Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 5 Pin Configuration and Functions DDPAK/TO-263 (KTT) Package 3 Pins Top View DDPAK/TO-263 ( KTT) Package Side View WSON (NGN) Package 8 Pins Top View TO-220 (NDE) Package 4 Pins Front View N/C 1 GND 2 8 N/C 7 GND GND SOT-223 (DCY) Package 3 Pins Front View IN 3 6 OUT N/C 4 5 OUT Pin 2 and pin 7 are fused to center DAP Pin 5 and 6 need to be tied together on PCB board Pin Functions PIN NAME I/O DESCRIPTION NDE KTT DCY NGN IN 1 1 1 3 I GND 2 2 2 2 — Ground OUT 3 3 3 5, 6 O Regulated output voltage. This pin requires an output capacitor to maintain stability. See Detailed Design Procedure for output capacitor details. Unregulated input voltage. GND 4 4 4 7 — Ground N/C — — — 1, 4, 8 — No connection Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 3 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) MIN MAX LM2940-N KTT, NDE, DCY ≤ 100 ms 60 LM2940C KTT, NDE ≤ 1 ms 45 Internal power dissipation (3) Internally Limited Maximum junction temperature Soldering temperature (4) 260 DDPAK/TO-263 (KTT) (30 s) 235 SOT-223 (DCY) (30 s) 260 WSON-8 (NGN) (30 s) (2) (3) (4) V 150 TO-220 (NDE), Wave (10 s) °C 235 −65 Storage temperature, Tstg (1) UNIT 150 Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are conditions under which the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical Characteristics (5 V and 8 V). If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal resistance, RθJA, and the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. The value of R θJA (for devices in still air with no heatsink) is 23.3°C/W for the TO-220 package, 40.9°C/W for the DDPAK/TO-263 package, and 59.3°C/W for the SOT-223 package. The effective value of RθJA can be reduced by using a heatsink (see Heatsinking for specific information on heatsinking). The value of RθJA for the WSON package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the WSON package, refer to Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401). It is recommended that 6 vias be placed under the center pad to improve thermal performance. Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperature and time are for Sn-Pb (STD) only. 6.2 ESD Ratings V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) VALUE UNIT ±2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN Input voltage LM2940-N NDE, LM2940-N KTT Temperature 4 LM2940C NDE, LM2940C KTT MAX UNIT V 6 26 −40 125 0 125 LM2940-N DCY −40 85 LM2940-N NGN −40 125 Submit Documentation Feedback °C Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 6.4 Thermal Information LM2940-N, LM2940C THERMAL METRIC (1) LM2940-N TO-220 (NDE) DDPAK/TO-263 (KTT) SOT-223 (DCY) WSON (NGN) 3 PINS 3 PINS 4 PINS 8 PINS (2) 23.3 40.9 59.3 40.5 RθJC(top) Junction-to-case (top) thermal resistance 16.1 43.5 38.9 26.2 RθJB Junction-to-board thermal resistance 4.8 23.5 8.1 17.0 ψJT Junction-to-top characterization parameter 2.7 10.3 1.7 0.2 ψJB Junction-to-board characterization parameter 4.8 22.5 8.0 17.2 RθJC(bot) Junction-to-case (bottom) thermal resistance 1.1 0.8 n/a 3.2 RθJA (1) (2) Junction-to-ambient thermal resistance UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Thermal information for the TO-220 package is for a package vertically mounted with a heat sink in the middle of a PCB which is compliant to the JEDEC HIGH-K 2s2p (JESD51-7). The heatsink-to-ambient thermal resistance, RƟSA, is 21.7°C/W. See Heatsinking TO-220 Package Parts for more information. 6.5 Electrical Characteristics (5 V and 8 V) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Input voltage Output voltage Line regulation Load regulation Output impedance 5V TEST CONDITIONS MIN 8V TYP MAX MIN TYP MAX 5 mA ≤ IOUT ≤ 1 A 6.25 26 9.4 5 mA ≤ IOUT ≤ 1A 4.75 5 5.25 7.6 8 8.4 5 mA ≤ IOUT ≤ 1A, TJ = 25°C 4.85 7.76 8 8.24 26 5 5.15 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA TJ = 25°C 20 50 20 80 50 mA ≤ IOUT ≤ 1 A LM2940-N 35 80 55 130 50 mA ≤ IOUT ≤ 1 A TJ = 25°C LM2940-N 35 50 55 80 LM2940C 35 50 55 80 100 mADC, 20 mArms, ƒOUT = 120 Hz 35 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA LM2940-N 10 20 10 20 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA Quiescent current TJ = 25°C LM2940-N 10 15 10 15 LM2940C 10 15 VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60 VIN = VOUT + 5 V, IOUT = 1 A TJ = 25°C 30 45 30 45 Output noise voltage Ripple rejection 10 Hz to 100 kHz, IOUT = 5 mA Dropout voltage mV mΩ 240 LM2940-N 54 72 48 66 ƒOUT = 120 Hz, 1 Vrms, IOUT = 100 mA TJ = 25°C LM2940-N 60 72 54 66 LM2940C 60 72 54 66 20 µVrms dB mV/1000 Hr 32 IOUT = 1A 0.5 1 0.5 1 IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8 IOUT = 100 mA 110 200 110 200 IOUT = 100 mA, TJ = 25°C 110 150 110 150 Product Folder Links: LM2940-N LM2940C mV mA 150 Copyright © 2000–2014, Texas Instruments Incorporated V 55 ƒOUT = 120 Hz, 1 Vrms, IOUT = 100 mA Long-term stability UNIT Submit Documentation Feedback V mV 5 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com Electrical Characteristics (5 V and 8 V) (continued) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Short-circuit current Maximum line transient Reverse polarity DC input voltage Reverse polarity Transient Input Voltage (1) 5V TEST CONDITIONS See (1), TJ = 25°C 8V MIN TYP 1.6 MAX MIN TYP 1.9 1.6 1.9 ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75 60 75 ROUT = 100Ω, T ≤ 1 ms TJ = 25°C LM2940C 45 55 45 555 ROUT = 100 Ω LM2940-N –15 –30 –15 –30 ROUT = 100 Ω TJ = 25°C LM2940C –15 –30 –15 –30 ROUT = 100 Ω, T ≤ 100 ms LM2940-N –50 –75 ROUT = 100 Ω, T ≤ 1 ms LM2940C –45 –55 –50 MAX UNIT A V V –75 V Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature. 6.6 Electrical Characteristics (9 V and 10 V) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Input voltage Output voltage Line regulation 9V TEST CONDITIONS MIN 10 V TYP MAX MIN TYP MAX 5 mA ≤ IOUT ≤ 1 A 10.5 26 11.5 5 mA ≤ IOUT ≤ 1A 8.55 9 9.45 9.5 10 10.5 5 mA ≤ IOUT ≤ 1A, TJ = 25°C 8.73 9 9.27 9.7 10 10.3 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA TJ = 25°C 20 90 20 100 26 50 mA ≤ IOUT ≤ 1 A LM2940-N 60 150 65 165 Load regulation 50 mA ≤ IOUT ≤ 1 A TJ = 25°C LM2940-N 60 90 65 100 LM2940C 60 90 Output impedance 100 mADC, 20 mArms, ƒOUT = 120 Hz 60 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA LM2940-N 10 20 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA Quiescent current TJ = 25°C LM2940-N 10 15 LM2940C 10 15 VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60 VIN = VOUT + 5 V, IOUT = 1 A TJ = 25°C 30 45 30 45 Output noise voltage 10 Hz to 100 kHz, IOUT = 5 mA ƒOUT = 120 Hz, 1 Vrms IOUT = 100 mA Ripple rejection ƒOUT = 120 Hz, 1 Vrms IOUT = 100 mA TJ = 25°C Long-term stability Dropout voltage 6 65 10 V mV mV mΩ 20 15 mA 270 300 µVrms LM2940-N 46 64 45 63 LM2940-N 52 64 51 63 dB LM2940C 52 64 36 mV/1000 Hr 34 IOUT = 1A 0.5 1 0.5 1 IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8 IOUT = 100 mA 110 200 110 200 IOUT = 100 mA, TJ = 25°C 110 150 110 150 Submit Documentation Feedback UNIT V mV Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 Electrical Characteristics (9 V and 10 V) (continued) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Short-circuit current Maximum line transient Reverse polarity DC input voltage Reverse polarity Transient Input Voltage (1) 9V TEST CONDITIONS See (1), TJ = 25°C MIN TYP 1.6 MIN TYP 1.9 1.6 1.9 60 75 ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75 ROUT = 100Ω, T ≤ 100 ms TJ = 25°C LM2940C 45 55 ROUT = 100 Ω LM2940-N –15 –30 –15 –30 LM2940-N –50 –75 LM2940C –45 –55 ROUT = 100 Ω TJ = 25°C LM2940C ROUT = 100 Ω, T ≤ 100 ms 10 V MAX MAX UNIT A V –15 –30 V –50 –75 V Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature. 6.7 Electrical Characteristics (12 V and 15 V) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Input voltage Output voltage Line regulation 12 V TEST CONDITIONS MIN 15 V TYP MAX MIN TYP MAX 5 mA ≤ IOUT ≤ 1 A 13.6 26 16.75 5 mA ≤ IOUT ≤ 1A 11.40 12 12.6 14.25 15 15.75 5 mA ≤ IOUT ≤ 1A, TJ = 25°C 11.64 12 12.36 14.55 15 15.45 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA TJ = 25°C 20 120 20 150 26 50 mA ≤ IOUT ≤ 1 A LM2940-N 55 200 Load regulation 50 mA ≤ IOUT ≤ 1 A TJ = 25°C LM2940-N 55 120 LM2940C 55 120 Output impedance 100 mADC, 20 mArms, ƒOUT = 120 Hz 80 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA LM2940-N 10 20 VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA Quiescent current TJ = 25°C LM2940-N 10 15 LM2940C 10 15 10 15 VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60 VIN = VOUT + 5 V, IOUT = 1 A TJ = 25°C 30 45 30 45 Output noise voltage Ripple rejection 10 Hz to 100 kHz, IOUT = 5 mA LM2940-N 48 66 ƒOUT = 120 Hz, 1 Vrms, IOUT = 100 mA TJ = 25°C LM2940-N 54 66 LM2940C 54 66 Long-term stability Dropout voltage 70 150 mΩ 450 mA µVrms dB 52 64 mV/1000 Hr 60 IOUT = 1A 0.5 1 0.5 1 IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8 IOUT = 100 mA 110 200 110 200 IOUT = 100 mA, TJ = 25°C 110 150 110 150 Product Folder Links: LM2940-N LM2940C mV 100 48 Copyright © 2000–2014, Texas Instruments Incorporated V mV 360 ƒOUT = 120 Hz, 1 Vrms, IOUT = 100 mA UNIT Submit Documentation Feedback V mV 7 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com Electrical Characteristics (12 V and 15 V) (continued) Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C. PARAMETER Short-circuit current See (1), TJ = 25°C Maximum line transient Reverse polarity DC input voltage Reverse polarity transient input voltage (1) 12 V TEST CONDITIONS 15 V MIN TYP 1.6 1.9 ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75 ROUT = 100Ω, T ≤ 100 ms TJ = 25°C LM2940C 45 55 ROUT = 100 Ω LM2940-N –15 –30 ROUT = 100 Ω TJ = 25°C LM2940C –15 –30 ROUT = 100 Ω, T ≤ 100 ms LM2940-N –50 –75 LM2940C –45 –55 ROUT = 100 Ω, T ≤ 1 ms MAX MIN TYP 1.6 1.9 45 55 –15 –30 –45 –55 MAX UNIT A V V V Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature. 6.8 Typical Characteristics 8 Figure 1. Dropout Voltage Figure 2. Dropout Voltage vs. Temperature Figure 3. Output Voltage vs. Temperature Figure 4. Quiescent Current vs. Temperature Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 Typical Characteristics (continued) Figure 5. Quiescent Current Figure 6. Quiescent Current Figure 7. Line Transient Response Figure 8. Load Transient Response Figure 9. Ripple Rejection Figure 10. Low Voltage Behavior Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 9 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com Typical Characteristics (continued) 10 Figure 11. Low Voltage Behavior Figure 12. Low Voltage Behavior Figure 13. Low Voltage Behavior Figure 14. Low Voltage Behavior Figure 15. Output at Voltage Extremes Figure 16. Output at Voltage Extremes Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 Typical Characteristics (continued) Figure 17. Output at Voltage Extremes Figure 18. Output at Voltage Extremes Figure 19. Output at Voltage Extremes Figure 20. Output Capacitor ESR Figure 21. Peak Output Current Figure 22. Output Impedance Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 11 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com Typical Characteristics (continued) Figure 23. Maximum Power Dissipation (TO-220) Figure 24. Maximum Power Dissipation (SOT-223) Figure 25. Maximum Power Dissipation (DDPAK/TO-263) 12 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 7 Detailed Description 7.1 Overview The LM2940 positive voltage regulator features the ability to source 1 A of output current with a dropout voltage of typically 0.5 V and a maximum of 1 V over the entire temperature range. Furthermore, a quiescent current reduction circuit has been included which reduces the ground current when the differential between the input voltage and the output voltage exceeds approximately 3 V. The quiescent current with 1 A of output current and an input-output differential of 5 V is therefore only 30 mA. Higher quiescent currents only exist when the regulator is in the dropout mode (VIN – VOUT ≤ 3 V). 7.2 Functional Block Diagram IN OUT PNP OVSD (§30 V) Current Limit Thermal Shutdown + Bandgap Reference GND 7.3 Feature Description 7.3.1 Short-Circuit Current Limit The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate in a steady-state current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. Note, also, that if a current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO, resulting a thermal shutdown of the output. 7.3.2 Overvoltage Shutdown (OVSD) Input voltage greater than typically 30 V will cause the LM2940 output to be disabled. When operating with the input voltage greater than the maximum recommended input voltage of 26 V, the device performance is not ensured. Continuous operation with the input voltage greater than the maximum recommended input voltage is discouraged. 7.3.3 Thermal Shutdown (TSD) The LM2940 contains the thermal shutdown circuitry to turn off the output when excessive heat is dissipated in the LDO. The internal protection circuitry of the LM2940 is designed to protect against thermal overload conditions. The TSD circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown degrades its reliability as the junction temperature will be exceeding the absolute maximum junction temperature rating. Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 13 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com 7.4 Device Functional Modes 7.4.1 Operation with Enable Control The LM2940 design does not include any undervoltage lockout (UVLO), or enable functions. Generally, the output voltage will track the input voltage until the input voltage is greater than VOUT + 1V. When the input voltage is greater than VOUT + 1 V, the LM2940 will be in linear operation, and the output voltage will be regulated. However, the device will be sensitive to any small perturbation of the input voltage. Device dynamic performance is improved when the input voltage is at least 2 V greater than the output voltage. 14 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM2940-N and LM2940C positive voltage regulators feature the ability to source 1 A of output current with a dropout voltage of typically 0.5 V and a maximum of 1 V over the entire temperature range. The output capacitor, COUT, must have a capacitance value of at least 22 µF with an ESR of at least 100 mΩ, but no more than 1 Ω. The minimum capacitance value and the ESR requirements apply across the entire expected operating ambient temperature range. 8.2 Typical Application VIN Unregulated Input LM2940 IN VOUT Regulated Output OUT + COUT** C1* 0.47 µF 22 µF IQ *Required if regulator is located far from power supply filter. **COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating temperature range as the regulator and the ESR is critical; see curve. Figure 26. Typical Application 8.2.1 Design Requirements Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage range 6 V to 26 V Output voltage range 8V Output current range 5 mA to 1 A Input capacitor value 0.47 µF Output capacitor value 22 µF minimum Output capacitor ESR range 100 mΩ to 1 Ω 8.2.2 Detailed Design Procedure 8.2.2.1 External Capacitors The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both equivalent series resistance (ESR) and minimum amount of capacitance. 8.2.2.1.1 Minimum Capacitance The minimum output capacitance required to maintain stability is 22 μF (this value may be increased without limit). Larger values of output capacitance will give improved transient response. Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 15 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com 8.2.2.1.2 ESR Limits The ESR of the output capacitor will cause loop instability if it is too high or too low. The acceptable range of ESR plotted versus load current is shown in the graph below. It is essential that the output capacitor meet these requirements, or oscillations can result. Figure 27. Output Capacitor ESR Limits It is important to note that for most capacitors, ESR is specified only at room temperature. However, the designer must ensure that the ESR will stay inside the limits shown over the entire operating temperature range for the design. For aluminum electrolytic capacitors, ESR will increase by about 30X as the temperature is reduced from 25°C to −40°C. This type of capacitor is not well-suited for low temperature operation. Solid tantalum capacitors have a more stable ESR over temperature, but are more expensive than aluminum electrolytics. A cost-effective approach sometimes used is to parallel an aluminum electrolytic with a solid tantalum, with the total capacitance split about 75/25% with the aluminum being the larger value. If two capacitors are paralleled, the effective ESR is the parallel of the two individual values. The flatter ESR of the tantalum will keep the effective ESR from rising as quickly at low temperatures. 8.2.3 Application Curves Figure 28. Low Voltage Behavior 16 Submit Documentation Feedback Figure 29. Output at Voltage Extremes Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 9 Power Supply Recommendations The device is designed to operate from an input voltage supply range between VOUT + 1 V up to a maximum of 26 V. This input supply must be well regulated and free of spurious noise. To ensure that the LM2940 output voltage is well regulated, the input supply should be at least VOUT + 2 V. 10 Layout 10.1 Layout Guidelines The dynamic performance of the LM2940 is dependent on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the LM2940. Best performance is achieved by placing CIN and COUT on the same side of the PCB as the LM2940, and as close as is practical to the package. The ground connections for CIN and COUT should be back to the LM2940 ground pin using as wide and short of a copper trace as is practical. 10.2 Layout Examples Ground 5 1 6 2 CIN COUT GND VIN 3 7 4 8 VOUT Figure 30. LM2940 WSON Layout 4 3 2 COUT 1 CIN VIN VOUT Ground Figure 31. LM2940 SOT-223 Layout 4 CIN VIN COUT 1 2 3 VOUT Ground Figure 32. TO-263 Layout Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 17 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com 10.3 Heatsinking A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible operating conditions, the junction temperature must be within the range specified under Absolute Maximum Ratings (1) (2). To determine if a heatsink is required, the power dissipated by the regulator, PD, must be calculated. Figure 33 shows the voltages and currents which are present in the circuit, as well as the formula for calculating the power dissipated in the regulator: IIN = IL + IG PD = (VIN − VOUT) IL + (VIN) IG Figure 33. Power Dissipation Diagram The next parameter which must be calculated is the maximum allowable temperature rise, TR(MAX). This is calculated by using the formula: TR(MAX) = TJ(MAX) − TA(MAX) where • • TJ(MAX) is the maximum allowable junction temperature, which is 125°C for commercial grade parts. TA(MAX)is the maximum ambient temperature which will be encountered in the application. (1) Using the calculated values for TR(MAX) and PD, the maximum allowable value for the junction-to-ambient thermal resistance, RθJA, can now be found: RθJA = TR(MAX) / PD (2) NOTE If the maximum allowable value for RθJA is found to be ≥ 23.3°C/W for the TO-220 package (with a heatsink of 21.7°C/W RθSA), ≥ 40.9°C/W for the DDPAK/TO-263 package, or ≥ 59.3°C/W for the SOT-223 package, no heatsink is needed since the package alone will dissipate enough heat to satisfy these requirements. If the calculated value for RθJA falls below these limits, a heatsink is required. (1) (2) 18 Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are conditions under which the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical Characteristics (5 V and 8 V). If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C LM2940-N, LM2940C www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 Heatsinking (continued) 10.3.1 Heatsinking TO-220 Package Parts The TO-220 can be attached to a typical heatsink, or secured to a copper plane on a PC board. If a manufactured heatsink is to be selected, the value of heatsink-to-ambient thermal resistance, RθSA, must first be calculated: RθSA = RθJA − RθCS − RθJC where • • RθJC is defined as the thermal resistance from the junction to the surface of the case. A value of 3°C/W can be assumed for RθJC for this calculation. RθCS is defined as the thermal resistance between the case and the surface of the heatsink. The value of RθCS will vary from about 0.5°C/W to about 2.5°C/W (depending on method of attachment, insulator, etc.). If the exact value is unknown, 2°C/W should be assumed for RθCS. (3) When a value for RθSA is found using Equation 3, a heatsink must be selected that has a value that is less than or equal to this number. RθSA is specified numerically by the heatsink manufacturer in the catalog, or shown in a curve that plots temperature rise vs power dissipation for the heatsink. Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C Submit Documentation Feedback 19 LM2940-N, LM2940C SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: • Application Note AN-1028 Maximum Power Enhancement Techniques for Power Packages (SNVA036). • Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401). 11.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LM2940-N Click here Click here Click here Click here Click here LM2940C Click here Click here Click here Click here Click here 11.3 Trademarks All trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 20 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: LM2940-N LM2940C PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2940CS-12 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR 0 to 125 LM2940CS -12 P+ LM2940CS-12/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -12 P+ LM2940CS-15 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR 0 to 125 LM2940CS -15 P+ LM2940CS-15/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -15 P+ LM2940CS-5.0 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR 0 to 125 LM2940CS -5.0 P+ LM2940CS-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -5.0 P+ LM2940CS-9.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -9.0 P+ LM2940CSX-12 NRND DDPAK/ TO-263 KTT 3 500 Non-RoHS & Green Call TI Level-3-235C-168 HR 0 to 125 LM2940CS -12 P+ LM2940CSX-12/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -12 P+ LM2940CSX-15/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -15 P+ LM2940CSX-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -5.0 P+ LM2940CSX-9.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR 0 to 125 LM2940CS -9.0 P+ LM2940CT-12 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM 0 to 125 LM2940CT -12 P+ LM2940CT-12/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM 0 to 125 LM2940CT -12 P+ LM2940CT-15 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM 0 to 125 LM2940CT -15 P+ LM2940CT-15/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM 0 to 125 LM2940CT -15 P+ Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2940CT-5.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM LM2940CT-5.0/LF01 ACTIVE TO-220 NDG 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR LM2940CT-5.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM 0 to 125 LM2940CT -5.0 P+ LM2940CT-9.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM 0 to 125 LM2940CT -9.0 P+ LM2940IMP-10/NOPB ACTIVE SOT-223 DCY 4 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L55B LM2940IMP-12/NOPB ACTIVE SOT-223 DCY 4 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L56B LM2940IMP-15 NRND SOT-223 DCY 4 1000 Non-RoHS & Green Call TI Level-1-260C-UNLIM -40 to 85 L70B LM2940IMP-15/NOPB ACTIVE SOT-223 DCY 4 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L70B LM2940IMP-5.0 NRND SOT-223 DCY 4 1000 Non-RoHS & Green Call TI Level-1-260C-UNLIM -40 to 85 L53B LM2940IMP-5.0/NOPB ACTIVE SOT-223 DCY 4 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L53B LM2940IMP-9.0/NOPB ACTIVE SOT-223 DCY 4 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L0EB LM2940IMPX-10/NOPB ACTIVE SOT-223 DCY 4 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L55B LM2940IMPX-12/NOPB ACTIVE SOT-223 DCY 4 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L56B LM2940IMPX-5.0/NOPB ACTIVE SOT-223 DCY 4 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L53B LM2940IMPX-8.0/NOPB ACTIVE SOT-223 DCY 4 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L54B LM2940LD-12 NRND WSON NGN 8 1000 Non-RoHS & Green Call TI Level-1-235C-UNLIM -40 to 125 L00018B LM2940LD-12/NOPB ACTIVE WSON NGN 8 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 L00018B LM2940LD-5.0/NOPB ACTIVE WSON NGN 8 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 L00014B LM2940S-10 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -10 P+ Addendum-Page 2 0 to 125 LM2940CT -5.0 P+ LM2940CT -5.0 P+ Samples PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2940S-10/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -10 P+ LM2940S-12 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -12 P+ LM2940S-12/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -12 P+ LM2940S-5.0 NRND DDPAK/ TO-263 KTT 3 45 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -5.0 P+ LM2940S-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -5.0 P+ LM2940S-8.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -8.0 P+ LM2940S-9.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -9.0 P+ LM2940SX-10 NRND DDPAK/ TO-263 KTT 3 500 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -10 P+ LM2940SX-10/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -10 P+ LM2940SX-12 NRND DDPAK/ TO-263 KTT 3 500 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -12 P+ LM2940SX-12/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -12 P+ LM2940SX-5.0 NRND DDPAK/ TO-263 KTT 3 500 Non-RoHS & Green Call TI Level-3-235C-168 HR -40 to 125 LM2940S -5.0 P+ LM2940SX-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -5.0 P+ LM2940SX-8.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -8.0 P+ LM2940SX-9.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 RoHS-Exempt & Green SN Level-3-245C-168 HR -40 to 125 LM2940S -9.0 P+ LM2940T-10.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM -40 to 125 LM2940T 10.0 P+ LM2940T-10.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2940T 10.0 P+ Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM2940T-12.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM -40 to 125 LM2940T 12.0 P+ LM2940T-12.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2940T 12.0 P+ LM2940T-5.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM -40 to 125 LM2940T -5.0 P+ LM2940T-5.0/LF08 ACTIVE TO-220 NEB 3 45 RoHS & Green SN Level-3-245C-168 HR LM2940T-5.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2940T -5.0 P+ LM2940T-8.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM -40 to 125 LM2940T -8.0 P+ LM2940T-8.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2940T -8.0 P+ LM2940T-9.0 NRND TO-220 NDE 3 45 Non-RoHS & Green Call TI Level-1-NA-UNLIM -40 to 125 LM2940T -9.0 P+ LM2940T-9.0/NOPB ACTIVE TO-220 NDE 3 45 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2940T -9.0 P+ LM2940T -5.0 P+ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of