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Table of Contents
User’s Guide
LM3477 Buck Controller Evaluation Module User's Guide
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Performance............................................................................................................................................................................3
3 Hysteretic Mode...................................................................................................................................................................... 4
4 Increasing Current Limit........................................................................................................................................................ 5
5 Layout Fundamentals.............................................................................................................................................................6
6 Revision History......................................................................................................................................................................7
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1
Introduction
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1 Introduction
The LM3477 is a current mode, high-side N channel FET controller. It is most commonly used in buck
configurations, as shown in Figure 1-1. All the power conducting components of the circuit are external to
the LM3477, so a large variety of inputs, outputs, and loads can be accommodated by the LM3477.
The LM3477 evaluation board comes ready to operate at the following conditions:
•
•
•
4.5 V ≤ VIN ≤ 15 V
VOUT = 3.3 V
0 A ≤ IOUT ≤ 1.6 A
The circuit and BOM for this application are given in Figure 1-1 and Table 1-1.
Figure 1-1. LM3477 Buck Converter
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Performance
Table 1-1. Bill of Materials (BOM)
Component
Value
Part Number
CIN1
120 µF/20 V
594D127X0020R2
CIN2
No connect
COUT1
22 µF/10 V
LMK432BJ226MM (Taiyo Yuden)
COUT2
22 µF/10 V
LMK432BJ226MM (Taiyo Yuden)
L
10 µH, 3.8 A
DO3316P-103 (Coilcraft)
RC
1.8 kΩ
CRCW08051821FRT1 (Vitramon)
CC1
12 nF/50 V
VJ0805Y123KXAAT (Vitramon)
CC2
No connect
Q1
5 A, 30 V
IRLMS2002 (IRF)
D
100 V, 3 A
MBRS340T3 (Motorola)
RDR
20 Ω
CRCW080520R0FRT1 (Vitramon)
RSL
1 kΩ
CRCW08051001FRT1 (Vitramon)
RFB1
16.2 kΩ
CRCW08051622FRT1 (Vitramon)
RFB2
10.0 kΩ
CRCW08051002FRT1 (Vitramon)
CFF
470 pF
VJ0805Y471KXAAT (Vitramony)
RSN
0.03 Ω
WSL 2512 0.03 Ω ±1% (Dale)
2 Performance
Figure 2-1 to Figure 2-2 show some benchmark data taken from the circuit above on the LM3477 evaluation
board. This evaluation board can also be used to evaluate a buck regulator circuit optimized for a different
operating point or to evaluate a trade-off between cost and some performance parameter. For example, the
conversion efficiency can be increased by using a lower RDS(ON) MOSFET, ripple voltage can be lowered with
lower ESR output capacitors, and the hysteretic threshold can be changed as a function of the RSN and RSL
resistors.
The conversion efficiency can be increased by using a lower RDS(ON) MOSFET, however, it drops as input
voltage increases. The efficiency reduces because of increased diode conduction time and increased switching
losses. Switching losses are due to the Vds × Id transition losses and to the gate charge losses, both of which
can be lowered by using a FET with low gate capacitance. At low duty cycles, where most of the power loss
in the FET is from the switching losses, trading off higher RDS(ON) for lower gate capacitance will increase
efficiency.
Figure 2-1. Efficiency vs Load VOUT = 3.3 V
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3
Hysteretic Mode
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Figure 2-2. Efficiency vs VIN VOUT = 3.3 V, IOUT = 2 A
Figure 3-1 shows a bode plot of LM3477 open loop frequency response using the external components listed in
Table 1-1.
Magnitude = 20 dB/Decade, Bandwidth = 39.8 kHz, Phase = 45°/Decade, Phase Margin = 41°
Figure 2-3. Open Loop Frequency Response VIN = 5 V, VOUT = 3.3 V, IOUT = 1.5 A
3 Hysteretic Mode
As the load current is decreased, the LM3477 will eventually enter a 'hysteretic' mode of operation. When
the load current drops below the hysteretic mode threshold, the output voltage rises slightly. The overvoltage
protection (OVP) comparator senses this rise and causes the power MOSFET to shut off. As the load pulls
current out of the output capacitor, the output voltage drops until it hits the low threshold of the OVP comparator
and the part begins switching again. This behavior results in a lower frequency, higher peak-to-peak output
voltage ripple than with the normal pulse width modulation scheme. The magnitude of the output voltage ripple
is determined by the OVP threshold levels, which are referred to the feedback voltage and are typically 1.25 V
to 1.31 V. For more information, see the Electrical Characteristics table in the LM3477 High Efficiency High-Side
N-Channel Controller for Switching Regulator Data Sheet. In the case of a 3.3-V output, this translates to a
regulated output voltage between 3.27 V and 3.43 V. The hysteretic mode threshold point is a function of RSN
and RSL. Figure 3-1 shows the hysteretic threshold versus VIN for the LM3477 evaluation board with and without
RSL.
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Increasing Current Limit
Figure 3-1. ITH vs VIN
4 Increasing Current Limit
The RSL resistor offers flexibility in choosing the ramp of the slope compensation. Slope compensation affects
the minimum inductance for stability (see the Slope Compensation section in the LM3477 High Efficiency HighSide N-Channel Controller for Switching Regulator Data Sheet), but also helps determine the current limit and
hysteretic threshold. As an example, RSL can be disconnected and replaced by a 0-Ω resistor so that no extra
slope compensation is added to the current sense waveform to increase the current limit. A more conventional
way to adjust the current limit is to change RSN. RSL is used here to change current limit for the sake of simplicity
and to demonstrate the dependence of current limit to RSL. By changing RSL to 0 Ω, the following conditions can
be met:
4.5 V ≤ VIN ≤ 15 V
VOUT = 3.3 V
0 A ≤ IOUT ≤ 3 A
The current limit is a weak function of slope compensation and a strong function of the sense resistor. By
decreasing RSL, slope compensation is decreased, and as a result the current limit increases. The hysteretic
mode threshold will also increase to about 1 A (see Figure 3-1).
Figure 4-1 shows a bode plot of LM3477 open loop frequency response using the modified (RSL = 0 Ω)
components to achieve higher output current capability.
Magnitude = 20 dB/Decade, Bandwidth = 55.3 kHz, Phase = 45°/Decade, Phase Margin = 42°
Figure 4-1. Open Loop Frequency Response VIN = 5 V, VOUT = 3.3 V, IOUT = 3 A
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Layout Fundamentals
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5 Layout Fundamentals
Good layout for DC-DC converters can be implemented by following a few simple design guidelines:
1. Place the power components (catch diode, inductor, and filter capacitors) close together. Make the traces
between them short.
2. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
3. Connect the ground pins of the input and output filter capacitors and catch diode as close as possible using
generous component-side copper fill as a pseudo-ground plane. Then, connect this to the ground-plane with
several vias.
4. Arrange the power components so that the switching current loops curl in the same direction.
5. Route high-frequency power and ground return as direct continuous parallel paths.
6. Separate noise sensitive traces, such as the voltage feedback path, from noisy traces associated with the
power components.
7. Ensure a good low-impedance ground for the converter IC.
8. Place the supporting components for the converter IC, such as compensation, frequency selection and
charge-pump components, as close to the converter IC as possible but away from noisy traces and the
power components. Make their connections to the converter IC and its pseudo-ground plane as short as
possible.
9. Place noise sensitive circuitry, such as radio-modem IF blocks, away from the DC-DC converter, CMOS
digital blocks, and other noisy circuitry.
Figure 5-1. LM3477 Evaluation Board PCB Layout (Top Side)
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Revision History
Figure 5-2. LM3477 Evaluation Board PCB Layout (Bottom Side)
6 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (April 2013) to Revision F (February 2022)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................2
• Updated the updated user's guide title............................................................................................................... 2
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