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LM5010
SNVS307G – SEPTEMBER 2004 – REVISED APRIL 2016
LM5010 High-Voltage 1-A Step-Down Switching Regulator
1 Features
3 Description
•
•
•
•
•
•
•
•
The LM5010 step-down switching regulator features
all the functions needed to implement a low-cost,
efficient, buck bias regulator capable of supplying in
excess of 1-A load current. This high-voltage
regulator contains an N-Channel Buck Switch, and is
available in thermally enhanced 10-pin WSON and
14-pin HTSSOP packages. The hysteretic regulation
scheme requires no loop compensation, resulting in
fast load transient response, and simplifies circuit
implementation. The operating frequency remains
constant with line and load variations due to the
inverse relationship between the input voltage and
the ON-time. The valley current limit detection is set
at 1.25 A. Additional features include: VCC
undervoltage lockout, thermal shutdown, gate drive
undervoltage lockout, and maximum duty cycle
limiter.
1
•
•
•
•
•
Input Voltage Range: 8 V to 75 V
Valley Current Limit At 1.25 A
Switching Frequency Can Exceed 1 MHz
Integrated N-Channel Buck Switch
Integrated Start-Up Regulator
No Loop Compensation Required
Ultra-Fast Transient Response
Operating Frequency Remains Constant With
Load and Line Variations
Maximum Duty Cycle Limited During Start-Up
Adjustable Output Voltage
Precision 2.5-V Feedback Reference
Thermal Shutdown
Exposed Thermal Pad for Improved Heat
Dissipation
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
High Efficiency Point-of-Load (POL) Regulator
Non-Isolated Telecommunications Buck Regulator
Secondary High Voltage Post Regulator
Automotive Systems
LM5010
PACKAGE
BODY SIZE (NOM)
WSON (10)
4.00 mm × 4.00 mm
HTSSOP (14)
4.40 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Basic Step-Down Regulator
8V - 75V
Input
VCC
VIN
C3
C1
LM5010
RON
BST
C4
L1
RON / SD
SHUTDOWN
VOUT
SW
D1
SS
R1
ISEN
C2
C6
FB
RTN
SGND
R2
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM5010
SNVS307G – SEPTEMBER 2004 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 14
8
Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Application .................................................. 15
8.3 Do's and Don'ts ....................................................... 21
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 22
10.1 Layout Guidelines ................................................. 22
10.2 Layout Example .................................................... 22
11 Device and Documentation Support ................. 23
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (February 2013) to Revision G
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Revision E (February 2013) to Revision F
•
2
Page
Page
Changed layout of National Data Sheet to TI format ............................................................................................................. 1
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SNVS307G – SEPTEMBER 2004 – REVISED APRIL 2016
5 Pin Configuration and Functions
DPR Package
10-Pin WSON
Top View
PWP Package
14-Pin HTSSOP
Top View
SW
1
10
VIN
NC
1
14
NC
BST
2
9
VCC
SW
2
13
VIN
I
SEN
3
8
R
BST
3
12
VCC
4
7
SS
I
SEN
4
11
R
5
6
FB
5
10
SS
RTN
6
9
FB
NC
7
8
NC
S
GND
RTN
ExposedPad
ON
/SD
S
GND
ExposedPad
/SD
ON
Pin Functions
PIN
I/O
DESCRIPTION
3
I
Boost pin for bootstrap capacitor: Connect a 0.022-µF capacitor from SW to this pin. The
capacitor is charged from VCC through an internal diode during each OFF-time.
—
—
—
FB
6
9
I
Feedback input from the regulated output: Internally connected to the regulation and
overvoltage comparators. The regulation level is 2.5 V.
ISEN
3
4
I
Current sense: The recirculating current flows through the internal sense resistor, and out
of this pin to the free-wheeling diode. Current limit is nominally set at 1.25 A.
NC
—
1, 7, 8, 14
—
RON/SD
8
11
I
RTN
5
6
—
Circuit ground: Ground for all internal circuitry other than the current limit detection.
SGND
4
5
—
Sense ground: Recirculating current flows into this pin to the current sense resistor.
SS
7
10
I
Soft start: An internal 11.5-µA current source charges an external capacitor to 2.5 V,
providing the soft start function.
SW
1
2
O
Switching node: Internally connected to the buck switch source. Connect to the inductor,
free-wheeling diode, and bootstrap capacitor.
VCC
9
12
I
Output from the startup regulator: Nominally regulates at 7 V. An external voltage (7.5 V
to 14 V) can be applied to this pin to reduce internal dissipation. An internal diode
connects VCC to VIN.
VIN
10
13
I
Input supply: Nominal input range is 8 V to 75 V.
NAME
WSON
HTSSOP
BST
2
EP
Exposed pad
No connection
ON-time control and shutdown: An external resistor from VIN to this pin sets the buck
switch ON-time. Grounding this pin shuts down the regulator.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
8
75
V
VIN to GND
76
V
BST to GND
90
V
–1.5
V
BST to VCC
76
V
BST to SW
14
V
VCC to GND
14
V
VIN
SW to GND (steady state)
SGND to RTN
–0.3
0.3
V
SS to RTN
–0.3
4
V
76
V
7
V
VIN to SW
All other inputs to GND
Lead temperature (soldering, 4 s)
–0.3
(2)
260
°C
Junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–55
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
For detailed information on soldering plastic HTSSOP and WSON packages, see Mechanical, Packaging, and Orderable Information.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
UNIT
V
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VIN
Input voltage
IO
Output current
Ext-VCC
External bias voltage
TJ
Operating junction temperature
4
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MIN
MAX
8
75
UNIT
V
1
A
8
13
V
–40
125
°C
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6.4 Thermal Information
LM5010
THERMAL METRIC (1)
DPR (WSON)
PWP (HTSSOP)
10 PINS
14 PINS
UNIT
36
41.1
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
31.9
26.5
°C/W
RθJB
Junction-to-board thermal resistance
13.2
22.5
°C/W
ψJT
Junction-to-top characterization parameter
0.3
0.7
°C/W
ψJB
Junction-to-board characterization parameter
13.5
22.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
3
3.3
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 48 V, and
RON = 200 kΩ (unless otherwise noted). (1) (2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
6.6
7
7.4
UNIT
VCC REGULATOR
VCCReg
VCC regulated output
VIN - VCC
VCC output impedance (0 mA ≤ ICC ≤ 5 mA)
VCC current limit
ICC = 0 mA, FS < 200 kHz,
7.5 V ≤ VIN ≤ 8 V
1.3
VIN = 8 V
140
VIN = 48 V
2.5
V
V
Ω
VCC = 0 V
10
VCC increasing
5.8
V
UVLOVCC hysteresis
VCC decreasing
145
mV
UVLOVCC filter delay
100-mV overdrive
IIN operating current
Non-switching, FB = 3 V
IIN shutdown current
RON/SD = 0 V
UVLOVCC VCC undervoltage lockout threshold
mA
3
µs
650
850
µA
95
200
µA
SOFT-START PIN
Pullup voltage
Internal current source
2.5
V
11.5
µA
CURRENT LIMIT
ILIM
Threshold
Current out of ISEN
1
1.25
1.5
A
Resistance from ISEN to SGND
130
mΩ
Response time
150
ns
RON/SD PIN
Shutdown threshold
Voltage at RON/SD rising
Threshold hysteresis
Voltage at RON/SD falling
0.35
0.65
1.1
40
V
mV
HIGH-SIDE FET
RDS(ON)
Buck switch
ITEST = 200 mA
UVLOGD
Gate drive UVLO
VBST - VSW Increasing
3
UVLOGD Hysteresis
0.35
0.8
Ω
4.3
5
V
440
mV
REGULATION AND OVERVOLTAGE COMPARATORS (FB PIN)
VREF
FB regulation threshold
SS pin = steady state
FB overvoltage threshold
FB bias current
(1)
(2)
2.45
2.5
2.55
V
2.9
V
1
nA
All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and
applying statistical process control.
The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) as follows:
TJ = TA + (PD × RθJA) where RθJA (in °C/W) is the package thermal impedance provided in Thermal Information.
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Electrical Characteristics (continued)
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 48 V, and
RON = 200 kΩ (unless otherwise noted).(1)(2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
THERMAL SHUTDOWN
TSD
Thermal shutdown temperature
Thermal shutdown hysteresis
175
°C
20
°C
6.6 Switching Characteristics
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C and VIN = 48 V
(unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
RDS(ON)
Buck switch
ITEST = 200 mA
UVLOGD
Gate drive UVLO
VBST - VSW Increasing
MIN
3
UVLOGD Hysteresis
TYP
MAX
0.35
0.8
4.3
5
UNIT
Ω
V
440
mV
265
ns
OFF TIMER
tOFF
Minimum OFF-time
ON TIMER
tON - 1
ON-time
VIN = 10 V, RON = 200 kΩ
2.1
2.75
3.4
µs
tON - 2
ON-time
VIN = 75 V, RON = 200 kΩ
290
390
490
ns
(1)
6
All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations while
applying statistical process control.
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6.7 Typical Characteristics
at TA = 25°C (unless otherwise noted)
7.5
8
VIN = 48V
7
7.0
6
FS = 100 kHz
FS = 620 kHz
VIN = 8V
5
VCC (V)
VCC (V)
6.5
6.0
VIN = 9V
4
3
FS = 200 kHz
2
5.5
VCC Externally Loaded
Load Current = 300 mA
ICC = 0 mA
1
FS = 100 kHz
0
5.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
0
10
2
4
Figure 1. VCC vs VIN
10
Figure 2. VCC vs ICC
9
8.0
8
7.0
FS = 550 kHz
RON = 500k
7
6.0
6
ON-TIME (Ps)
ICC INPUT CURRENT(mA)
8
ICC (mA)
VIN (V)
5.0
4.0
FS = 200 kHz
3.0
300k
5
4
3
2.0
100k
2
FS = 100 kHz
1.0
1
0
0
8
7
9
10
11
12
13
14
0
8
20
EXTERNALLY APPLIED VCC (V)
40
60
80
VIN (V)
Figure 3. ICC vs Externally Applied VCC
Figure 4. ON-Time vs VIN and RON
4.0
800
FB = 3V
700
RON = 50k
600
3.0
115k
500
IIN (PA)
RON/SD PIN VOLTAGE (V)
6
301k
2.0
400
300
511k
200
1.0
RON/SD = 0V
100
0
0
0
8
20
40
60
80
0
8
20
40
60
80
VIN (V)
VIN (V)
Figure 5. Voltage at RON/SD Pin
Figure 6. IIN vs VIN
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Typical Characteristics (continued)
at TA = 25°C (unless otherwise noted)
VIN
7.0V
UVLO
VCC
SW Pin
Inductor
Current
2.5V
SS Pin
VOUT
t1
t2
Figure 7. Start-Up Sequence
8
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7 Detailed Description
7.1 Overview
The LM5010 step-down switching regulator features all the functions needed to implement a low-cost, efficient,
buck bias power converter. This high-voltage regulator contains a 75-V N-channel buck switch, is easy to
implement, and is provided in HTSSOP and thermally-enhanced, WSON packages. The regulator is based on a
control scheme using an ON-time inversely proportional to VIN. The control scheme requires no loop
compensation. The functional block diagram of the LM5010 is shown in the Functional Block Diagram.
The LM5010 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator
is well-suited for 48-V telecom and 42-V automotive power bus ranges. Additional features include: thermal
shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, maximum duty cycle limit timer, and the
valley current limit functionality.
7.2 Functional Block Diagram
INPUT
10
LM5010
7V START-UP
REGULATOR
VIN
C5
VCC
UVLO
VCC
9
Thermal
Shutdown
C3
C1
RON
ON TIMER
8 R ON /SD
7
RON
START
COMPLETE
2.5V
11.5 PA
SS
265 ns
OFF TIMER
0.7V
START
COMPLETE
Gate Drive
UVLO
VIN
C4
DRIVER
LOGIC
Driver
C6
6 FB
BST 2
LEVEL
SHIFT
L1
OVER-VOLTAGE
COMPARATOR
REGULATION
COMPARATOR
D1
CURRENT LIMIT
COMPARATOR
62.5 mV
5 RTN
VOUT1
SW 1
2.9V
ISEN
+
3
R SENSE
50 m:
SGND
R1
RCL
4
R2
R3
VOUT2
C2
GND
Copyright © 2016, Texas Instruments Incorporated
Pin numbers are for the WSON (10) package
7.3 Feature Description
The LM5010 step-down switching regulator features all the functions needed to implement a low-cost, efficient
buck bias power converter capable of supplying in excess of 1 A to the load. This high voltage regulator contains
an N-Channel buck switch, is easy to implement, and is available in the thermally enhanced 10-pin WSON and
14-pin HTSSOP packages. The regulator’s operation is based on a constant ON-time control scheme, where the
ON-time varies inversely with VIN. This feature results in the operating frequency remaining relatively constant
with load and input voltage variations. The switching frequency can range from 100 kHz to > 1 MHz. The
hysteretic control requires no loop compensation, resulting in very fast load transient response. The valley
current limit detection circuit, internally set at 1.25 A, holds the buck switch off until the high current level
subsides. The LM5010 can be applied in numerous applications to efficiently regulate down higher voltages. This
regulator is well suited for 48-V telecom applications, as well as the new 42-V automotive power bus.
Implemented as a point-of-load regulator following a highly-efficient intermediate bus converter can result in high
overall system efficiency. Features include: Thermal shutdown, VCC undervoltage lockout, gate drive
undervoltage lockout, and maximum duty cycle limit.
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Feature Description (continued)
7.3.1 Control Circuit Overview
The LM5010 buck DC-DC regulator employs a control scheme based on a comparator and a one-shot ON timer,
with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB voltage is below the
reference the buck switch is turned on for a time period determined by the input voltage and a programming
resistor (RON). Following the ON-time the switch remains off for 265 ns, or until the FB voltage falls below the
reference, whichever is longer. The buck switch then turns on for another ON-time period. Typically when the
load current increases suddenly, the OFF-times are temporarily at the minimum of 265 ns. Once regulation is
established, the OFF-time resumes its normal value. The output voltage is set by two external resistors (R1, R2).
The regulated output voltage is calculated with Equation 1.
VOUT = 2.5 V × (R1 + R2) / R2
(1)
Output voltage regulation is based on ripple voltage at the feedback input, requiring a minimum amount of ESR
for the output capacitor C2. The LM5010 requires a minimum of 25-mV of ripple voltage at the FB pin. In cases
where the capacitor’s ESR is insufficient, additional series resistance may be required (R3 in Functional Block
Diagram).
When in regulation, the LM5010 operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode current always flows
through the inductor, never reaching zero during the OFF-time. In this mode the operating frequency remains
relatively constant with load and line variations. The minimum load current for continuous conduction mode is
one-half the inductor’s ripple current amplitude. Calculate the approximate operating frequency with Equation 2.
VOUT
FS =
1.18 x 10-10 x RON
(2)
The buck switch duty cycle is approximately equal to Equation 3.
VOUT
tON
DC =
tON + tOFF
=
VIN
(3)
At low load current, the circuit operates in discontinuous conduction mode, during which the inductor current
ramps up from zero to a peak during the ON-time, then ramps back to zero before the end of the OFF-time. The
next ON-time period starts when the voltage at FB falls below the reference until then the inductor current
remains zero, and the load current is supplied by the output capacitor (C2). In this mode the operating frequency
is lower than in continuous conduction mode, and varies with load current. Conversion efficiency is maintained at
light loads because the switching losses reduce with the reduction in load and frequency. Calculate the
approximate discontinuous operating frequency with Equation 4.
VOUT2 x L1 x 1.4 x 1020
FS =
RL x (RON)2
where
•
RL = the load resistance
(4)
For applications where lower output voltage ripple is required, the output can be taken directly from a low ESR
output capacitor as shown in Figure 8. However, R3 slightly degrades the load regulation.
10
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Feature Description (continued)
L1
SW
LM5010
R1
R3
FB
V OUT2
C2
R2
Figure 8. Low Ripple Output Configuration
7.3.2 Start-Up Regulator (VCC)
The start-up regulator is integral to the LM5010. The input pin (VIN) can be connected directly to line voltages up
to 75 V. The VCC output is regulated at 7 V, ±6%, and is current-limited to 10 mA. Upon power up the regulator
sources current into the external capacitor at VCC (C3). With a 0.1-µF capacitor at VCC, approximately 58 µs are
required for the VCC voltage to reach the undervoltage lockout threshold (UVLO) of 5.8 V (t1 in Figure 7), at
which time the buck switch is enabled, and the soft-start pin is released to allow the soft-start capacitor (C6) to
charge up. VOUT then increases to its regulated value as the soft-start voltage increases (t2 in Figure 7).
The minimum input operating voltage is determined by the regulator’s dropout voltage, the VCC UVLO falling
threshold (≊5.65 V), and the frequency. When VCC falls below the falling threshold the VCC UVLO activates to
shut off the buck switch and ground the soft-start pin. If VCC is externally loaded, the minimum input voltage
increases since the output impedance at VCC is ≊140 Ω at low VIN. See Figure 1 and Figure 2. In applications
involving a high value for VIN where power dissipation in the start-up regulator is a concern, an auxiliary voltage
can be diode connected to the VCC pin (Figure 9). Setting the auxiliary voltage to between 7.5 V and 14 V shuts
off the internal regulator, reducing internal power dissipation. Figure 3 shows the current required into the VCC
pin. A diode connects VCC to VIN internally.
VCC
C3
BST
C4
LM5010
L1
D2
SW
VOUT1
D1
I SEN
R1
R3
V OUT2
S GND
R2
C2
FB
Figure 9. Self Biased Configuration
7.3.3 Regulation Comparator
The feedback voltage at FB is compared to the voltage at the soft-start pin (2.5 V, ±2%). In normal operation (the
output voltage is regulated) an ON-time period is initiated when the voltage at FB falls below 2.5 V. The buck
switch stays on for the ON-time causing the FB voltage to rise above 2.5 V. After the ON-time period the buck
switch stays off until the FB voltage falls below 2.5 V. Bias current at the FB pin is less than 5 nA over
temperature.
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Feature Description (continued)
7.3.4 Overvoltage Comparator
The feedback voltage at FB is compared to an internal 2.9-V reference. If the voltage at FB rises above 2.9 V,
the ON-time is immediately terminated. This condition can occur if the input voltage or the output load changes
suddenly. The buck switch will not turn on again until the voltage at FB falls below 2.5 V.
7.3.5 ON-Time Control
The ON-time of the internal switch (see Figure 4) is determined by the RON resistor and the input voltage (VIN),
calculated with Equation 5.
1.18 x 10-10 x (RON + 1.4k)
tON =
VIN - 1.4V
+ 67 ns
(5)
The inverse relationship of tON vs VIN results in a nearly constant frequency as VIN is varied. If the application
requires a high frequency, the minimum value for tON, and consequently RON, is limited by the OFF-time (265 ns,
±15%) which limits the maximum duty cycle at minimum VIN. The tolerance for Equation 5 is ±25%. Frequencies
in excess of 1 MHz are possible with the LM5010.
7.3.6 Current Limit
Current limit detection occurs during the OFF-time by monitoring the recirculating current through the freewheeling diode (D1). The detection threshold is 1.25 A, ±0.25 A. Referring to Functional Block Diagram, when
the buck switch is off the inductor current flows through the load, into SGND, through the sense resistor, out of
ISEN and through D1. If that current exceeds the threshold the current limit comparator output switches to delay
the start of the next ON-time period. The next ON-time starts when the current out of ISEN is below the threshold
and the voltage at FB is below 2.5 V. If the overload condition persists causing the inductor current to exceed the
threshold during each ON-time, that is detected at the beginning of each OFF-time. The operating frequency is
lower due to longer-than-normal OFF-times.
Figure 10 illustrates the inductor current waveform. During normal operation the load current is IO, the average of
the ripple waveform. When the load resistance decreases the current ratchets up until the lower peak attempts to
exceed the threshold. During the Current Limited portion of Figure 10, the current ramps down to the threshold
during each OFF-time, initiating the next ON-time (assuming the voltage at FB is < 2.5 V). During each ON-time
the current ramps up an amount equal to Equation 6.
'I =
(VIN - VOUT) x tON
L1
(6)
During this time the LM5010 is in a constant current mode, with an average load current (IOCL) equal to the
threshold + ΔI / 2.
The valley current limit technique allows the load current to exceed the current limit threshold as long as the
lower peak of the inductor current is less than the threshold.
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Feature Description (continued)
IPK
'I
IOCL
Inductor Current
Threshold
IO
Normal Operation
Load Current
Increases
Current Limited
Figure 10. Inductor Current, Current Limit Operation
The current limit threshold can be increased by connecting an external resistor (RCL) between SGND and ISEN. The
external resistor typically is less than 1 Ω, and its calculation is explained in Application and Implementation.
The peak current out of SW and ISEN must not exceed 3.5 A. The average current out of SW must be less than
3 A, and the average current out of ISEN must be less than 2 A.
7.3.7 Soft Start
The soft-start feature allows the converter to gradually reach a steady-state operating point, thereby reducing
start-up stresses and current surges. Upon turnon, after VCC reaches the undervoltage threshold (t1 in Figure 7),
an internal 11.5-µA current source charges the external capacitor at the soft-start pin to 2.5 V (t2 in Figure 7).
The ramping voltage at SS (and at the non-inverting input of the regulation comparator) ramps up the output
voltage in a controlled manner. This feature keeps the load current from going to current limit during start-up,
thereby reducing inrush currents.
An internal switch grounds the soft-start pin if VCC is below the undervoltage lockout threshold, if a thermal
shutdown occurs, or if the circuit is shutdown using the RON/SD pin.
7.3.8 N-Channel Buck Switch and Driver
The LM5010 integrates an N-Channel buck switch and associated floating high voltage gate driver. The peak
current through the buck switch must not be allowed to exceed 3.5 A, and the average current must be less than
3 A. The gate driver circuit is powered by the external bootstrap capacitor between BST and SW (C4). During
each OFF-time, the SW pin is at approximately –1 V, and C4 is recharged from VCC through the internal high
voltage diode. The minimum OFF-time of 265 ns ensures a minimum time each cycle to recharge the bootstrap
capacitor. TI recommends a 0.022-µF ceramic capacitor for C4.
7.3.9 Thermal Shutdown
The LM5010 should be operated so the junction temperature does not exceed 125°C. If the junction temperature
increases above that, an internal Thermal Shutdown circuit activates (typically) at 175°C, taking the controller to
a low-power reset state by disabling the buck switch and the ON timer, and grounding the soft-start pin. This
feature helps prevent catastrophic failures from accidental device overheating. When the junction temperature
reduces below 155°C (typical hysteresis = 20°C), the softstart pin is released and normal operation resumes.
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7.4 Device Functional Modes
7.4.1 Shutdown
The LM5010 can be remotely shut down by taking the RON/SD pin below 0.65 V. See Figure 11. In this mode the
soft-start pin is internally grounded, the ON timer is disabled, and the input current at VIN is reduced (Figure 6).
Releasing the RON/SD pin allows normal operation to resume. When the switch is open, the nominal voltage at
RON/SD is shown in Figure 5.
VIN
Input
Voltage
RON
LM5010
R ON /SD
STOP
RUN
Figure 11. Shutdown Implementation
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM5010 is a non-synchronous buck regulator converter designed to operate over a wide input voltage and
output current range. Spreadsheet-based calculator tools, available on the TI product website at Quick-Start
Calculator, can be used to design a single output non-synchronous buck converter.
Alternatively, online WEBENCH® software is available to create a complete buck design and generate the bill of
materials, estimated efficiency, solution size, and cost of the complete solution.
8.2 Typical Application
The final circuit is shown in Figure 12, and its performance is shown from Figure 14 to Figure 17.
VCC
VIN
15 - 75V
Input
C1
2.2 PF
C3
0.1 PF
C5
0.1 PF
BST
137k
RON
LM5010
RON / SD
C4
0.022 PF
L1
100 PH
10V
SW
SHUTDOWN
VOUT
D1
SS
ISEN
C6
0.022 PF
SGND
FB
R1
3.0k
R3
2.8
R2
1.0k
C2
15 PF
GND
RTN
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Figure 12. LM5010 Example Circuit
8.2.1 Design Requirements
Table 1 lists the operating parameters for Figure 12.
Table 1. Design Parameters
PARAMETER
EXAMPLE VALUE
Input voltage
15 V to 75 V
Output voltage
10 V
Load current
150 mA to 1 A
Soft-start time
5 ms
8.2.2 Detailed Design Procedure
The procedure for calculating the external components is illustrated with a design example. Configure the circuit
in Figure 12 according to the components listed in Table 2.
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Table 2. List of Components for LM5010 Example Circuit
COMPONENT
DESCRIPTION
VALUE
C1
Ceramic Capacitor
2.2 µF, 100 V
C2
Ceramic Capacitor
15 µF, 25 V
C3
Ceramic Capacitor
0.1 µF, 16 V
C4, C6
Ceramic Capacitor
0.022 µF, 16 V
C5
Ceramic Capacitor
0.1 µF, 100 V
D1
Ultra-fast diode
100 V, 2 A
L1
Inductor
100 µH
R1
Resistor
3 kΩ
R2
Resistor
1 kΩ
R3
Resistor
2.8 Ω
RON
Resistor
137 kΩ
U1
Switching regulator
—
8.2.2.1 Component Selection
8.2.2.1.1 R1 and R2
Calculate the ratio of these resistors with Equation 7.
R1 / R2 = (VOUT / 2.5 V) - 1
(7)
R1 and R2 calculates to 3. The resistors should be chosen from standard value resistors in the range of 1 kΩ to
10 kΩ. Values of 3 kΩ for R1, and 1 kΩ for R2 are used.
8.2.2.1.2 RON, FS
RON sets the ON-time, and can be chosen using Equation 2 to set a nominal frequency, or from Equation 5 if the
ON-time at a particular VIN is important. A higher frequency generally means a smaller inductor and capacitors
(value, size and cost), but higher switching losses. A lower frequency means a higher efficiency, but with larger
components. If PC board space is tight, a higher frequency is better. The resulting ON-time and frequency have
a ±25% tolerance, rearranging Equation 2 to Equation 8.
RON =
10V
1.18 x 10-10 x 625 kHz
= 136 k:
(8)
The next larger standard value (137 kΩ) is chosen for RON, yielding a nominal frequency of 618 kHz.
8.2.2.1.3 L1
The inductor value is determined based on the load current, ripple current, and the minimum and maximum input
voltage (VIN(min), VIN(max)). See Figure 13.
L1 Current
IPK+
IO
IOR
IPK-
0 mA
1/Fs
Figure 13. Inductor Current
To keep the circuit in continuous conduction mode, the maximum allowed ripple current is twice the minimum
load current, or 300 mAP-P. Using this value of ripple current, the inductor (L1) is calculated using Equation 9 and
Equation 10.
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VOUT1 x (VIN(max) - VOUT1)
L1 =
IOR x FS(min) x VIN(max)
where
•
FS(min) is the minimum frequency (FS - 25%)
(9)
10V x (75V - 10V)
L1 =
= 63 PH
0.30A x 463 kHz x 75V
(10)
Equation 10 provides the minimum value for inductor L1. When selecting an inductor, use a higher standard
value (100 uH). L1 must be rated for the peak current (IPK+) to prevent saturation. The peak current occurs at
maximum load current with maximum ripple. The maximum ripple is calculated by rearranging Equation 9 using
VIN(max), FS(min), and the minimum inductor value, based on the manufacturer’s tolerance. Assume for
Equation 11, Equation 12, and Equation 13 that the inductor’s tolerance is ±20%.
VOUT1 x (VIN(max) - VOUT1)
IOR(max) =
L1MIN x FS(min) x VIN(max)
(11)
10V x (75V - 10V)
IOR(max) =
80 PH x 463 kHz x 75V
= 234 mAp-p
(12)
(13)
IPK+ = 1 A + 0.234 A / 2 = 1.117 A
8.2.2.1.4 RCL
Since it is obvious that the lower peak of the inductor current waveform does not exceed 1 A at maximum load
current (see Figure 13), it is not necessary to increase the current limit threshold. Therefore RCL is not needed for
this exercise. For applications where the lower peak exceeds 1 A, see Increasing The Current Limit Threshold.
8.2.2.1.5 C2 and R3
Since the LM5010 requires a minimum of 25 mVP-P of ripple at the FB pin for proper operation, the required ripple
at VOUT1 is increased by R1 and R2. This necessary ripple is created by the inductor ripple current acting on C2’s
ESR + R3. First, determine the minimum ripple current with Equation 14.
VOUT1 x (VIN(min) - VOUT1)
IOR(min) =
=
L1MAX x FS(max) x VIN(min)
10V x (15V - 10V)
120 PH x 772 kHz x 15V
= 36 mA
(14)
The minimum ESR for C2 is then equal to Equation 15.
ESR(min) =
25 mV x (R1 + R2)
R2 x IOR(min)
= 2.8:
(15)
If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in Figure 12. C2
should generally be no smaller than 3.3 µF, although that is dependent on the frequency and the allowable ripple
amplitude at VOUT1. Experimentation is usually necessary to determine the minimum value for C2, as the nature
of the load may require a larger value. A load which creates significant transients requires a larger value for C2
than a non-varying load.
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8.2.2.1.6 D1
The important parameters are reverse recovery time and forward voltage drop. The reverse recovery time
determines how long the current surge lasts each time the buck switch is turned on. The forward voltage drop is
significant in the event the output is short-circuited as it is mainly this diode’s voltage (plus the voltage across the
current limit sense resistor) which forces the inductor current to decrease during the OFF-time. For this reason, a
higher voltage is better, although that affects efficiency. A reverse recovery time of ≊30 ns, and a forward voltage
drop of ≊0.75 V are preferred. The reverse leakage specification is important as that can significantly affect
efficiency. Other types of diodes may have a lower forward voltage drop, but may have longer recovery times, or
greater reverse leakage. D1 should be rated for the maximum VIN, and for the peak current when in current limit
(IPK in Figure 11) which is equal to Equation 16.
IPK = 1.5 A + IOR(max) = 1.734 A
where
•
•
1.5 A is the maximum guaranteed current limit threshold
the maximum ripple current was previously calculated as 234 mAP-P
(16)
This calculation is only valid when RCL is not required.
8.2.2.1.7 C1
Assuming the voltage supply feeding VIN has a source impedance greater than zero, this capacitor limits the
ripple voltage at VIN while supplying most of the switch current during the ON-time. At maximum load current,
when the buck switch turns on, the current into VIN increases to the lower peak of the output current waveform,
ramps up to the peak value, then drops to zero at turnoff. The average current into VIN during this ON-time is the
load current. For a worst case calculation, C1 must supply this average load current during the maximum ONtime. The maximum ON-time is calculated using Equation 5, with a 25% tolerance added in Equation 17.
tON(max) =
1.18 x 10-10 x (137k + 1.4k) x 1.25
15V - 1.4V
+ 67 ns = 1.57 Ps
(17)
C1 is calculated with Equation 18.
C1 =
IO x tON
'V
=
1.0A x 1.57 Ps
1V
= 1.57 PF
where
•
•
IO is the load current
ΔV is the allowable ripple voltage at VIN (1 V for this example)
(18)
TI recommends quality ceramic capacitors with a low ESR for C1. To allow for capacitor tolerances and voltage
effects, use a 2.2-µF capacitor.
8.2.2.1.8 C3
The capacitor at the VCC pin provides not only noise filtering and stability, but also prevents false triggering of
the VCC UVLO at the buck switch ON and OFF transitions. For this reason, C3 should be no smaller than 0.1 µF,
and should be a good quality, low ESR, ceramic capacitor. This capacitor also determines the initial start-up
delay (t1 in Figure 7).
8.2.2.1.9 C4
TI recommends a value of 0.022 µF for C4. TI recommends a high-quality ceramic capacitor with low ESR,
because C4 supplies the surge current to charge the buck switch gate at turnon. A low ESR also ensures a
complete recharge during each OFF-time.
8.2.2.1.10 C5
This capacitor suppresses transients and ringing due to long lead inductance at VIN. TI recommends a low ESR,
0.1-µF ceramic chip capacitor, placed physically close to the LM5010.
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8.2.2.1.11 C6
The capacitor at the SS pin determines the soft-start time (that is the time for the reference voltage at the
regulation comparator and the output voltage), to reach their final value. Determine the time with Equation 19.
tSS =
C6 x 2.5V
11.5 PA
(19)
For a 5-ms soft-start time, C6 calculates to 0.022 µF.
8.2.2.2 Increasing The Current Limit Threshold
The current limit threshold is nominally 1.25 A, with a minimum guaranteed value of 1 A. If, at maximum load
current, the lower peak of the inductor current (IPK– in Figure 13) exceeds 1 A, resistor RCL must be added
between SGND and ISEN to increase the current limit threshold to be equal or exceed that lower peak current. This
resistor diverts some of the recirculating current from the internal sense resistor so that a higher current level is
needed to switch the internal current limit comparator. Calculate IPK– with Equation 20.
IPK- = IO(max) -
IOR(min)
2
where
•
•
IO(max) is the maximum load current
IOR(min) is the minimum ripple current calculated using Equation 14
(20)
RCL is calculated with Equation 21.
RCL =
1.0A x 0.11:
IPK- - 1.0A
where
•
0.11 Ω is the minimum value of the internal resistance from SGND to ISEN
(21)
The next smaller standard value resistor should be used for RCL. With the addition of RCL it is necessary to check
the average and peak current values to ensure they do not exceed the LM5010 limits. At maximum load current
the average current through the internal sense resistor is calculated with Equation 22.
IO(max) x RCL x (VIN(max) - VOUT)
IAVE =
(RCL + 0.11: x VIN(max)
(22)
If IAVE is less than 2 A, no changes are necessary. If it exceeds 2 A, RCL must be reduced. The upper peak of the
inductor current (IPK+), at maximum load current, is calculated using Equation 23.
IOR(max)
IPK+ = IO(max) +
2
where
•
IOR(max) is calculated using Equation 11
(23)
If IPK+ exceeds 3.5 A , the inductor value must be increased to reduce the ripple amplitude. This necessitates
recalculation of IOR(min), IPK–, and RCL.
When the circuit is in current limit, the upper peak current out of the SW pin is calculated with Equation 24.
1.5A x (150 m: + RCL)
IPK+(CL) =
RCL
+ IOR(MAX)
(24)
The inductor L1 and diode D1 must be rated for this current.
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8.2.2.3 Ripple Configuration
The LM5010 uses a constant-ON-time (COT) control scheme where the ON-time is terminated by a one-shot and
the OFF-time is terminated by the feedback voltage (VFB) falling below the reference voltage. Therefore, for
stable operation, the feedback voltage must decrease monotonically in phase with the inductor current during the
OFF-time. Furthermore, this change in feedback voltage (VFB) during OFF-time must be large enough to
dominate any noise present at the feedback node.
Table 3 presents three different methods for generating appropriate voltage ripple at the feedback node. Type 1
and type 2 ripple circuits couple the ripple from the output of the converter to the feedback node (FB). The output
voltage ripple has two components:
1. Capacitive ripple caused by the inductor current ripple charging or discharging the output capacitor.
2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor and
R3.
Table 3. Ripple Configuration
TYPE 1
TYPE 2
Lowest cost
TYPE 3
Reduced ripple
Minimum ripple
VOUT
VOUT
L1
VOUT
L1
L1
R FB2
Cff
R FB2
R3
To FB
C OUT
COUT
R FB2
GND
R FB1
GND
25 mV u VO
VREF u 'IL1, min
CA
CB
To FB
R FB1
R3 t
RA
R3
C OUT
To FB
R FB1
GND
Cff t
5
FSW u (RFB2 IIRFB1 )
R A CA d
(25) R t 25 mV
3
'IL1, min
(VIN, min
VO ) u TON(@ VIN, min )
25mV
(27)
(26)
The capacitive ripple is out of phase with the inductor current. As a result, the capacitive ripple does not
decrease monotonically during the OFF-time. The resistive ripple is in phase with the inductor current and
decreases monotonically during the OFF-time. The resistive ripple must exceed the capacitive ripple at output
(VOUT) for stable operation. If this condition is not satisfied, then unstable switching behavior is observed in COT
converters with multiple ON-time bursts in close succession followed by a long OFF-time.
The type 3 ripple method uses a ripple injection circuit with RA, CA, and the switch node (SW) voltage to generate
a triangular ramp. This triangular ramp is then AC-coupled into the feedback node (FB) using the capacitor CB.
This circuit is suited for applications where low output voltage ripple is imperative because this circuit does not
use the output voltage ripple. See AN-1481 Controlling Output Ripple and Achieving ESR Independence in
Constant ON-Time (COT) Regulator Designs, (SNVA166) for more details on each ripple generation method.
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8.2.3 Application Curves
100
100
80
80
EFFICIENCY (%)
EFFICIENCY (%)
_
60
40
20
VIN = 15V
60
24V
48V
75V
40
20
IOUT = 300mA
0
0
0
20
40
60
0
80
VIN (V)
200
400
600
800 _ 1000
LOAD CURRENT (mA)
Figure 14. Efficiency vs VIN
Figure 15. Efficiency vs Load Current and VIN
700
350
600
250
FREQUENCY (kHz)
OUTPUT RIPPLE (mVp-p)
300
200
150
100
500
400
50
0
300
0
20
40
60
80
VIN (V)
0
20
40
60
80
VIN (V)
Figure 16. Output Voltage Ripple vs VIN
Figure 17. Frequency vs VIN
8.3 Do's and Don'ts
A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level,
the bootstrap capacitor can discharge during the long OFF-time and the circuit either shuts down or cycles ON
and OFF at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the
feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT.
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9 Power Supply Recommendations
The LM5010 is designed to operate with an input power supply capable of supplying a voltage range from 8 V to
75 V. The input power supply must be well-regulated and capable of supplying sufficient current to the regulator
during peak load operation. Also, like in all applications, the power-supply source impedance must be small
compared to the module input impedance to maintain the stability of the converter.
10 Layout
10.1 Layout Guidelines
The LM5010 regulation, overvoltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Therefore, layout considerations are critical for optimum performance. The layout must be as neat
and compact as possible, and all the components must be as close as possible to their associated pins. The
current loop formed by D1, L1 (LIND), C2 (COUT), and the SGND and ISEN pins should be as small as possible. The
ground connection from C2 (COUT) to C1 (CIN) should be as short and direct as possible. If it is expected that the
internal dissipation of the LM5010 will produce high junction temperatures during normal operation, good use of
the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the IC package
bottom can be soldered to a ground plane, and that plane should both extend from beneath the IC, and be
connected to exposed ground plane on the board’s other side using as many vias as possible. The exposed pad
is internally connected to the IC substrate.
The use of wide PC board traces at the pins, where possible, can help conduct heat away from the IC. The four
no connect pins on the HTSSOP package are not electrically connected to any part of the IC, and may be
connected to ground plane to help dissipate heat from the package. Judicious positioning of the PC board within
the end product, along with the use of any available air flow (forced or natural convection) can help reduce the
junction temperature.
10.2 Layout Example
VOUT
CA
COUT
LIND
GND
RA
Cbyp
CIN
SW
CBST
SW
LM5010
VCC
BST
D1
ISEN
GND
VLINE
VIN
Exp Thermal
Pad
RON RON
CVCC
CSS
SGND
SS
RTN
FB
FB
RFB2
CB
RFB1
Via to Ground Plane
Figure 18. LM5010 Buck Layout Example With the WSON Package
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM5010MH
NRND
HTSSOP
PWP
14
94
Non-RoHS
& Green
Call TI
Level-1-260C-UNLIM
-40 to 125
L5010
MH
LM5010MH/NOPB
ACTIVE
HTSSOP
PWP
14
94
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
L5010
MH
LM5010MHX/NOPB
ACTIVE
HTSSOP
PWP
14
2500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
L5010
MH
LM5010SD/NOPB
ACTIVE
WSON
DPR
10
1000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
L00057B
LM5010SDX/NOPB
ACTIVE
WSON
DPR
10
4500
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
L00057B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of