LM5041AMTC

LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 LM5041A Cascaded PWM Controller Check for Samples: LM5041A FEATURES DESCRIPTION • • The LM5041A PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either an overlap time (for current-fed applications) or a both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage startup regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100ns. Additional features include: line Under-Voltage Lockout (UVLO), soft-start, an error amplifier, precision voltage reference, and thermal shutdown. 1 • • • • • • • • • • Internal Start-up Bias Regulator Programmable Line Under-Voltage Lockout (UVLO) with Adjustable Hysteresis Current Mode Control Internal Error Amplifier with Reference Cycle-by-cycle Over-Current Protection Leading Edge Blanking Programmable Push-Pull Overlap or Dead Time Internal 1.5A Push-Pull Gate Drivers Programmable Soft-Start Programmable Oscillator with Sync Capability Precision Reference Thermal Shutdown APPLICATIONS • • • • Telecommunication Power Converters Industrial Power Converters Multi-Output Power Converters +42V Automotive Systems The two differences between the LM5041 and the LM5041A are: No second level current limit in the 'A' version No softstart (SS) shutdown comparator in the 'A' version. PACKAGES • • TSSOP-16 WSON-16 (5 mm × 5 mm) Thermally Enhanced 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2013, Texas Instruments Incorporated LM5041A SNVS350B – MARCH 2005 – REVISED MARCH 2013 www.ti.com Typical Application Circuit VOUT 33V - 76V VDD HB VCC VIN HD HI HO HS LD LM5041A LI RT LM5102 2 VSS LO RT1 RT2 PUSH FEED BACK PULL FB Figure 1. Simplified Cascaded Push-Pull Power Converter Connection Diagram 1 2 3 4 5 6 7 8 VIN UVLO FB RT COMP 15 14 TIME 13 REF SS HD CS LD AGND VCC PGND PUSH 16 12 11 10 9 PULL Figure 2. 16-Lead TSSOP or WSON See PW or NHQ0016A Package 2 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 PIN DESCRIPTIONS PIN NAME DESCRIPTION APPLICATION INFORMATION 1 VIN Source Input Voltage Input to start-up regulator. Input range 15V to 100V. 2 FB Feedback Signal Inverting input for the internal error amplifier. The noninverting input is connected to a 0.75V reference. 3 COMP Output of the Internal Error Amplifier There is an internal 5kΩ resistor pull-up on this pin. The error amplifier provides an active sink. 4 REF Precision 5 volt reference output Maximum output current: 10mA. Locally decouple with a 0.1µF capacitor. Reference stays low until the line UV and the VCC UV are satisfied. 5 HD Main Buck PWM control output Buck switch PWM control output. The maximum duty cycle clamp for this output corresponds to an off time of typically 240ns per cycle. The LM5101 or LM5102 Buck stage gate driver can be used to level shift and drive the Buck switch. 6 LD Sync Switch control output Sync Switch control output. Inversion of HD output. The LM5101 or LM5102 lower drive can be used to drive the synchronous rectifier switch. 7 VCC Output from the internal high voltage start-up regulator. Regulated to 9 volts. If an auxiliary winding raises the voltage on this pin above the regulation setpoint, the internal start-up regulator will shutdown, reducing the IC power dissipation. 8 PUSH Output of the push-pull drivers Output of the push-pull gate driver. Output capability of 1.5A peak . 9 PULL Output of the push-pull drivers Output of the push-pull gate driver. Output capability of 1.5A peak. 10 PGND Power ground Connect directly to analog ground. 11 AGND Analog ground Connect directly to power ground. 12 CS Current sense input Current sense input to the PWM comparator (CM control). There is a 50ns leading edge blanking on this pin. Using separate dedicated comparator, if CS exceeds 0.5V the outputs will go into cycle by cycle current limit. 13 SS Soft-start control An external capacitor and an internal 10uA current source, set the soft-start ramp. 14 TIME Push-Pull overlap and dead time control An external resistor (RSET) sets the overlap time or dead time for the push-pull outputs. A resistor connected between TIME and GND produces overlap. A resistor connected between TIME and REF produces dead time. 15 RT / SYNC Oscillator timing resistor pin and sync An external resistor sets the oscillator frequency. This pin will also accept an external oscillator. Line Under-Voltage Shutdown An external divider from the power converter source sets the shutdown levels. Threshold of operation equals 2.5V. Hysteresis is set by a switched internal current source (20µA). Die substrate The exposed die attach pad on the WSON package should be connected to a PCB thermal pad at ground potential. For additional information on using the No Pull Back WSON package, please refer to LLP Application Note AN1187 (SNOA401). 16 WSON DAP UVLO SUB Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A 3 LM5041A SNVS350B – MARCH 2005 – REVISED MARCH 2013 www.ti.com Block Diagram 9V SERIES REGULATOR VIN VCC 5V REFERENCE VCC ENABLE VREF UVLO UVLO + - 2.5V LOGI C UVLO HYSTERESIS (20 PA) 45 PA CLK HD 5V SLOPE COMP RAMP GENERATOR COMP 0.75V 5k + FB - S PWM 100k Q LD + R 1.4V 50k Q LOGIC SS PGND CS 0.5V 2k + - CLK + LEB AGND 10 PA SS SS TIME VCC DRIVE R OSC CLK RT / SYNC OSCILLATOR DIVIDE BY 2 OVERLAP OR DEAD TIME CONTROL PUSH VCC DRIVE R PULL Figure 3. Simplified Block Diagram 4 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN to GND 100V VCC to GND 16V All Other Inputs to GND -0.3 to 7V Junction Temperature 150°C Storage Temperature Range -65°C to +150°C ESD Rating 2 kV Lead Temperature (3) (1) Wave 4 seconds 260°C Infrared 10 seconds 240°C Vapor Phase 75 seconds 219°C Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. For detailed information on soldering plastic TSSOP and WSON packages, visit www.ti.com/packaging. (2) (3) Operating Ratings (1) VIN 15 to 90V Junction Temperature (1) -40°C to +125°C Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics. Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated (1) Symbol Parameter Conditions Min Typ Max 9.3 Units Startup Regulator VCC Reg I-VIN VCC Regulation open circuit 8.7 9 VCC Current Limit See (2) 15 25 V Startup Regulator Leakage (external Vcc Supply) VIN = 100V 145 500 µA Shutdown Current (Iin) UVLO = 0V, VCC = open 350 450 µA mA VCC Supply VCC Under-voltage Lockout Voltage (positive going Vcc) VCC Under-voltage Hysteresis Supply Current (ICC) VCC Reg 400mV VCC Reg - 275mV 1.7 2.1 2.6 V 3 4 mA CL = 0 V Error Amplifier GBW (1) (2) Gain Bandwidth 3 MHz DC Gain 80 dB Input Voltage VFB = COMP COMP Sink Capability VFB = 1.5V, COMP= 1V 0.735 0.75 4 8 0.765 V mA All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25°C. All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Device thermal limitations may limit usable range. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A 5 LM5041A SNVS350B – MARCH 2005 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated(1) Symbol Parameter Conditions Min Typ Max Units 5 5.15 V 25 50 mV Reference Supply VREF Ref Voltage IREF = 0 mA Ref Voltage Regulation IREF = 0 to 10mA 4.85 Ref Current Limit 15 20 mA 40 ns Current Limit ILIM Delay to Output CS Step from 0 to 0.6V Time to Onset of OUT Transition (90%), CL = 0 Cycle by Cycle Threshold Voltage 0.45 Leading Edge Blanking Time 0.5 0.55 V 50 ns mA CS Sink Current (clocked) CS = 0.3V 2 5 Soft-start Current Source 7 10 13 µA Soft-start to COMP Offset 0.35 0.55 0.75 V 180 175 200 220 225 kHz 515 600 685 kHz 3 3.5 V Soft-Start Oscillator Frequency1 (RT = 26.7KΩ) TJ = 25°C Frequency2 (RT = 7.87KΩ) Sync threshold PWM Comparator Delay to Output COMP set to 2V CS stepped 0 to 0.4V, Time to onset of OUT transition low Max Duty Cycle TS = Oscillator Period Min Duty Cycle COMP = 0V 25 ns (Ts-240ns)/Ts) COMP to PWM Comparator Gain % 0 % 0.32 COMP Open Circuit Voltage FB = 0V 4.1 4.8 5.5 V COMP Short Circuit Current FB = 0V, COMP = 0V 0.6 1 1.4 mA Slope Compensation Slope Comp Amplitude Delta increase at PWM Comparator to CS 110 mV UVLO Shutdown 6 Under-voltage Shutdown 2.44 2.5 2.56 V Under-voltage Shutdown Hysteresis Current Source 16 20 24 µA Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated(1) Symbol Parameter Conditions Min Typ Max Units Buck Stage Outputs Output High level 5 (VREF) V Output High Saturation IOUT = 10mA, REF = VOUT 0.5 1 Output Low Saturation IOUT = −10mA 0.5 1 V Rise Time CL = 100pF 10 ns Fall Time CL = 100pF 10 ns V Push-Pull Outputs Overlap Time RSET = 20kΩ Connected to GND, 50% to 50% Transitions 60 90 120 ns Dead Time RSET = 20kΩ Connected to REF, 50% to 50% Transitions 65 95 125 ns Output High Saturation IOUT = 50mA, VCC - VOUT 0.25 0.5 V Output Low Saturation IOUT = 100mA 0.5 1 V Rise Time CL = 1nF 20 ns Fall Time CL = 1nF 20 ns Thermal Shutdown Temp. 165 °C Thermal Shutdown Hysteresis 25 °C TSSOP Package 125 °C/W WSON Package 32 °C/W Thermal Shutdown TSD Thermal Resistance θJA Junction to Ambient Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A 7 LM5041A SNVS350B – MARCH 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VCC and VIN vs VIN VCC vs ICC 10 20 VIN 8 VIN = 15V 6 VCC (V) VCC AND VIN (V) 15 VCC 10 4 5 2 0 0 5 0 15 10 20 0 5 10 15 20 25 ICC (mA) VIN (V) Figure 4. Figure 5. SS Pin Current vs Temp Frequency vs RT 13 1000 FREQUENCY (kHz) SS CURRENT (PA) 12 11 10 9 8 100 7 -25 25 75 125 10000 1000 TEMPERATURE ( C) Figure 6. Figure 7. Dead Time vs RSET 500 500 400 400 DEAD TIME (ns) OVERLAP TIME (ns) Overlap Time vs RSET 300 200 100 300 200 100 0 0 10 30 50 70 90 110 10 30 50 70 90 110 RSET (k:) RSET (k:) Figure 8. 8 100000 RT (:) o Figure 9. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Dead Time vs Temp 120 130 110 120 DEAD TIME (ns) OVERLAP TIME (ns) Overlap Time vs Temp 100 RSET = 20k: 90 80 70 110 RSET = 20k: 100 90 80 70 60 -25 25 75 -25 125 o 25 75 125 o TEMPERATURE ( C) TEMPERATURE ( C) Figure 10. Figure 11. Error Amplifier Gain Phase Figure 12. Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM5041A 9 LM5041A SNVS350B – MARCH 2005 – REVISED MARCH 2013 www.ti.com DETAILED OPERATING DESCRIPTION The LM5041A PWM controller contains all of the features necessary to implement either current-fed or voltagefed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either an overlap time (for current-fed applications) or a both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100ns. Additional features include: line Under-Voltage Lockout (UVLO), softstart, an error amplifier, precision voltage reference, and thermal shutdown. High Voltage Start-Up Regulator The LM5041A contains an internal high-voltage start-up regulator, thus the input pin (Vin) can be connected directly to the line voltage. The regulator output is internally current limited to 15mA. When power is applied, the regulator is enabled and sources current into an external capacitor connected to the Vcc pin. The recommended capacitance range for the Vcc regulator is 0.1uF to 100uF. When the voltage on the Vcc pin reaches the regulation point of 9V and the internal voltage reference (REF) reaches its regulation point of 5V, the controller outputs are enabled. The Buck stage outputs will remain enabled until Vcc falls below 7V or the line UnderVoltage Lockout detector indicates that Vin is out of range. The push-pull outputs continue switching until the REF pin voltage falls below approximately 3V. In typical applications, an auxiliary transformer winding is connected through a diode to the Vcc pin. This winding must raise the Vcc voltage above 9.3V to shut off the internal start-up regulator. Powering VCC from an auxiliary winding improves efficiency while reducing the controller's power dissipation. The recommended capacitance range for the Vref regulator output is 0.1uF to 10uF. The external VCC capacitor must be sized such that the capacitor maintains a VCC voltage greater than 7V during the initial start-up. During a fault mode when the converter auxiliary winding is inactive, external current draw on the VCC line should be limited so the power dissipated in the start-up regulator does not exceed the maximum power dissipation of the controller. An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the VCC and the VIN pins together and feeding the external bias voltage into the two pins. Line Under-Voltage Detector The LM5041A contains a line Under-Voltage Lockout (UVLO) circuit. An external set-point resistor divider from VIN to ground sets the operational range of the converter. The divider must be designed such that the voltage at the UVLO pin will be greater than 2.5V when VIN is in the desired operating range. If the Under-Voltage threshold is not met, all functions of the controller are disabled and the controller will enter a low-power state with input current