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LM5152EVM-BST

LM5152EVM-BST

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

  • 描述:

    LM5152-Q1 - DC/DC,步升 1,非隔离 输出评估板

  • 数据手册
  • 价格&库存
LM5152EVM-BST 数据手册
www.ti.com Table of Contents User’s Guide LM5152EVM-BST Evaluation Module ABSTRACT The LM5152EVM-BST evaluation module (EVM) showcases the features and performance of the LM5152-Q1 wide input voltage synchronous boost controller, including the following: • • • • • • • • Low IQ operation Internal feedback resistors Bypass mode operation when VIN is greater than the VOUT regulation target Dynamic output voltage tracking STATUS indicator Programmable frequency Clock dithering Programmable UVLO The EVM is designed to maintain the minimum output of 8.5 V at 440 kHz during the automotive cranking down to 2.5-V boost input. This EVM is designed for ease of configuration, enabling a user to evaluate the device for an automotive application. Functionality includes the following: • • • • • • • • Low IQ operation Internal feedback resistors Bypass mode operation when VIN is greater than VOUT Dynamic output voltage tracking STATUS indicator Programmable frequency dithering Programmable undervoltage lockout (UVLO) Overvoltage protection Table of Contents 1 Introduction.............................................................................................................................................................................3 1.1 Applications........................................................................................................................................................................3 1.2 Features............................................................................................................................................................................. 3 2 EVM Setup............................................................................................................................................................................... 4 2.1 EVM Characteristics...........................................................................................................................................................5 2.2 EVM Connectors and Test Points...................................................................................................................................... 5 3 Test Setup and Procedures....................................................................................................................................................7 3.1 Equipment.......................................................................................................................................................................... 7 4 Test Results.............................................................................................................................................................................8 4.1 Efficiency ...........................................................................................................................................................................8 4.2 Loop Response ................................................................................................................................................................. 8 4.3 Thermal Performance........................................................................................................................................................ 9 4.4 Typical Waveforms........................................................................................................................................................... 10 5 PCB Layers............................................................................................................................................................................11 6 Schematic..............................................................................................................................................................................12 7 Bill of Materials..................................................................................................................................................................... 13 List of Figures Figure 1-1. Typical Application Circuit......................................................................................................................................... 3 Figure 2-1. EVM Photo................................................................................................................................................................ 4 SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 1 Trademarks www.ti.com Figure 3-1. EVM Test Setup.........................................................................................................................................................7 Figure 4-1. Efficiency: VOUT = 8.5 V, FPWM Mode......................................................................................................................8 Figure 4-2. 2.5-V Loop Response at 4-A Load............................................................................................................................ 8 Figure 4-3. Thermal Performance: VIN = 2.5 V, VOUT = 8.5 V, IOUT = 4 A, No Forced Airflow..................................................... 9 Figure 4-4. Program 1, DaimlerChrysler Engine-Cranking Test Pulse, DC-10615 (C1: VOUT, C3: VIN, C4: STATUS)............10 Figure 4-5. Program 2, Volkswagen Warm-Start Test Pulse, VW80000 (C1: VOUT, C3: VIN, C4: STATUS)........................... 10 Figure 4-6. Program 3, Volkswagen Cold-Start Test Pulse, VW80000 (C1: VOUT, C3: VIN, C4: STATUS)............................. 10 Figure 4-7. Load Transient Test (2 A to 4 A to 2 A at 4-V Input)................................................................................................10 Figure 5-1. Layout: Top Silk Screen........................................................................................................................................... 11 Figure 5-2. Layout: Top Layer.................................................................................................................................................... 11 Figure 5-3. Layout: Signal Layer 1............................................................................................................................................. 11 Figure 5-4. Layout: Signal Layer 2............................................................................................................................................. 11 Figure 5-5. Layout: Bottom Layer...............................................................................................................................................11 Figure 5-6. Layout: Bottom Silk Screen..................................................................................................................................... 11 Figure 6-1. Schematic................................................................................................................................................................12 List of Tables Table 2-1. EVM Characteristics .................................................................................................................................................. 5 Table 2-2. Power Connections.....................................................................................................................................................5 Table 2-3. Programmable Jumper Connections.......................................................................................................................... 5 Table 2-4. Probe Points............................................................................................................................................................... 6 Table 7-1. Bill of Materials..........................................................................................................................................................13 Trademarks All trademarks are the property of their respective owners. 2 LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Introduction 1 Introduction The LM5152EVM-BST evaluation module is designed to evaluate the operation and performance of the LM5152-Q1 low-IQ synchronous boost controller. The EVM operates over an input voltage range of 2.5 V to 36 V and requires minimum of 7-V input to start up. The EVM provides a 8.5-V output with a maximum load current of 4 A at 2.5-V input or 6 A at 4.5-V input. Figure 1-1 shows the standard application circuit for the LM5152EVM-BST evaluation module. VLOAD VLOAD CVCC COUT VOUT CHB HO RS SW LM VCC RT HB QH VSUPPLY BIAS RT CSS LM5152 SS CHF STATUS QL LO PGND VLOAD COMP RCOMP CCOMP MODE CSN AGND CSP VREF CVREF RUVLOT UVLO SYNC/DITHER TRK RVREFT RUVLOB RVREFB Figure 1-1. Typical Application Circuit 1.1 Applications • • Automotive start-stop application Automotive backup power supply application 1.2 Features The LM5152EVM-BST has the following features: • • • • • • • • • • • Input voltage range from 2.5 V to 36 V (7 V to start up) Internal low leakage current high-impedance feedback resistors with programmable output voltage Operating frequency of 440 kHz with externally clock synchronization up or down by 20% Bypass mode operation when VIN is greater than VOUT Selectable forced PWM (FPWM), skip mode, or diode emulation using the MODE pin High power conversion efficiency across a wide operating range Cycle-by-cycle peak current limiting Optional frequency dithering for improved EMI performance Boost STATUS indicator Programmable soft-start time Programmable line undervoltage lockout (UVLO) SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 3 EVM Setup www.ti.com 2 EVM Setup Section 2 describes the operating conditions for the EVM, as well as the configuration points of the evaluation module. Figure 2-1. EVM Photo CAUTION Prolonged operation with low input voltage at full power will cause heating of Q1, Q4, L2, and R3. Board surface is hot. Do not touch! Contact may cause burns. 4 LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com EVM Setup 2.1 EVM Characteristics Table 2-1 details the EVM characteristics. Table 2-1. EVM Characteristics PARAMETER TEST CONDITION Input voltage range Operation MIN TYP MAX UNIT 2.5 13.5 36 V Start-up voltage 7 Input current V 17 Output voltage A 8.5 V Output current1 2.5 V ≤ VSUPPLY < 4.5 V 4 A Output current2 4.5 V ≤ VSUPPLY < 36 V 6 A Switching frequency 440 kHz 2.2 EVM Connectors and Test Points Section 2 describes the connection points of the evaluation module. Table 2-2 to Table 2-4 describe these connections. Table 2-2 lists the power connections of the evaluation module. These connections are intended to handle relatively large currents. Table 2-2. Power Connections JUMPER PIN DESCRIPTION J1 VIN+ Positive input voltage power for the evaluation module J2 VOUT+ Positive output voltage power for the evaluation module J4 GND Negative output voltage power for the evaluation module J5 VIN– Negative input voltage power for the evaluation module Table 2-3 lists the EVM jumpers and test points that configure the LM5152-Q1 as desired. These jumpers can set different modes of operation or provide signals to different pins of the LM5152-Q1. Table 2-3. Programmable Jumper Connections JUMPER J7 PINS DESCRIPTION DEFAULT CONNECTION Pin 1 to Pin 2 SYNC/DITHER/VH/CP is pulled to VCC through a 1-kΩ resistor to enable the internal charge pump or enable the VCC holdup functionality. This connection must not be made if the J10 is populated. Pin 2 to Pin 3 SYNC/DITHER/VH/CP is pulled to AGND through a 1-kΩ resistor to disable the internal charge-pump and VCC holdup functionality. Open If an external clock synchronization on J10 is used, leave this jumper open. J9 VTRK_D PWM signal applied through a two stage low-pass filters to the TRK pin. R17 must be populated. J10 Pin 1 to Pin 2 SYNC/DITHER/VH/CP pulled to ground, disabling dithering, internal charge-pump functionality, and VCC holdup functionality. J10 must not be populated when J7 is populated between pin 1 and pin 2. Open Dithering is enabled. To synchronize to an external clock, remove C37. Pin 1 to Pin 2 Bypass D1 to tie either VIN or VOUT nets to the BIAS pin. Open Either VIN or VOUT is supplied through D1 to the BIAS pin. Pin 1 to Pin 2 VIN is supplied to the BIAS pin. This is the default connection. Pin 2 to Pin 3 VOUT is supplied to the BIAS pin. J11 J12 SNVU792 – SEPTEMBER 2021 Submit Document Feedback X X X X LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 5 EVM Setup www.ti.com Table 2-3. Programmable Jumper Connections (continued) JUMPER J13 PINS DESCRIPTION DEFAULT CONNECTION Pin 1 to Pin 2 Connect an auxiliary power supply that can be used to supply power to the BIAS pin. J11 must be open if this is populated. Pin 2 to Pin 3 Connect VCC to BIAS. Open J14 X Pin 1 to Pin 2 Configures light-load switching operation to be FPWM Pin 2 to Pin 3 Configures light-load switching operation to be diode emulation Open Configures light-load switching operation to be skip TP6 Positive input to the VAUX net TP7 Negative input to the VAUX net TP8 Positive input to the TRK pin TP9 Negative input to the TRK pin X Table 2-4 indicates the dedicated voltage probe points of the EVM. These points are used to make measurements on the EVM. Table 2-4. Probe Points SENSE POINT 6 NAME DESCRIPTION TP1 VIN+ TP2 VOUT+ Sense point for the positive input voltage TP3 SW Sense point for the switch node of the boost controller TP4 GND Sense point for the negative output voltage TP5 VIN– Sense point for the negative input voltage J3 PGND Power ground connection J6 PGND Power ground connection J8 1 BIAS 2 VCC 3 STATUS 4 UVLO 5 COMP 6 SS 7 AGND Sense point for the positive output voltage LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Test Setup and Procedures 3 Test Setup and Procedures Figure 3-1 shows the required test setup to recreate the results found in Section 4. Voltmeter 1 VIN Power Supply - + Voltmeter 1 VOUT V COM V COM Ammeter 1 IIN A COM Ammeter IOUT A Electronic Load VOUT COM + - Figure 3-1. EVM Test Setup 3.1 Equipment The following test equipment is needed to test the LM5152EVM-BST as shown in Figure 3-1. • • • • Power supply: The input voltage source (VIN) must be a variable supply with minimum efficiency level V. The power supply must source 2.5 V to 36 V and be able to supply more than 20 A of current. TI recommends using an external power supply that complies with applicable regional safety standards such as (by example) the following: – UL – CSA – VDE – PSE Electronic load: Load connected to the output of the evaluation module. The electronic load must be able to handle up to 36 V and dissipate 100 W at 8.5 V. Multimeters: For DC measurements – Voltmeter 1 (VIN): Capable of measuring the input voltage range up to 36 V – Voltmeter 2 (VOUT): Capable of measuring output voltage of 36 V – Ammeter 1 (IIN): Capable of 20-A DC measurement. A shunt resistor can also be used to measure the input current. – Ammeter 2 (IOUT): Capable of at least 6-A DC measurement Oscilloscope: Minimum of 20-MHz bandwidth and 10x probes SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 7 Test Results www.ti.com 4 Test Results Section 4 covers the test results of the evaluation module. 4.1 Efficiency 100 Efficiency [%] 90 80 70 VSUPPLY=7.5 [V] VSUPPLY=6.5 [V] VSUPPLY=5.5 [V] 60 0 0.5 1 1.5 2 IOUT [A] 2.5 3 3.5 4 Figure 4-1. Efficiency: VOUT = 8.5 V, FPWM Mode 4.2 Loop Response Figure 4-2. 2.5-V Loop Response at 4-A Load 8 LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Test Results 4.3 Thermal Performance L2 Q4 Q1 Figure 4-3. Thermal Performance: VIN = 2.5 V, VOUT = 8.5 V, IOUT = 4 A, No Forced Airflow SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 9 Test Results www.ti.com 4.4 Typical Waveforms Texas Instruments HVAL068A automotive cranking simulator is used during cranking test. Figure 4-4. Program 1, DaimlerChrysler EngineCranking Test Pulse, DC-10615 (C1: VOUT, C3: VIN, C4: STATUS) Figure 4-5. Program 2, Volkswagen Warm-Start Test Pulse, VW80000 (C1: VOUT, C3: VIN, C4: STATUS) Figure 4-6. Program 3, Volkswagen Cold-Start Test Figure 4-7. Load Transient Test (2 A to 4 A to 2 A at Pulse, VW80000 (C1: VOUT, C3: VIN, C4: STATUS) 4-V Input) 10 LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com PCB Layers 5 PCB Layers Figure 5-1 through Figure 5-6 illustrate the EVM PCB layout. Figure 5-1. Layout: Top Silk Screen Figure 5-2. Layout: Top Layer Figure 5-3. Layout: Signal Layer 1 Figure 5-4. Layout: Signal Layer 2 Figure 5-5. Layout: Bottom Layer Figure 5-6. Layout: Bottom Silk Screen SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 11 Schematic www.ti.com 6 Schematic Figure 6-1 illustrates the EVM schematic. Figure 6-1. Schematic 12 LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Schematic 7 Bill of Materials Section 7 details the EVM bill of materials. Table 7-1. Bill of Materials DESIGNATOR QTY VALUE DESCRIPTION PACKAGE REFERENCE PART NUMBER MANUFACTURER C2, C24, C25, C26 4 120 µF CAP ALUM POLY HYB 120UF 50 V SMD RADIAL EEH-ZC1H121P Panasonic C3 1 1000 pF CAP, CERM, 1000 pF, 50 V, ±10%, X7R, 0603 603 C0603X102K5RACTU Kemet C4 1 0.1 μF CAP, CERM, 0.1 μF, 50 V, ±10%, X7R, 0603 603 C1608X7R1H104K080AA TDK C5, C7 2 0.01 μF CAP, CERM, 0.01 µF, 100 V, ±10%, X7R, 0603 603 885012206114 Wurth Elektronik C6, C8, C9, C10, C11 5 10 μF CAP, CERM, 10 μF, 50 V, ±10%, X7R, 1210 1210 GRM32ER71H106KA12L MuRata C12, C13, C14, C15, C22, C31, C32 7 0.1 μF CAP, CERM, 0.1 μF, 100 V, ±10%, X7R, AEC-Q200 Grade 1, 0603 603 GCJ188R72A104KA01D MuRata C16, C17, C18, C19, C20, C21 6 10 μF CAP, CERM, 10 µF, 50 V, ±10%, X7R, 1210 1210 CL32B106KBJNNWE Samsung C23 1 100 pF CAP, CERM, 100 pF, 50 V, ±5%, 603 C0G/NP0, AEC-Q200 Grade 0, 0603 CGA3E2NP01H101J080AA TDK C29 1 4.7 μF CAP, CERM, 4.7 μF, 16 V, ±10%, X6S, 0603 603 C1608X6S1C475K080AC TDK C33 1 100 pF CAP, CERM, 100 pF, 50 V, ±1%, C0G/NP0, 0603 603 C0603C101F5GACTU Kemet C34 1 0.33 μF CAP, CERM, 0.33 μF, 10 V, ±10%, X5R, 0603 603 C0603C334K8PACTU Kemet C35, C36 2 0.22 μF CAP, CERM, 0.22 μF, 50 V, ±10%, X7R, AEC-Q200 Grade 1, 0603 603 CGA3E3X7R1H224K080AB TDK C37 1 6800 pF CAP, CERM, 6800 pF, 50 V, ±5%, C0G/NP0, 0603 603 GRM1885C1H682JA01D MuRata C38 1 4700 pF CAP, CERM, 4700 pF, 100 V, ±5%, C0G/NP0, 0603 603 C0603C472J1GAC7867 Kemet C39 1 100 pF CAP, CERM, 100 pF, 50 V, ±5%, C0G/NP0, 0603 603 C0603C101J5GACTU Kemet C40 1 470 pF CAP, CERM, 470 pF, 50 V, ±5%, C0G/NP0, 0603 603 06035A471JAT2A AVX D1 1 60 V Diode, Schottky, 60 V, 1 A, SOD-123F SOD-123F PMEG6010CEH,115 Nexperia H1, H2, H3, H4 4 NY PMS 440 0025 PH B&F Machine Screw, Round, #4-40 x 1/4, Screw Nylon, Philips panhead SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 13 Schematic www.ti.com Table 7-1. Bill of Materials (continued) DESIGNATOR QTY H5, H6, H7, H8 DESCRIPTION PACKAGE REFERENCE PART NUMBER MANUFACTURER 4 Standoff, Hex, 0.5"L #4-40 Nylon Standoff 1902C Keystone J1, J2, J4, J5 4 TERMINAL SCREW PC 30AMP, TH 12.9 × 6.3 × 7.9 mm 8199 Keystone J3, J6 2 TEST POINT SLOTTED .118", TH Slot 1040 Keystone J7, J12, J13, J14 4 Header, 100 mil, 3 × 1, Gold, TH 3 × 1 Header TSW-103-07-G-S Samtec J8 1 Header, 100mil, 7 × 1, Gold, TH 7 × 1 Header TSW-107-07-G-S Samtec J9, J10, J11 3 Header, 100 mil, 2 × 1, Gold, TH 2 × 1 Header TSW-102-07-G-S Samtec L2 1 1 μH Inductor, Shielded, Composite, 1 μH, 7.2 × 7 × 7.5 mm 25 A, 0.00255 Ω, SMD XAL7070-102MEB Coilcraft Q1 1 60 V MOSFET, N-CH, 60 V, 100 A, AECQ101, SO-8FL SO-8FL NVMFS5C645NLWFAFT1G ON Semiconductor ALT 40 V MOSFET N-CH 40-V 27-A/100-A TDSON TDSON-8 FL BSC022N04LS6 Infineon 1 60 V MOSFET, N-CH, 60 V, 17 A, AECQ101, SO-8FL SO-8FL NVMFS5C670NLWFAFT1G ON Semiconductor ALT 40 V MOSFET N-CH 40-V 27-A/100-A TDSON TDSON-8 FL BSC022N04LS6 Infineon R2 1 0 RES, 0, 5%, 2 W, 2512 WIDE 2512 WIDE RCL12250000Z0EG Vishay Draloric R3A 1 3m 3 ±1% 1-W Chip Resistor Wide 1206 1206 WSL06123L000FEA Vishay R4, R5, R8, R11, R15 5 0 RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 603 ERJ-3GEY0R00V Panasonic R6 1 100 RES, 100, 1%, 0.1 W, 0603 603 RC0603FR-07100RL Yageo R10 1 2 RES, 2.0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW06032R00JNEA Vishay-Dale R12 1 0 RES, 0, 5%, 0.1 W, 0603 603 RC0603JR-070RL Yageo R13 1 100 k RES, 100 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW0603100KFKEA Vishay-Dale R14 1 36.5 k RES, 36.5 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW060336K5FKEA Vishay-Dale R16 1 1.00 k RES, 1.00 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW06031K00FKEA Vishay-Dale R18, R19 2 80.6 k RES, 80.6 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW060380K6FKEA Vishay-Dale R20 1 8.66 k RES, 8.66 k, 1%, 0.1 W, 0603 603 RC0603FR-078K66L Yageo R21 1 49.9 k RES, 49.9 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 ERJ-3EKF4992V Panasonic R22 1 22.6 k RES, 22.6 k, 1%, 0.1 W, 0603 603 RC0603FR-0722K6L Yageo R23 1 56.2 k RES, 56.2 k, 1%, 0.1 W, 0603 603 RC0603FR-0756K2L Yageo Q4 14 VALUE LM5152EVM-BST Evaluation Module SNVU792 – SEPTEMBER 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated www.ti.com Schematic Table 7-1. Bill of Materials (continued) DESIGNATOR QTY VALUE DESCRIPTION PACKAGE REFERENCE PART NUMBER MANUFACTURER R24 1 41.2 k RES, 41.2 k, 1%, 0.1 W, 0603 603 RC0603FR-0741K2L Yageo SH-J1, SH-J2, SH-J3, SH-J4 4 Single Operation 2.54mm Pitch Open Top Jumper Socket 2.54mm M7582-05 Harwin TP1, TP2, TP6, TP7 4 Test Point, Miniature, Red, TH Red Miniature 5000 Keystone TP3 1 Test Point, Miniature, SMT Miniature 5015 Keystone TP4, TP5, TP8, TP9 4 Test Point, Miniature, Black, TH Black Miniature 5001 Keystone U1 1 Automotive Low-IQ Synchronous Boost Controller for Start-stop VQFN20 LM5152QRGRRQ1 Texas Instruments C1 0 2200 pF CAP, CERM, 2200 pF, 100 V, ±10%, X7R, 0603 603 GRM188R72A222KA01D MuRata C27, C28 0 0.1 μF CAP, CERM, 0.1 μF, 100 V, ±10%, X7R, AEC-Q200 Grade 1, 0603 603 GCJ188R72A104KA01D MuRata C30 0 0.1 μF CAP, CERM, 0.1 μF, 50 V, ±10%, X7R, 0603 603 C1608X7R1H104K080AA TDK C41 0 100 pF CAP, CERM, 100 pF, 50 V, ±1%, C0G/NP0, 0603 603 C0603C101F5GACTU Kemet L1 0 1 μH Inductor, Shielded, Composite, 1 μH, XAL7030 21.8 A, 0.00455 Ω, SMD XAL7030-102MEB Coilcraft Q2 0 60 V MOSFET, N-CH, 60 V, 100 A, AECQ101, SO-8FL SO-8FL NVMFS5C645NLWFAFT1G ON Semiconductor Q3 0 60 V MOSFET, N-CH, 60 V, 17 A, AECQ101, SO-8FL SO-8FL NVMFS5C670NLWFAFT1G ON Semiconductor R1 0 2 RES, 2.00, 1%, 0.5 W, AEC-Q200 Grade 0, 1210 1210 ERJ-14BQF2R0U Panasonic R3 0 0.003 RES, 0.003, 1%, 3 W, AEC-Q200 Grade 0, 2512 WIDE 2512 WIDE KRL6432E-M-R003-F-T1 Susumu Co Ltd R7 0 0 RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 603 ERJ-3GEY0R00V Panasonic R9 0 2 RES, 2.0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW06032R00JNEA Vishay-Dale R17 0 80.6k RES, 80.6 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 603 CRCW060380K6FKEA Vishay-Dale SNVU792 – SEPTEMBER 2021 Submit Document Feedback LM5152EVM-BST Evaluation Module Copyright © 2021 Texas Instruments Incorporated 15 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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