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LM92CIM

LM92CIM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC8_150mil

  • 描述:

    SENSOR TEMPERATURE I2C 8SOIC

  • 数据手册
  • 价格&库存
LM92CIM 数据手册
LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator With Two-Wire Interface Check for Samples: LM92 FEATURES DESCRIPTION • The LM92 is a digital temperature sensor and thermal window comparator with an I2C™ Serial Bus interface and an accuracy of ±0.33°C. The window-comparator architecture of the LM92 eases the design of temperature control systems. The open-drain Interrupt (INT) output becomes active whenever temperature goes outside a programmable window, while a separate Critical Temperature Alarm (T_CRIT_A) output becomes active when the temperature exceeds a programmable critical limit. The INT output can operate in either a comparator or event mode, while the T_CRIT_A output operates in comparator mode only. 1 23 • • • • • • Window Comparison Simplifies Design of ACPI-Compatible Temperature Monitoring and Control Serial Bus Interface Separate Open-Drain Outputs for Interrupt and Critical Temperature Shutdown Shutdown Mode to Minimize Power Consumption Up to Four LM92s can be Connected to a Single Bus 12-Bit + Sign Output Operation up to 150°C APPLICATIONS • • • • • • • HVAC Medical Electronics Electronic Test Equipment System Thermal Management Personal Computers Office Electronics Automotive KEY SPECIFICATIONS • • • • • The host can program both the upper and lower limits of the window as well as the critical temperature limit. Programmable Hysteresis as well as a fault queue are available to minimize false tripping. Two pins (A0, A1) are available for address selection. The sensor powers up with default thresholds of 2°C THYST, 10°C TLOW, 64°C THIGH, and 80°C T_CRIT. The LM92's 2.7V to 5.5V supply voltage range, Serial Bus interface, 12-bit + sign output, and full-scale range of over 128°C make it ideal for a wide range of applications. These include thermal management and protection applications in personal computers, electronic test equipment, office electronics, automotive, medical and HVAC applications. Supply Voltage 2.7V to 5.5V Supply Current operating 350 μA (typ) 625 μA (max) shutdown 5 μA (typ) Temperature Accuracy – 30°C, ±0.33°C (max) – 10°C to 50°C, ±0.50°C (max) – −10°C to 85°C, ±1.0°C (max) – 125°C, ±1.25°C (max) – −25°C to 150°C, ±1.5°C (max) Linearity ±0.5°C (max) Resolution 0.0625°C 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. I C is a trademark of dcl_owner. All other trademarks are the property of their respective owners. 2 2 3 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com Simplified Block Diagram Connection Diagram SOIC See Package Number D (R-PDSO-G8) Pin Description Label Pin No. Function Typical Connection SDA 1 Serial Bi-Directional Data Line. Open Drain Output From Controller SCL 2 Serial Bus Clock Input From Controller T_CRIT_A 3 Critical Temperature Alarm Open Drain Output Pull Up Resistor, Controller Interrupt Line or System Hardware Shutdown GND 4 Power Supply Ground Ground INT 5 Interrupt Open Drain Output Pull Up Resistor, Controller Interrupt Line 8 Positive Supply Voltage Input DC Voltage from 2.7V to 5.5V User-Set Address Inputs Ground (Low, “0”) or +VS (High, “1”) +V S A0–A1 2 7,6 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Typical Application Figure 1. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) −0.3 V to 6.5V Supply Voltage −0.3 V to (+VS + 0.3V) Voltage at any Pin Input Current at any Pin Package Input Current 5 mA (2) 20 mA T_CRIT_A and INT Output Sink Current 10 mA T_CRIT_A and INT Output Voltage 6.5V −65°C to +125°C Storage Temperature ESD Susceptibility (3) Human Body Model 2500V Machine Model 250V Soldering process must comply with Reflow Temperature Profile specifications. Refer to http://www.ti.com/lit/SNOA549. (4) (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > +VS) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four. Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. Reflow temperature profiles are different for lead-free and non-lead-free packages. Operating Ratings (1) (2) Specified Temperature Range (3), TMIN to TMAX −55°C to +150°C Supply Voltage Range (+VS) (1) (2) (3) +2.7V to +5.5V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. LM92 θJA (thermal resistance, junction-to-ambient) when attached to a printed circuit board with 2 oz. foil is 200 °C/W. While the LM92 has a full-scale-range in excess of 128°C, prolonged operation at temperatures above 125 °C is not recommended. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 3 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com Electrical Characteristics Temperature-to-Digital Converter Characteristics Unless otherwise noted, these specifications apply for +VS= +2.7V to +5.5V for LM92CIM . Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ= +25°C, unless otherwise noted. Parameter Conditions Accuracy (This is a summary. For more detailed information please see (3)) Linearity ±0.33 T A = 10°C or +50°C, +VS = 3.3V to 4.0V ±0.50 T A = −10 °C or +85°C, +VS = 3.3V to 4.0V ±1.00 T A = +125°C, +VS = 4.0V ±1.25 T A = −25°C to 150°C, +VS = 4.0V ±1.50 13 0.0625 (5) Offset Error of Transfer Function Limits (2) T A = +30°C, +VS = 3.3V to 4.0V (4) Resolution Typical (1) +VS = 4.0V Offset Error of Transfer Function Supply Sensitivity 2.7V ≤ +VS< 3.6V °C/V (max) 3.6V ≤ +VS≤ 5.5V °C/V (max) 500 2 Quiescent Current °C (max) °C (max) (7) Temperature Conversion Time °C (max) Bits °C ±0.5 (6) Unit (Limit) I C Inactive 0.35 I2C Active 0.35 Shutdown Mode 5 1000 ms 0.625 mA (max) mA µA (8) (9) °C T LOW Default Temperature (9) 10 °C T HIGH Default Temperature (9) 64 °C T C Default Temperature (9) 80 °C T HYST Default Temperature (1) (2) (3) (4) (5) (6) (7) (8) (9) 2 Typical values are at TA = 25 °C and represent most likely parametric norm. Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level). The limits found in Table 1 supersede the limits shown in the Electrical Characteristics Table. The Accuracy specification includes errors due to linearity, offset and gain. The accuracy specification includes effects of self heating with negligible digital output loading. Pull-up resistors should be maximized (10k typical recommended), so that self heating due to digital output loading is negligible. Limits at intermediate temperatures can be calculated using a straight line interpolation as shown in Figure 2 and Figure 3. Linearity Error is defined as the worse case difference of an actual reading to that of a calculated reading derived from the straight line whose endpoints are measured at 30°C and 125°C for the range of 30°C to 125°C or whose endpoints are measured at 30°C and −25°C for the range of 30°C to −25°. Offset Error calibration should be done at 30°C. The residual error of the transfer function is then equivalent to the Accuracy Limit minus the Offset Limit. This does not take into account the power supply sensitivity of the offset error. Nor, does it take into account the error introduced by the calibration system used. This specification is provided only to indicate how often temperature data is updated. The LM92 can be read at any time without regard to conversion state (and will yield last conversion result). If a conversion is in process it will be interrupted and restarted after the end of the read. 12 bits + sign, two's complement Default values set at power up. Figure 2. Accuracy vs Temperature with +Vs = 5V 4 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Figure 3. Accuracy vs Temperature with +Vs = 3.3V Table 1. Temperature Accuracy Parameter Limits Conditions +VS=2.7V +VS=3.3V +VS=4V +VS=5V +VS=5.5V Unit T A = −25°C −1.35/+1.50 −1.25/+1.50 −1.25/+1.50 −1.05/+1.70 −1.05/+1.80 °C (max) T A = −10°C ±1.00 −0.90/+1.00 −0.90/+1.00 −0.70/+1.20 −0.70/+1.30 °C (max) T A = 0°C −0.80/+0.75 −0.70/+0.75 −0.70/+0.75 −0.50/+0.95 −0.50/+1.05 °C (max) T A = 10°C −0.60/+0.50 ±0.50 ±0.50 −0.30/+0.70 −0.30/+0.80 °C (max) T A = 30°C −0.43/+0.33 ±0.33 ±0.33 −0.13/+0.53 −0.13/+0.63 °C (max) T A = 50°C −0.60/+0.50 ±0.50 ±0.50 −0.30/+0.70 −0.30/+0.80 °C (max) T A = 85°C −1.10/+0.85 −1.00/+0.85 −1.00/+0.85 −0.80/+1.05 −0.80/+1.15 °C (max) T A = 125°C −1.60/+1.25 −1.50/+1.25 ±1.25 −1.05/+1.45 −1.05/+1.55 °C (max) T A = 150°C ±1.90 −1.75/+1.50 ±1.50 −1.30/+1.70 −1.30/+1.80 °C (max) Digital DC Characteristics Unless otherwise noted, these specifications apply for +VS= +2.7V to +5.5V for LM92CIM . Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ= +25 °C, unless otherwise noted. Symbol V IN(1) V IN(0) VIN(HYST) V IN(1) Parameter Conditions Typical (1) SDA and SCL Logical “1” Input Voltage SDA and SCL Logical “0” Input Voltage SDA and SCL Digital Input Hysteresis 500 A0 and A1 Logical “1” Input Voltage Limits (2) Unit (Limit) +VS × 0.7 V (min) +VS+0.3 V (max) −0.3 V (min) +VS × 0.3 V (max) 250 mV (min) 2.0 V (min) +VS+0.3 V (max) −0.3 V (min) V IN(0) A0 and A1 Logical “0” Input Voltage 0.7 V (max) I IN(1) Logical “1” Input Current V IN = + VS 0.005 1.0 µA (max) I IN(0) Logical “0” Input Current V IN = 0 V −0.005 −1.0 µA (max) C IN Capacitance of All Digital Inputs I OH High Level Output Current V OH = + VS 10 µA (max) V OL Low Level Output Voltage I OL = 3 mA 0.4 V (max) (1) (2) 20 pF Typical values are at TA = 25 °C and represent most likely parametric norm. Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level). Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 5 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com Digital DC Characteristics (continued) Unless otherwise noted, these specifications apply for +VS= +2.7V to +5.5V for LM92CIM . Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ= +25 °C, unless otherwise noted. Symbol Parameter Conditions T_CRIT_A Output Saturation Voltage Typical (1) I OUT = 4.0 mA (3) T_CRIT_A Delay t OF Limits (2) Unit (Limit) 0.8 V (max) 1 Output Fall Time C L = 400 pF Conversions (max) 250 ns (max) I O = 3 mA (3) For best accuracy, minimize output loading. 10k pull-ups resistors should be sufficient. Higher sink currents can affect sensor accuracy with internal heating. This can cause an error of 0.64 °C at full rated sink current and saturation voltage based on junction-to-ambient thermal resistance. Serial Bus Digital Switching Characteristics Unless otherwise noted, these specifications apply for +VS= +2.7V to +5.5V for LM92CIM . Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ= +25 °C, unless otherwise noted. CL (load capacitance) on output lines = 80 pF unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25 °C, unless otherwise noted. Symbol Parameter Conditions t1 SCL (Clock) Period t2 Data in Set-Up Time to SCL High t3 Data Out Stable after SCL Low t4 t5 tTIMEOUT SDA and SCL Time Low for Reset of Serial Interface Typical (1) Limits (2) 2.5 1 (1) (2) (3) (4) (3) Unit (Limit) µs(min) ms(max) 100 ns(min) 0 ns(min) SDA Low Set-Up Time to SCL Low (Start Condition) 100 ns(min) SDA High Hold Time after SCL High (Stop Condition) 100 ns(min) 75 300 ms (min) ms (max) (4) Typical values are at TA = 25 °C and represent most likely parametric norm. Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level). Timing specifications are tested at the bus input logic levels (Vin(0)=0.3xVA for a falling edge and Vin(1)=0.7xVA for a rising edge) when the SCL and SDA edge rates are similar. Holding the SDA and/or SCL lines Low for a time interval greater than tTIMEOUT will cause the LM92 to reset SCL and SDA to the IDLE state of the serial bus communication (SDA and SCL set High). Figure 4. Serial Bus Communication 6 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Figure 5. Temperature-to-Digital Transfer Function (Non-linear scale for clarity) Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 7 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com FUNCTIONAL DESCRIPTION The LM92 temperature sensor incorporates a band-gap type temperature sensor, 13-bit ADC, and a digital comparator with user-programmable upper and lower limit values. The comparator activates either the INT line for temperatures outside the TLOW and THIGH window, or the T_CRIT_A line for temperatures which exceed T_CRIT. The lines are programmable for mode and polarity. TEMPERATURE COMPARISON LM92 provides a window comparison against a lower (TLOW) and upper (THIGH) trip point. A second upper trip point (T_CRIT) functions as a critical alarm shutdown. Figure 7 depicts the comparison function as well as the modes of operation. Status Bits The internal Status bits operate as follows: “True”: Temperature above a THIGH or T_CRIT is “true” for those respective bits. A “true” for TLOW is temperature below TLOW. “False”: Assuming temperature has previously crossed above THIGH or T_CRIT, then the temperature must drop below the points corresponding THYST (THIGH − THYST or T_CRIT − THYST) in order for the condition to be false. For TLOW, assuming temperature has previously crossed below TLOW, a “false” occurs when temperature goes above TLOW + THYST. The Status bits are not affected by reads or any other actions, and always represent the state of temperature vs. setpoints. Hardwire Outputs The T_CRIT_A hardwire output mirrors the T_CRIT_A flag, when the flag is true, the T_CRIT_A output is asserted at all times regardless of mode. Reading the LM92 has no effect on the T_CRIT_A output, although the internal conversion is restarted. The behavior of the INT hardwire output is as follows: Comparator Interrupt Mode (Default): User reading part resets output until next measurement completes. If condition is still true, output is set again at end of next conversion cycle. For example, if a user never reads the part, and temperature goes below TLOW then INT becomes active. It would stay that way until temperature goes above TLOW + THYST. However if the user reads the part, the output would be reset. At the end of the next conversion cycle, if the condition is true, it is set again. If not, it remains reset. Event Interrupt Mode: User reading part resets output until next condition "event" occurs (in other words, output is only set once for a true condition, if reset by a read, it remains reset until the next triggering threshold has been crossed). Conversely, if a user never read the part, the output would stay set indefinitely after the first event that set the output. An “event” for Event Interrupt Mode is defined as: 1. Transitioning upward across a setpoint, or 2. Transitioning downward across a setpoint's corresponding hysteresis (after having exceeded that setpoint). For example, if a user never read the part, and temperature went below TLOW then INT would become active. It would stay that way forever if a user never read the part. However if the user read the part, the output would be reset. Even if the condition is true, it will remain reset. The temperature must cross above TLOW + THYST to set the output again. In either mode, reading any register in the LM92 restarts the conversion. This allows a designer to know exactly when the LM92 begins a comparison. This prevents unnecessary Interrupts just after reprogramming setpoints. Typically, system Interrupt inputs are masked prior to reprogramming trip points. By doing a read just after resetting trip points, but prior to unmasking, unexpected Interrupts are prevented. Avoid programming setpoints so close that their hysteresis values overlap. An example would be that with a THYST value of 2 °C then setting THIGH and TLOW to within 4 °C of each other will violate this restriction. To be more specific, with THYST set to 2 °C assume THIGH set to 64 °C. If TLOW is set equal to, or higher than 60 °C this restriction is violated. 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 DEFAULT SETTINGS The LM92 always powers up in a known state. LM92 power up default conditions are: 1. Comparator Interrupt Mode 2. TLOW set to 10 °C 3. THIGH set to 64 °C 4. T_CRIT set to 80 °C 5. THYST set to 2 °C 6. INT and T_CRIT_A active low 7. Pointer set to “00”; Temperature Register The LM92 registers will always reset to these default values when the power supply voltage is brought up from zero volts as the supply crosses the voltage level plotted in the following curve. The LM92 registers will reset again when the power supply drops below the voltage plotted in this curve. Figure 6. Average Power on Reset Voltage vs Temperature SERIAL BUS INTERFACE The LM92 operates as a slave on the Serial Bus, so the SCL line is an input (no clock is generated by the LM92) and the SDA line is a bi-directional serial data line. According to Serial Bus specifications, the LM92 has a 7-bit slave address. The five most significant bits of the slave address are hard wired inside the LM92 and are “10010”. The two least significant bits of the address are assigned to pins A1–A0, and are set by connecting these pins to ground for a low, (0); or to +VS for a high, (1). Therefore, the complete slave address is: 1 0 0 1 MSB 0 A1 A0 LSB Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 9 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com Note: Event Interrupt mode is drawn as if the user is reading the part. If the user doesn't read, the outputs would go low and stay that way until the LM92 is read. Comparator Interrupt Mode is drawn as if the user never reads the part. If the user does read, the outputs will go high once read instruction is executed and, if the fault condition still exists, go low at the end of the next conversion. Figure 7. Temperature Response Diagram TEMPERATURE DATA FORMAT Temperature data can be read from the Temperature and Set Point registers; and written to the Set Point registers. Temperature data can be read at any time, although reading faster than the conversion time of the LM92 will prevent data from being updated. Temperature data is represented by a 13-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.0625 °C: Table 2. Temperature Data Output Temperature Digital Output Binary 10 Hex +130°C 0 1000 0 010 0000 08 20h +125 °C 0 0111 1101 0000 07 D0h +80 °C 0 0101 0000 0000 05 00h +64 °C 0 0100 0000 0000 04 00h +25 °C 0 0001 1001 0000 01 90h +10 °C 0 0000 1010 0000 00 A0h +2 °C 0 0000 0010 0000 00 20h Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Table 2. Temperature Data Output (continued) Temperature Digital Output Binary Hex +0.0625 °C 0 0000 0000 0001 00 01h 0 °C 00 0000 0000 00 00h −0.0625 °C 1 1111 1111 1111 1F FFh −25 °C 1 1110 0111 0000 1E 70h −55 °C 1 1100 1001 0000 1C 90h SHUTDOWN MODE Shutdown mode is enabled by setting the shutdown bit in the Configuration register via the Serial Bus. Shutdown mode reduces power supply current to 5 µA typical. T_CRIT_A is reset if previously set. Since conversions are stopped during shutdown, T_CRIT_A and INT will not be operational. The Serial Bus interface remains active. Activity on the clock and data lines of the Serial Bus may slightly increase shutdown mode quiescent current. Registers can be read from and written to in shutdown mode. The LM92 takes milliseconds to respond to the shutdown command. INT AND T_CRIT_A OUTPUT The INT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A "high" level will not be observed on these pins until pull-up current is provided from some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any errors due to internal heating of the LM92. The maximum resistance of the pull up, based on LM92 specification for High Level Output Current, to provide a 2 volt high level, is 30K ohms. FAULT QUEUE A fault queue of 4 faults is provided to prevent false tripping when the LM92 is used in noisy environments. The 4 faults must occur consecutively to set flags as well as INT and T_CRIT_A outputs. The fault queue is enabled by setting bit 4 of the Configuration Register high (see CONFIGURATION REGISTER ). Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 11 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com INTERNAL REGISTER STRUCTURE Figure 8. There are four data registers in the LM92, selected by the Pointer register. At power-up the Pointer is set to “00”; the location for the Temperature Register. The Pointer register latches the last location it was set to. In Interrupt Mode, a read from the LM92 resets the INT output. Placing the device in Shutdown mode resets the INT and T_CRIT_A outputs. All registers are read and write, except the Temperature register which is read only. A write to the LM92 will always include the address byte and the Pointer byte. A write to the Configuration register requires one data byte, while the TLOW, THIGH, and T_CRIT registers require two data bytes. Reading the LM92 can take place either of two ways: If the location latched in the Pointer is correct (most of the time it is expected that the Pointer will point to the Temperature register because it will be the data most frequently read from the LM92), then the read can simply consist of an address byte, followed by retrieving the corresponding number of data bytes. If the Pointer needs to be set, then an address byte, pointer byte, repeat start, and another address byte plus required number of data bytes will accomplish a read. The first data byte is the most significant byte with most significant bit first, permitting only as much data as necessary to be read to determine the temperature condition. For instance, if the first four bits of the temperature data indicates a critical condition, the host processor could immediately take action to remedy the excessive temperature. At the end of a read, the LM92 can accept either Acknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte). An inadvertent 8-bit read from a 16-bit register, with the D7 bit low, can cause the LM92 to stop in a state where the SDA line is held low as shown in Figure 9. This can prevent any further bus communication until at least 9 additional clock cycles have occurred. Alternatively, the master can issue clock cycles until SDA goes high, at which time issuing a “Stop” condition will reset the LM92. 12 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Figure 9. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”) POINTER REGISTER (Selects which registers will be read from or written to): P7 P6 P5 P4 P3 0 0 0 0 0 P2 P1 P0 Register Select P0–P2: Register Select: P2 P1 P0 0 0 0 Temperature (Read only) (Power-up default) Register 0 0 1 Configuration (Read/Write) 0 1 0 THYST (Read/Write) 0 1 1 T_CRIT (Read/Write) 1 0 0 TLOW (Read/Write) 1 0 1 THIGH (Read/Write) 1 1 1 Manufacturer's ID P3–P7: Must be kept zero. TEMPERATURE REGISTER Table 3. (Read Only): D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 Sign MSB Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CRIT D1 D0 HIGH LOW Status Bits D0–D2: Status Bits D3–D15: Temperature Data. One LSB = 0.0625°C. Two's complement format. CONFIGURATION REGISTER Table 4. (Read/Write): D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 Fault Queue INT Polarity T_CRIT_A Polarity INT Mode Shutdown D0: Shutdown - When set to 1 the LM92 goes to low power shutdown mode. Power up default of “0”. D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is Event Interrupt mode. Power up default of “0”. D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is active high. Outputs are open-drain. Power up default of “0” D4: Fault Queue - When set to 1 the Fault Queue is enabled, see FAULT QUEUE. Power up default of “0”. D5–D7: These bits are used for production testing and must be kept zero for normal operation. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 13 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com THYST, TLOW, THIGH AND T_CRIT_A REGISTERS Table 5. (Read/Write): D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Sign MSB Bit 10 Bit 9 Bit 8 Bit7 Bit6 Bit5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 X X X D0–D2: Undefined D3–D15: THYST, TLOW, THIGH or T_CRIT Trip Temperature Data. Power up default is TLOW = 10°C, THIGH = 64°C, T_CRIT = 80°C, THYST = 2°C. THYST is subtracted from THIGH, and T_CRIT, and added to TLOW. Avoid programming setpoints so close that their hysteresis values overlap. See TEMPERATURE COMPARISON. Manufacturer's Identification Register Table 6. (Read only): D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D0–D15: Manufactures ID. 14 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 I2C TIMING DIAGRAMS Figure 10. Typical 2-Byte Read From Preset Pointer Location Such as Temp or Comparison Registers Figure 11. Typical Pointer Set Followed by Immediate Read for 2-Byte Register such as Temp or Comparison Registers Figure 12. Typical 1-Byte Read from Configuration Register with Preset Pointer Figure 13. Typical Pointer Set Followed by Immediate Read from Configuration Register Figure 14. Configuration Register Write Figure 15. Comparison Register Write Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 15 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com APPLICATION HINTS The temperature response graph in Figure 16 depicts a typical application designed to meet ACPI requirements. In this type of application, the temperature scale is given an arbitrary value of "granularity", or the window within which temperature notification events should occur. The LM92 can be programmed to the window size chosen by the designer, and will issue interrupts to the processor whenever the window limits have been crossed. The internal flags permit quick determination of whether the temperature is rising or falling. The T_CRIT limit would typically use its separate output to activate hardware shutdown circuitry separate from the processor. This is done because it is expected that if temperature has gotten this high that the processor may not be responding. The separate circuitry can then shut down the system, usually by shutting down the power supply. Note that the INT and T_CRIT_A outputs are separate, but can be wire-ORed together. Alternatively the T_CRIT_A can be diode ORed to the INT line in such a way that a T_CRIT_A event activates the INT line, but an INT event does not activate the T_CRIT_A line. This may be useful in the event that it is desirable to notify both the processor and separate T_CRIT_A shutdown circuitry of a critical temperature alarm at the same time (maybe the processor is still working and can coordinate a graceful shutdown with the separate shutdown circuit). To implement ACPI compatible sensing it is necessary to sense whenever the temperature goes outside the window, issue an interrupt, service the interrupt, and reprogram the window according to the desired granularity of the temperature scale. The reprogrammed window will now have the current temperature inside it, ready to issue an interrupt whenever the temperature deviates from the current window. To understand this graph, assume that at the left hand side the system is at some nominal temperature. For the 1st event temperature rises above the upper window limit, THIGH, causing INT to go active. The system responds to the interrupt by querying the LM92's status bits and determines that THIGH was exceeded, indicating that temperature is rising. The system then programs the temperature limits to a value higher by an amount equal to the desired granularity. Note that in Event Interrupt Mode, reprogramming the limits has caused a second, known, interrupt to be issued since temperature has been returned within the window. In Comparator Interrupt Mode, the LM92 simply stops issuing interrupts. The 2nd event is another identical rise in temperature. The 3rd event is typical of a drop in temperature. This is one of the conditions that demonstrates the power of the LM92, as the user receives notification that a lower limit is exceeded in such a way that temperature is dropping. The Critical Alarm Event activates the separate T_CRIT_A output. Typically, this would feed circuitry separate from the processor on the assumption that if the system reached this temperature, the processor might not be responding. 16 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 Note: Event Interrupt mode is drawn as if the user is reading the part. If the user doesn't read, the outputs would go low and stay that way until the LM92 is read. Figure 16. Temperature Response Diagram for ACPI Implementation Typical Applications Figure 17. Typical Application Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 17 LM92 SNIS110D – MARCH 2000 – REVISED MARCH 2013 www.ti.com Figure 18. Remote HVAC temperature sensor communicates via 3 wires, including thermostat signals Figure 19. ACPI Compatible Terminal Alarm Shutdown By powering the LM92 from auxiliary output of the power supply, a non-functioning overheated computer can be powered down to preserve as much of the system as possible. 18 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 LM92 www.ti.com SNIS110D – MARCH 2000 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 18 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM92 19 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM92CIM NRND SOIC D 8 95 Non-RoHS & Green Call TI Level-1-235C-UNLIM -55 to 150 LM92 CIM LM92CIM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -55 to 150 LM92 CIM LM92CIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -55 to 150 LM92 CIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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