LMH6551MAX

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 LMH6551 Differential, High-Speed Op Amp 1 Features • • • • • 1 3 Description The LMH6551 device is a high-performance voltage feedback differential amplifier and is part of the LMH™ integrated circuits family of devices. The LMH6551 has the high speed and low distortion necessary for driving high-performance ADCs as well as the current handling capability to drive signals over balanced transmission lines like CAT 5 data cables. The LMH6551 can handle a wide range of video and data formats. 370 MHz −3-dB Bandwidth (VOUT = 0.5 VPP) 50 MHz 0.1-dB Bandwidth 2400 V/µs Slew Rate 18 ns Settling Time to 0.05% −94/−96 dB HD2/HD3 at 5 MHz 2 Applications • • • • • • • Differential AD Driver Video Over Twisted-Pair Differential Line Driver Single End to Differential Converter High-Speed Differential Signaling IF/RF Amplifier SAW Filter Buffer/Driver With external gain set resistors, the LMH6551 can be used at any desired gain. Gain flexibility coupled with high speed makes the LMH6551 suitable for use as an IF amplifier in high-performance communications equipment. The LMH6551 is available in the space-saving SOIC and VSSOP packages. Device Information(1) PART NUMBER PACKAGE LMH6551 BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm VSSOP (8) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 4 Typical Application RF AV, RIN RS VS a VI + V RO RG + - VCM RT + RM RG IN- ADC VO IN+ RO - V RF For R M  R G : Av VO RF # VI RG RIN # 2RG (1  A v ) 2  Av DesignTarget: 1) Set RT 2) Set RM 1 1 1  RS RIN RT ||RS 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Typical Application ................................................ Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 3 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 3 3 4 4 4 6 7 9 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics: ±5 V ................................. Electrical Characteristics: 5 V (4)................................ Electrical Characteristics: 3.3 V (4)............................. Typical Performance Characteristics ........................ Detailed Description ............................................ 13 8.1 Overview ................................................................. 13 8.2 Functional Block Diagram ....................................... 13 8.3 Feature Description................................................. 13 8.4 Device Functional Modes........................................ 13 9 Application and Implementation ........................ 14 9.1 Application Information............................................ 14 9.2 Typical Applications ................................................ 14 10 Power Supply Recommendations ..................... 21 11 Layout................................................................... 22 11.1 11.2 11.3 11.4 Layout Guidelines ................................................. Layout Example .................................................... Power Dissipation ................................................. ESD Protection...................................................... 22 22 23 23 12 Device and Documentation Support ................. 24 12.1 12.2 12.3 12.4 Documentation Support ........................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 24 24 24 24 13 Mechanical, Packaging, and Orderable Information ........................................................... 24 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (March 2013) to Revision D • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 Changes from Revision B (March 2013) to Revision C • 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 22 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 6 Pin Configuration and Functions D and DGK Package 8-Pin SOIC and VSSOP Top View -IN VCM V+ +OUT 1 8 - 2 + 7 3 6 4 5 +IN NC V- -OUT Pin Functions PIN NAME NO. I/O DESCRIPTION -IN 1 I Negative Input VCM 2 I Output Common-Mode Voltage V+ 3 P Positive Supply +OUT 4 O Positive Output -OUT 5 O Negative Output V- 6 P Negative Supply NC 7 — No Connection +IN 8 I Positive Input 7 Specifications 7.1 Absolute Maximum Ratings (1) (2) (3) MAX UNIT Supply Voltage MIN 13.2 V Common-Mode Input Voltage ±Vs V 30 mA 150 °C 150 °C Maximum Input Current (pins 1, 2, 7, 8) Maximum Output Current (pins 4, 5) See (4) Maximum Junction Temperature −65 Storage Temperature, Tstg (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. For Soldering Information, see Product Folder at www.ti.com and SNOA549. The maximum output current (IOUT) is determined by device power dissipation limitations. 7.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 Machine model (MM) (1) UNIT ±2000 ±200 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 3 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com 7.3 Recommended Operating Conditions MIN Operating Temperature Range MAX UNIT −40 +125 °C 3 12 V Total Supply Voltage NOM 7.4 Thermal Information LMH6551 THERMAL METRIC (1) RθJA (1) (2) Junction-to-ambient thermal resistance (2) D DGK UNIT 8 PINS 8 PINS 150 235 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D= (TJ(MAX) — TA)/ θJA. All numbers apply for package soldered directly into a 2 layer PC board with zero air flow. 7.5 Electrical Characteristics: ±5 V (1) Single-ended in differential out, TA= 25°C, G = +1, VS = ±5 V, VCM = 0 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT AC PERFORMANCE (DIFFERENTIAL) SSBW Small Signal −3 dB Bandwidth VOUT = 0.5 VPP 370 MHz LSBW Large Signal −3 dB Bandwidth VOUT = 2 VPP 340 MHz Large Signal −3 dB Bandwidth VOUT = 4 VPP 320 MHz 0.1 dB Bandwidth VOUT = 2 VPP 50 MHz Slew Rate 4-V Step (4) 2400 V/μs Rise/Fall Time 2-V Step 1.8 ns Settling Time 2-V Step, 0.05% 18 ns VCMbypass capacitor removed 200 MHz HD2 VO = 2 VPP, f = 5 MHz, RL=800 Ω −94 dBc HD2 VO = 2 VPP, f = 20MHz, RL=800 Ω −85 dBc HD3 VO = 2 VPP, f = 5 MHz, RL=800 Ω −96 dBc HD3 VO = 2 VPP, f = 20 MHz, RL=800 Ω −72 dBc VCM PIN AC PERFORMANCE (COMMON-MODE FEEDBACK AMPLIFIER) Common-Mode Small Signal Bandwidth DISTORTION AND NOISE RESPONSE en Input Referred Voltage Noise Freq ≥ 1 MHz 6.0 nV/√Hz in Input Referred Noise Current Freq ≥ 1 MHz 1.5 pA/√Hz Differential Mode, VID = 0, VCM = 0 0.5 INPUT CHARACTERISTICS (DIFFERENTIAL) VOSD Input Offset Voltage At extreme temperatures Input Bias Current (6) -4 −2.6 Input Bias Current Average Temperature Drift (5) (1) (2) (3) (4) (5) (6) 4 mV ±6 −0.8 Input Offset Voltage Average Temperature Drift (5) IBI ±4 µV/°C 0 -10 µA nA/°C Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Typical numbers are the most likely parametric norm. Slew Rate is the average of the rising and falling edges. Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Negative input current implies current flowing out of the device. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 Electrical Characteristics: ±5 V(1) (continued) Single-ended in differential out, TA= 25°C, G = +1, VS = ±5 V, VCM = 0 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER TEST CONDITIONS Input Bias Difference Difference in Bias currents between the two inputs CMRR Common-Mode Rejection Ratio DC, VCM = 0 V, VID = 0 V RIN Input Resistance Differential CIN Input Capacitance Differential CMVR Input Common-Mode Voltage Range CMRR > 53dB MIN (2) TYP MAX (2) UNIT 0.03 µA 80 dBc 5 MΩ 1 pF +3.2 −4.7 V 72 +3.1 −4.6 (3) VCMPIN INPUT CHARACTERISTICS (COMMON-MODE FEEDBACK AMPLIFIER) VOSC Input Offset Voltage Common Mode, VID = 0 0.5 At extreme temperatures ±5 mV ±8 Input Offset Voltage Average Temperature Drift (5) 8.2 µV/°C Input Bias Current (6) −2 μA 70 75 dB 0.995 0.999 ±7.38 ±7.8 V VCM CMRR VID = 0 V, 1-V step on VCM pin, measure VOD Input Resistance Common-Mode Gain 25 ΔVO,CM/ΔVCM kΩ 1.005 V/V OUTPUT PERFORMANCE Output Voltage Swing Single-Ended, Peak to Peak At extreme temperatures ±7.18 Output Common-Mode Voltage Range VID = 0 V, ±3.69 ±3.8 V IOUT Linear Output Current VOUT = 0V ±50 ±65 mA ISC Short Circuit Current Output Shorted to Ground VIN = 3-V Single-Ended (7)l 140 mA Output Balance Error ΔVOUTCommon Mode /ΔVOUTDIfferential , VOUT = 0.5 Vpp Differential, f = 10 MHz −70 dB MISCELLANEOUS PERFORMANCE AVOL Open Loop Gain Differential 70 PSRR Power Supply Rejection Ratio DC, ΔVS = ±1 V 74 90 Supply Current RL = ∞ 11 12.5 At extreme temperatures (7) dB dB 14.5 mA 16.5 The maximum output current (IOUT) is determined by device power dissipation limitations. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 5 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com 7.6 Electrical Characteristics: 5 V (1) Single-ended in differential out, TA= 25°C, G = +1, VS = 5 V, VCM = 2.5 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT SSBW Small Signal −3 dB Bandwidth RL = 500 Ω, VOUT = 0.5 VPP 350 MHz LSBW Large Signal −3 dB Bandwidth RL = 500 Ω, VOUT = 2 VPP 300 MHz 0.1 dB Bandwidth VOUT = 2 VPP 50 MHz Slew Rate 4-V Step (4) 1800 V/μs Rise/Fall Time, 10% to 90% 4-V Step Settling Time 4-V Step, 0.05% 2 ns 17 ns 170 MHz VO = 2 VPP, f = 5 MHz, RL=800 Ω −84 dBc VO = 2 VPP, f = 20 MHz, RL=800 Ω −69 dBc VO = 2 VPP, f = 5 MHz, RL=800 Ω −93 dBc VO = 2 VPP, f = 20 MHz, RL=800 Ω −67 dBc VCM PIN AC PERFORMANCE (COMMON-MODE FEEDBACK AMPLIFIER) Common-Mode Small Signal Bandwidth DISTORTION AND NOISE RESPONSE HD2 2nd Harmonic Distortion HD2 HD3 3rd Harmonic Distortion HD3 en Input Referred Noise Voltage Freq ≥ 1 MHz 6.0 nV/√Hz in Input Referred Noise Current Freq ≥ 1 MHz 1.5 pA/√Hz INPUT CHARACTERISTICS (DIFFERENTIAL) VOSD Input Offset Voltage Differential Mode, VID = 0, VCM = 0 0.5 At extreme temperatures −0.8 CMRR VICM Input Bias Current (6) −4 Input Bias Current Average Temperature Drift (5) −3 Input Bias Current Difference Difference in Bias currents between the two inputs Common-Mode Rejection Ratio DC, VID = 0 V Input Resistance Differential Input Capacitance Differential Input Common-Mode Range CMRR > 53 dB mV ±6 Input Offset Voltage Average Temperature Drift (5) IBIAS ±4 70 +3.1 +0.4 µV/°C 0 -10 μA nA/°C 0.03 µA 78 dBc 5 MΩ 1 pF +3.2 +0.3 VCMPIN INPUT CHARACTERISTICS (COMMON-MODE FEEDBACK AMPLIFIER) Input Offset Voltage Common Mode, VID = 0 0.5 At extreme temperatures 5.8 Input Bias Current (1) (2) (3) (4) (5) (6) 6 VID = 0, 1V step on VCM pin, measure VOD Input Resistance VCM pin to ground mV ±8 Input Offset Voltage Average Temperature Drift VCM CMRR ±5 70 µV/°C 3 μA 75 dB 25 kΩ Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Typical numbers are the most likely parametric norm. Slew Rate is the average of the rising and falling edges. Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Negative input current implies current flowing out of the device. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 Electrical Characteristics: 5 V(1) (continued) Single-ended in differential out, TA= 25°C, G = +1, VS = 5 V, VCM = 2.5 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER Common-Mode Gain TEST CONDITIONS ΔVO,CM/ΔVCM MIN (2) TYP (3) MAX (2) UNIT 0.995 0.991 1.005 V/V ±2.8 V OUTPUT PERFORMANCE VOUT Output Voltage Swing Single-Ended, Peak to Peak, VS= ±2.5 V, VCM= 0 V ±2.4 IOUT Linear Output Current VOUT = 0-V Differential ±45 ISC Output Short Circuit Current Output Shorted to Ground VIN = 3-V Single-Ended (7) CMVR Output Common-Mode Voltage Range VID = 0, VCMpin = 1.2 V and 3.8 V Output Balance Error ΔVOUTCommon Mode /ΔVOUTDIfferential, VOUT = 1Vpp Differential, f = 10 MHz 3.72 1.23 ±60 mA 230 mA 3.8 1.2 V −65 dB 70 dB MISCELLANEOUS PERFORMANCE Open Loop Gain DC, Differential PSRR Power Supply Rejection Ratio DC, ΔVS = ±0.5 V 72 88 IS Supply Current RL = ∞ 10 11.5 dB 13.5 At extreme temperatures (7) mA 15.5 The maximum output current (IOUT) is determined by device power dissipation limitations. 7.7 Electrical Characteristics: 3.3 V (1) Single-ended in differential out, TA= 25°C, G = +1, VS = 3.3 V, VCM = 1.65 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT SSBW Small Signal −3 dB Bandwidth RL = 500 Ω, VOUT = 0.5 VPP 320 MHz LSBW Large Signal −3 dB Bandwidth RL = 500 Ω, VOUT = 1 VPP 300 MHz Slew Rate 1-V Step (4) 700 V/μs Rise/Fall Time, 10% to 90% 1-V Step 2 ns 95 MHz VO = 1 VPP, f = 5 MHz, RL=800 Ω −93 dBc VO = 1 VPP, f = 20 MHz, RL=800 Ω −74 dBc VO = 1 VPP, f = 5 MHz, RL=800 Ω −85 dBc VO = 1 VPP, f = 20 MHz, RL=800 Ω −69 dBc VCM PIN AC PERFORMANCE (COMMON-MODE FEEDBACK AMPLIFIER) Common-Mode Small Signal Bandwidth DISTORTION AND NOISE RESPONSE HD2 2nd Harmonic Distortion HD2 HD3 3rd Harmonic Distortion HD3 (1) (2) (3) (4) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Typical numbers are the most likely parametric norm. Slew Rate is the average of the rising and falling edges. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 7 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Electrical Characteristics: 3.3 V(1) (continued) Single-ended in differential out, TA= 25°C, G = +1, VS = 3.3 V, VCM = 1.65 V, RF = RG = 365 Ω, RL = 500 Ω; unless specified. PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT INPUT CHARACTERISTICS (DIFFERENTIAL) VOSD Input Offset Voltage Differential Mode, VID = 0, VCM = 0 1 Input Offset Voltage Average Temperature Drift (5) IBIAS CMRR VICM mV 1.6 µV/°C Input Bias Current (6) −8 μA Input Bias Current Average Temperature Drift (5) 9.5 nA/°C Input Bias Current Difference Difference in Bias currents between the two inputs 0.3 µA Common-Mode Rejection Ratio DC, VID = 0 V 78 dBc Input Resistance Differential 5 MΩ Input Capacitance Differential 1 pF Input Common-Mode Range CMRR > 53 dB +1.5 +0.3 VCMPIN INPUT CHARACTERISTICS (COMMON-MODE FEEDBACK AMPLIFIER) Input Offset Voltage Common Mode, VID = 0 1 Input Offset Voltage Average Temperature Drift 18.6 VID = 0, 1-V step on VCM pin, measure VOD Input Resistance VCM pin to ground Common-Mode Gain ΔVO,CM/ΔVCM mV µV/°C 3 μA 60 dB Input Bias Current VCM CMRR ±5 25 kΩ 0.999 V/V ±0.9 V OUTPUT PERFORMANCE VOUT Output Voltage Swing Single-Ended, Peak to Peak, VS= 3.3 V, VCM= 1.65 V ±0.75 IOUT Linear Output Current VOUT = 0-V Differential ±40 mA ISC Output Short Circuit Current Output Shorted to Ground VIN = 2-V Single-Ended (7) 200 mA CMVR Output Common-Mode Voltage Range VID = 0, VCMpin = 1.2 V and 2.1 V 2.1 1.2 V Output Balance Error ΔVOUTCommon Mode /ΔVOUTDIfferential, VOUT = 1-Vpp Differential, f = 10 MHz −65 dB dB ±30 MISCELLANEOUS PERFORMANCE Open Loop Gain DC, Differential 70 PSRR Power Supply Rejection Ratio DC, ΔVS = ±0.5 V 75 dB IS Supply Current RL = ∞ 8 mA (5) (6) (7) 8 Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Negative input current implies current flowing out of the device. The maximum output current (IOUT) is determined by device power dissipation limitations. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 7.8 Typical Performance Characteristics 2 2 1 1 0 0 -1 -1 VOD = 2 VPP -2 GAIN (dB) GAIN (dB) (TA = 25°C, VS = ±5 V, RL = 500 Ω, RF = RG = 365 Ω; Unless Specified). -3 -4 VOD = 0.5 VPP -5 -6 -3 VOD = 0.5 VPP -4 -5 -6 SINGLE ENDED INPUT VS = ±5V -7 VOD = 2 VPP -2 SINGLE ENDED INPUT VS = 5V -7 -8 -8 1 10 100 1 1000 10 FREQUENCY (MHz) 100 1000 FREQUENCY (MHz) Figure 1. Frequency Response vs Supply Voltage Figure 2. Frequency Response 70 2 1 60 GAIN (dB) -1 SUGGESTED RO (:) 0 VOD = 1 VPP -2 -3 VOD = 0.5 VPP -4 -5 -6 SINGLE ENDED INPUT VS = 3.3V -7 50 40 30 20 LOAD = 1 k: || CAP LOAD 10 VS = 5V -8 0 1 10 100 1000 10 1 FREQUENCY (MHz) Figure 3. Frequency Response vs VOUT Figure 4. Suggested ROUT vs Cap Load 0.8 2.5 2 VOUT DIFFERENTIAL (V) 0.6 VOUT DIFFERENTIAL (V) 100 CAPACITIVE LOAD (pF) 0.4 0.2 0 -0.2 -0.4 VS = 3.3V RL = 500: -0.6 RF = 360: -0.8 1.5 1 0.5 0 -0.5 -1 VS = 5V -1.5 RL = 500: -2 RF = 360: -2.5 0 5 0 10 15 20 25 30 35 40 45 50 TIME (ns) 5 10 15 20 25 30 35 40 45 50 TIME (ns) Figure 5. 1 VPP Pulse Response Single-Ended Input Figure 6. 2 VPP Pulse Response Single-Ended Input Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 9 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Typical Performance Characteristics (continued) (TA = 25°C, VS = ±5 V, RL = 500 Ω, RF = RG = 365 Ω; Unless Specified). 3 0.12 VS = ±5V 0.1 COMMON MODE VOUT (V) VOUT DIFFERENTIAL (V) 2 1 0 -1 VS = ±5V RL = 500: -2 RF = 360: RL = 500: 0.08 RF = 360: 0.06 VOUT = 4 VPP 0.04 0.02 0 -0.02 -0.04 -0.06 -3 -0.08 0 5 0 10 15 20 25 30 35 40 45 50 5 10 15 20 25 30 35 40 45 50 TIME (ns) TIME (ns) Figure 7. Large Signal Pulse Response Figure 8. Output Common-Mode Pulse Response -50 -50 VS = ±5V VS = 5V HD3 DISTORTION (dBc) DISTORTION (dBc) -60 RL = 800: -70 HD3 VOUT = 2 VPP -60 VOUT = 2 VPP VCM = 0V -80 -90 HD2 VCM = 2.5V RL = 800: -70 -80 HD2 -90 -100 -100 -110 0 5 10 15 20 25 30 35 0 40 5 10 15 20 30 35 40 FREQUENCY (MHz) FREQUENCY (MHz) Figure 10. Distortion vs Frequency Figure 9. Distortion vs Frequency -30 -50 VOUT = 2 VPP f = 5 MHz VS = 3.3V VOUT = 1 VPP -60 HD3 -40 VCM = VS/2 VCM = 1.65V DISTORTION (dBc) DISTORTION (dBc) 25 RL = 800: -70 -80 HD2 -50 -60 -70 HD3 -80 -90 -90 HD2 -100 -100 0 5 10 15 20 25 30 35 3 40 Figure 11. Distortion vs Frequency 10 4 5 6 SUPPLY VOLTAGE (V) FREQUENCY (MHz) Figure 12. Distortion vs Supply Voltage (Split Supplies) Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 Typical Performance Characteristics (continued) (TA = 25°C, VS = ±5 V, RL = 500 Ω, RF = RG = 365 Ω; Unless Specified). 4 -65 VOUT = 4 VPP f = 5 MHz 3.9 3.8 -70 VCM = 0V 3.7 MAXIMUM VOUT (V) DISTORTION (dBc) -60 HD3 -75 -80 -85 HD2 -90 3.6 3.5 3.4 VIN = 3.88V SINGLE ENDED 3.3 VS = ±5V 3.2 -95 AV = 2 3.1 -100 RF = 730: 3 6 7 8 10 9 11 12 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 SUPPLY VOLTAGE (V) OUTPUT CURRENT (mA) Figure 13. Distortion vs Supply Voltage (Single Supply) Figure 14. Maximum VOUT vs IOUT 100 -3 VIN = 3.88V SINGLE ENDED VS = ±5V VIN = 0V VS = ±5V -3.2 AV = 2 -3.3 RF = 730: 10 -3.4 |Z| (:) MINIMUM VOUT (V) -3.1 -3.5 1 -3.6 -3.7 0.1 -3.8 -3.9 0.01 -4 0.01 10 20 30 40 50 60 70 80 90 100 0 10 100 1000 FREQUENCY (MHz) Figure 15. Minimum VOUT vs IOUT Figure 16. Closed-Loop Output Impedance 100 100 VS = 5V VS = 3.3V VIN = 0V VIN = 0V 10 |Z| (:) 10 |Z| (:) 1 0.1 OUTPUT CURRENT (mA) 1 1 0.1 0.1 0.01 0.01 0.01 0.1 1 10 100 0.01 1000 0.1 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 17. Closed-Loop Output Impedance Figure 18. Closed-Loop Output Impedance Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 11 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Typical Performance Characteristics (continued) (TA = 25°C, VS = ±5 V, RL = 500 Ω, RF = RG = 365 Ω; Unless Specified). 100 100 90 PSRR + PSRR (dBc DIFFERENTIAL) PSRR (dBc DIFFERENTIAL) 90 80 70 60 PSRR 50 40 30 VS = ±5V 20 RL = 200: 10 VCM = 0V 0 0.01 10 1 0.1 100 80 70 60 50 40 30 VS = +5V 20 RL = 200: 10 VCM = 2.5V 0 0.01 1000 FREQUENCY (MHz) 1 0.1 Figure 19. PSRR VS = ±5V -30 BALANCE ERROR (dBc) 70 CMRR (dB) 1000 -25 75 65 60 55 50 VIN, CM = 0.5 VPP 0.1 1 RF = 360: -35 -40 -45 -50 RL = 500: VIN = 0.5 VPP -55 -60 -65 -70 -75 -80 -85 -90 VS = ±5V 40 12 100 Figure 20. PSRR 80 45 10 FREQUENCY (MHz) 10 100 1000 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 21. CMRR Figure 22. Balance Error Submit Documentation Feedback 1000 Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 8 Detailed Description 8.1 Overview The LMH6551 is a fully differential amplifier designed to provide low distortion amplification to wide bandwidth differential signals. The LMH6551, though fully integrated for ultimate balance and distortion performance, functionally provides three channels. Two of these channels are the V+ and V− signal path channels, which function similarly to inverting mode operational amplifiers and are the primary signal paths. The third channel is the common-mode feedback circuit. This is the circuit that sets the output common mode as well as driving the V+ and V− outputs to be equal magnitude and opposite phase, even when only one of the two input channels is driven. The common-mode feedback circuit allows single-ended to differential operation. 8.2 Functional Block Diagram V+ +OUT -IN ± 2.5 k High-Aol + Differential I/O Amplifier ± +IN 2.5 k + -OUT V+ 50 k ± Vcm Error Amplifier + Vcm 50 k V± 8.3 Feature Description The LMH6551 combines a core differential I/O, high-gain block with an output common-mode sense that is compared to a reference voltage and then fed back into the main amplifier block to control the average output to that reference. The differential I/O block is a classic, high open-loop gain stage. The high-speed differential outputs include an internal averaging resistor network to sense the output common-mode voltage. This voltage is compared by a separate VCM error amplifier to the voltage on the VOCM pin. If floated, this reference is at half the total supply voltage across the device using two 50-kΩ resistors. This VCM error amplifier transmits a correction signal into the main amplifier to force the output average voltage to meet the target voltage on the VOCM pin. 8.4 Device Functional Modes This wideband FDA requires external resistors for correct signal-path operation. When configured for the desired input impedance and gain setting with these external resistors, the amplifier can be either on with the PD pin asserted to a voltage greater than Vs– + 1.7 V, or turned off by asserting PD low. Disabling the amplifier shuts off the quiescent current and stops correct amplifier operation. The signal path is still present for the source signal through the external resistors. The VOCM control pin sets the output average voltage. Left open, VOCM defaults to an internal midsupply value. Driving this high-impedance input with a voltage reference within its valid range sets a target for the internal VCM error amplifier. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 13 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The LMH6551 is a fully differential amplifier designed to provide low distortion amplification to wide bandwidth differential signals. The LMH6551, though fully integrated for ultimate balance and distortion performance, functionally provides three channels. Two of these channels are the V+ and V− signal path channels, which function similarly to inverting mode operational amplifiers and are the primary signal paths. The third channel is the common-mode feedback circuit. This is the circuit that sets the output common mode as well as driving the V+ and V− outputs to be equal magnitude and opposite phase, even when only one of the two input channels is driven. The common-mode feedback circuit allows single-ended to differential operation. The LMH6551 is a voltage feedback amplifier with gain set by external resistors. Output common-mode voltage is set by the VCM pin. This pin should be driven by a low impedance reference and should be bypassed to ground with a 0.1 µF ceramic capacitor. Any signal coupling into the VCM will be passed along to the output and will reduce the dynamic range of the amplifier. 9.2 Typical Applications 9.2.1 Typical Fully Differential Application RF1 RO RG1 + VI a CL VCM RL VO RG2 RO RF2 Figure 23. Typical Fully Differential Application Schematic 9.2.1.1 Design Requirements Applications using fully differential amplifiers have several requirements. The main requirements are high linearity and good signal amplitude. Linearity is accomplished by using well matched feedback and gain set resistors as well as an appropriate supply voltage. The signal amplitude can be tailored by using an appropriate gain. In this design, the gain is set for a gain of 2 (Rf=500/ RG=250) and the distortion criteria is better than -90 dBc at a frequency of 5 Mhz for HD2 and HD3. The supply voltage is set for ±5 V and the output common mode is 0 V. 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Fully Differential Operation The LMH6551 will perform best when used with split supplies and in a fully differential configuration. See Figure 23 and Figure 24 for recommend circuits. 14 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 Typical Applications (continued) The circuit shown in Figure 23 is a typical fully differential application as might be used to drive an ADC. In this circuit closed loop gain, (AV) = VOUT/ VIN = RF/RG. For all the applications in this data sheet VIN is presumed to be the voltage presented to the circuit by the signal source. For differential signals this will be the difference of the signals on each input (which will be double the magnitude of each individual signal), while in single-ended inputs it will just be the driven input signal. The resistors RO help keep the amplifier stable when presented with a load CL as is typical in an analog to digital converter (ADC). When fed with a differential signal, the LMH6551 provides excellent distortion, balance and common-mode rejection provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. With a DC CMRR of over 80dB, the DC and low frequency CMRR of most circuits will be dominated by the external resistors and board trace resistance. At higher frequencies board layout symmetry becomes a factor as well. Precision resistors of at least 0.1% accuracy are recommended and careful board layout will also be required. 500 50: 100: TWISTED PAIR 250 + 2 VPP a VCM 250 2 VPP 50: 500 GAIN = 2 Figure 24. Fully Differential Cable Driver With up to 15 VPP differential output voltage swing and 80 mA of linear drive current the LMH6551 makes an excellent cable driver as shown in Figure 24. The LMH6551 is also suitable for driving differential cables from a single-ended source. The LMH6551 requires supply bypassing capacitors as shown in Figure 25 and Figure 26. The 0.01 µF and 0.1 µF capacitors should be leadless SMT ceramic capacitors and should be no more than 3 mm from the supply pins. The SMT capacitors should be connected directly to a ground plane. Thin traces or small vias will reduce the effectiveness of bypass capacitors. Also shown in both figures is a capacitor from the VCM pin to ground. The VCM pin is a high impedance input to a buffer which sets the output common-mode voltage. Any noise on this input is transferred directly to the output. Output common-mode noise will result in loss of dynamic range, degraded CMRR, degraded Balance and higher distortion. The VCM pin should be bypassed even if the pin in not used. There is an internal resistive divider on chip to set the output common-mode voltage to the mid point of the supply pins. The impedance looking into this pin is approximately 25 kΩ. If a different output common-mode voltage is desired drive this pin with a clean, accurate voltage reference. Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 15 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Typical Applications (continued) + V V + 0.01 PF 0.01 PF 10 PF 10 PF 0.01 PF + + VCM 0.1 PF VCM - 0.1 PF 0.1 PF 0.01 PF 10 PF V - Figure 25. Split Supply Bypassing Capacitors Figure 26. Single Supply Bypassing Capacitors 9.2.1.2.2 Capacitive Drive As noted in Driving Analog-to-Digital Converters, capacitive loads should be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500 Ω or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000 Ω or higher. If driving a transmission line, such as 50-Ω coaxial or 100-Ω twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance. For other applications see Figure 28 and Figure 4 in Typical Performance Characteristics. 9.2.1.3 Application Curves Many application circuits will have capacitive loading. As shown in Figure 4, amplifier bandwidth is reduced with increasing capacitive load, so parasitic capacitance should be strictly limited. In order to guarantee stability resistance should be added between the capacitive load and the amplifier output pins. The value of the resistor is dependent on the amount of capacitive load as shown in Figure 5. This resistive value is a suggestion. System testing will be required to determine the optimal value. Using a smaller resistor will retain more system bandwidth at the expense of overshoot and ringing, while larger values of resistance will reduce overshoot but will also reduce system bandwidth. 70 2 1 CL = 5.7 pF, ROUT = 60: VS = ±5V 60 -1 CL = 10 pF, ROUT = 34: -2 CL = 27 pF, ROUT = 20: -3 -4 SUGGESTED RO (:) GAIN (dB) 0 CL = 57 pF, ROUT = 15: -5 LOAD = (CL || 1 k:) IN 50 40 30 20 -6 SERIES WITH 2 ROUTS -7 VOUT = 0.5 VPP DIFFERENTIAL -8 1 10 VS = ±5V 100 1000 FREQUENCY (MHz) 0 1 10 100 CAPACITIVE LOAD (pF) Figure 27. Frequency Response vs Capacitive Load 16 LOAD = 1 k: || CAP LOAD 10 Submit Documentation Feedback Figure 28. Suggested ROUT vs Cap Load Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 LMH6551 www.ti.com SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 Typical Applications (continued) 9.2.2 Single-Ended Input to Differential Output The LMH6551 provides excellent performance as an active balun transformer. Figure 29 shows a typical application where an LMH6551 is used to produce a differential signal from a single-ended source. In single-ended input operation the output common-mode voltage is set by the VCM pin as in fully differential mode. Also, in this mode the common-mode feedback circuit must recreate the signal that is not present on the unused differential input pin. Figure 22 is the measurement of the effectiveness of this process. The commonmode feedback circuit is responsible for ensuring balanced output with a single-ended input. Balance error is defined as the amount of input signal that couples into the output common mode. It is measured as the undesired output common-mode swing divided by the signal on the input. Balance error can be caused by either a channel to channel gain error, or phase error. Either condition will produce a common-mode shift. Figure 22 measures the balance error with a single-ended input as that is the most demanding mode of operation for the amplifier. Supply and VCM pin bypassing are also critical in this mode of operation. See the above section on Fully Differential Operation for bypassing recommendations and also see Figure 25 and Figure 26 for recommended supply bypassing configurations. RF AV, RIN RS VS a VI + V RG VI2 RG +- RO VO1 + - VCM RT RM VI1 IN- VO + - VO2 ADC IN+ RO - V RF Conditions : RS RT ||RIN RM Av RIN VOCM VICM RT || RS Definitions : RG 1 RG  RF RG  RM 2 RG  RM  RF VO VI 2(1  1 5F # for RM  RG 1  2 5G  RG (1  2 ) 2RG  RM (1  2  5G   $ v  1 for RM  RG # 1  2   2   $v VO1  VO2 VCM (by design) 2 V VI1  VI2 VOCM.2 # OCM IRU5M   5G  2 1 A v Figure 29. Single-Ended In to Differential Out Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: LMH6551 17 LMH6551 SNOSAK7D – FEBRUARY 2005 – REVISED JANUARY 2015 www.ti.com Typical Applications (continued) 9.2.3 Single Supply Operation The input stage of the LMH6551 has a built in offset of 0.7 V towards the lower supply to accommodate single supply operation with single-ended inputs. As shown in Figure 29, the input common-mode voltage is less than the output common voltage. It is set by current flowing through the feedback network from the device output. The input common-mode range of 0.4 V to 3.2 V places constraints on gain settings. Possible solutions to this limitation include AC coupling the input signal, using split power supplies and limiting stage gain. AC coupling with single supply is shown in Figure 30. In Figure 29 closed loop gain = VO / VI ≊ RF / RG, where VI =VS / 2, as long as RM