LMH6586EVAL/NOPB

User’s Guide April 25, 2012 LMH6586 User’s Guide LIST OF FIGURES ............................................................................................................. 1 LIST OF TABLES ............................................................................................................... 1 1. INTRODUCTION ......................................................................................................... 1 2. SETUP ......................................................................................................................... 2 3. BOARD LAYOUT ........................................................................................................ 7 4. SCHEMATIC AND BILL OF MATERIALS (BOM) ...................................................... 8 EVALUATION BOARD/KIT/MODULE (EVM).................................................................. 14 LIST OF FIGURES Figure 1: LMH6586 EVAL Board Connection Block Diagram ...................................................................................... 2 Figure 2: LMH6586 Interface Harness .......................................................................................................................... 2 Figure 3: Input Circuit Schematic .................................................................................................................................. 3 Figure 4: Output Circuit Schematic ............................................................................................................................... 3 Figure 5: Clamp Enable Circuit ..................................................................................................................................... 4 Figure 6: Sync Detect Threshold Circuit ....................................................................................................................... 5 Figure 7: Video Detect FLAG Circuit ............................................................................................................................ 6 Figure 8: LMH6586 Layout Top Layer .......................................................................................................................... 7 Figure 9: LMH6586 Board Layout Bottom Layer .......................................................................................................... 7 Figure 10: LMH6586 Board Schematic ......................................................................................................................... 8 LIST OF TABLES Table 1: Jumper Settings .............................................................................................................................................. 4 Table 2: Device Address Jumper Settings .................................................................................................................... 4 Table 3: LMH6586 EVAL Board BOM .......................................................................................................................... 9 1. Introduction The LMH6586 evaluation board is designed by Texas Instruments to demonstrate the performance of the LMH6586 32x16 video Crosspoint switch. The board provides BNC connectors for 1/2 of the inputs and outputs (VIN0 - VIN31 (16 inputs), and OUT0 - OUT16 (8+1 outputs), even numbered channels only), potentiometers to adjust the clamp reference voltage and the sync detect threshold voltage. On-board jumpers allow the user to control the gain setting for the LMH6586 and to define logic inputs for device reset, power save and device address. April 2012 LMH6586EVM User’s Guide 1 Setup 2. Setup A USB Interface board (supplied), plugs into the evaluation board providing a graphical user interface (GUI) with a PC to program the LMH6586’s internal registers via I2C protocol. Figure 1 shows the connections between the PC, USB Interface board, and LMH6586 EVAL board. Figure 2 is the drawing for the harness that connects the LMH6586 EVAL board to the USB Interface board. PC (running the “CCTV I2C Interface” software) Lab Power Supply GND 5V USB Cable (Supplied) 3/ Interface Harness (Supplied) J50 GND SCL SDA USB Interface bd (Supplied) X4 Connector LMH6586 EVAL bd (Supplied) Note: J50 pin 1 (GND) designated with white marking Figure 1: LMH6586 EVAL Board Connection Block Diagram Figure 2: LMH6586 Interface Harness 2 LMH6586EVM User’s Guide April 2012 Setup Power Supplies The evaluation board requires a 5V power supply (0.5A capability or higher) and a ground connection to power the device. Video Inputs and Outputs The evaluation board is populated with 16 BNC connectors for 1/2 the 32 inputs from VIN0 – VIN31 and 8 BNC connectors for 1/2 the 16 outputs from OUT0 – OUT15. There is an additional BNC connector coming from OUT16 of the LMH6586 which can be given to an external sync separator such as the LMH1980. The inputs to the LMH6586 are AC coupled through a 0.01uF capacitor. Since the inputs are AC coupled, the CLAMP EN jumper (JP4) should be shorted to enable the clamp voltage for DC restoration. The LMH6586 can accept input video signals in the range of 0V to 1.5V. The input circuit for each input is shown below. Figure 3: Input Circuit Schematic Note: Protection diode D10 not installed but can be added for extra protection in case of overvoltage The LMH6586 can provide output signals in the range of 0V to 3V depending on the gain setting determined by the GAIN jumper (JP3). The output circuit for each output is shown below. Figure 4: Output Circuit Schematic April 2012 snou002 3 Setup Jumper Settings JUMPER JP1 POSITION OPEN SHORTED JP2 OPEN SHORTED OPEN SHORTED OPEN SHORTED OPEN SHORTED JP3 JP4 JP5 FUNCTION DVDD not connected to +5V DVDD connected to external +5V supply LMH6586 is active LMH6586 is in power save mode LMH6586 gain is set to 1V/V LMH6586 gain is set to 2V/V Clamp is disabled Clamp is enabled LMH6586 is active LMH6586 is reset Table 1: Jumper Settings JP7 (ADDR SEL 1) OPEN OPEN SHORTED SHORTED JP6 (ADDR SEL 0) OPEN SHORTED OPEN SHORTED FUNCTION Device address set to 00 Device address set to 01 Device address set to 10 Device address set to 11 Table 2: Device Address Jumper Settings Clamp Enable Feature When jumper JP4 is shorted, the clamp enable feature of the LMH6586 is enabled. Since the inputs to the LMH6586 are AC coupled, DC restoration is required. This is accomplished using the clamp enable feature. The clamp enable feature clamps the sync tip of the input signal to the set level. The clamp voltage is set at the VCLAMP pin (PIN 66) using potentiometer R73. The clamp voltage can be measured at TP36. For optimum performance the clamp voltage should be fixed at 0.3V. The clamp enable circuit is shown below. Figure 5: Clamp Enable Circuit 4 LMH6586EVM User’s Guide April 2012 Setup Video Detect The LMH6586 can be setup to detect the presence or absence of video on each input by setting the appropriate bits in the video detect enable register and the video detect invert register for the respective inputs. The video detect threshold can be adjusted to eight different levels with a 3 bit programmable register. Each of the 32 video input channels can be configured individually to detect video or the loss of video using the accompanying software provided. The software is also used to set up the appropriate video detect threshold level. The default video detect level at power on is blacker than black. So at power On, the video detect level should be adjusted to a suitable value. Sync Detect The LMH6586 can be setup to detect the loss of sync by setting the appropriate bits in the sync detect enable register for the respective inputs. The sync detect threshold level is adjusted using the potentiometer R120 connected to the SSR pin (PIN 65). The sync detect threshold voltage can be measured at TP84. For optimum performance the sync detect threshold voltage should be adjusted to 0.35V. The sync detect threshold circuit is shown below. Figure 6: Sync Detect Threshold Circuit External Video Detect FLAG When there is a loss of sync or video (or a “presence” of video, depending on the setting of the respective bits in the video detect invert register) on any one of the 32 inputs, an external flag (PIN 75) is asserted and the two color video detect LED D34 glows red. Under normal operation D34 is green. The video detect flag circuit is shown below. April 2012 snou002 5 Setup Figure 7: Video Detect FLAG Circuit Individual Channel Power Save Each input and each output channel of the LMH6586 can be individually placed in power save mode by programming the appropriate bits in the registers 0x18h – 0x1Bh for the inputs and the registers 0x1Eh – 0x1Fh for the outputs. The accompanying software is used for this programming. 6 LMH6586EVM User’s Guide April 2012 3. Board Layout Figure 8: LMH6586 Layout Top Layer Figure 9: LMH6586 Board Layout Bottom Layer April 2012 snou002 7 Schematic 4. Schematic and Bill of Materials (BOM) Figure 10: LMH6586 Board Schematic Notes: 1. R77 is 1kohm. 2. Not all Input / Output BNC’s shown are installed. 3. Input protection diodes D1-D32 ( not installed. 8 LMH6586EVM User’s Guide April 2012 Part Type 2 pin header 2 pin shorting shunt BANANA Jack CAPACITOR, 100nF, X7R, 25V, 0805 CAPACITOR, 100nF, X7R, 25V, 0603 CAPACITOR, 10nF, X7R, 25V, 0603 RESISTOR, 2K, 1%, 0805 CAPACITOR, 4.7uF, TANT, SIZE A RESISTOR, 10K, 1%, 0603 RESISTOR, 10K, 1%, 0805 RESISTOR, 33ohm, 1%, 0805 RESISTOR, 1K, 1%, 0805 CAPACITOR, 47pF, NPO, 50V, 0805 74HC05 RESISTOR, 75, 1%, 0805 RESISTOR, 100, 1%, 0603 RESISTOR, 100, 1%, 0805 RESISTOR, 110, 1%, 0805 RESISTOR, 110K, 1%, 0805 RESISTOR, 220, 1%, 0805 EDGE MOUNT BNC LMH6586 MMBD4148SE 3 PIN HEADER 2 PIN HEADER RED / GREEN LED RED LED GREEN LED 5K POT NOT STUFFED Part Designator JP1-JP7 JP1-JP7 J51, J52 QTY 7 7 2 PART # WM6502-ND A26227-ND 575-8K-ND C45 1 PCC1828CT-ND C33-42, C44, C47 12 PCC2277CT-ND C1-C32 R71, R72 C48-C55 R74 R49, R50, R75, R76, R78 R33-R48, R51-R57, R62-R70 R77 32 2 8 1 5 32 1 PCC1763CT-ND P2.00KCCT-ND 495-2197-1-ND RHM10.0KHCT-ND P10.0KCCT-ND P33.0CCT-ND P1.00KCCT-ND C43, C46 U2 R1-R32, R79-R87, R96-R102, R118 R61 R58-R60 R111, R117 R112, R113 R114-R116 J2, J4, J6, J8, J10, J12, J14, J16, J18, J20, J22, J24, J26, J28, J30, J31, J33, J35, J37, J39, J41, J43, J45, J48, J49 U1 2 1 PCC470CGCT-ND 296-1190-5-ND 49 1 3 2 2 3 P75.0CCT-ND P100HCT-ND P100CCT-ND P110CCT-ND P110KCCT-ND P220CCT-ND 25 1 32 1 7 1 1 1 2 1097-1139-ND LMH6586 MMBD4148SECTND WM6503-ND WM6502-ND 754-1232-ND P559-ND P560-ND 3299Y-502LF-ND N/A - D1- D32 (not installed) J50 JP1-JP7 D34 D35 D36 R73, R120 R88-R95, R107, R108, R103R106, R109, R110, R119 Table 3: LMH6586 EVAL Board BOM April 2012 snou002 9 EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/ kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. 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Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. Important Notice for Users of this Product in Japan】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan! 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