LMV301MGX

LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 LMV301 Low Input Bias Current, 1.8V Op Amp w/ Rail-to-Rail Output Check for Samples: LMV301 FEATURES DESCRIPTION • • • • • The LMV301 CMOS operational amplifier is ideal for single supply, low voltage operation with an ensured operating voltage range from 1.8V to 5V. The low input bias current of less than 0.182pA typical, eliminates input voltage errors that may originate from small input signals. This makes the LMV301 ideal for electrometer applications requiring low input leakage such as sensitive photodetection transimpedance amplifiers and sensor amplifiers. The LMV301 also features a rail-to-rail output voltage swing in addition to a input common-mode range that includes ground. The LMV301 will drive a 600Ω resistive load and up to 1000pF capacitive load in unity gain follower applications. The low supply voltage also makes the LMV301 well suited for portable two-cell battery systems and single cell Li-Ion systems. 1 2 • • • Input Bias Current: 0.182 pA Gain Bandwidth Product: 1 MHz Supply Voltage at 1.8V: 1.8 to 5 V Supply Current: 150 µA Input Referred Voltage Noise at 1kHz: 40nV/√Hz DC Gain (600Ω Load): 100 dB Output Voltage Range at 1.8V: 0.024 to 1.77 V Input Common-Mode Voltage Range: −0.3 to ±1.2 V APPLICATIONS • • • • • Thermocouple Amplifiers Photo Current Amplifiers Transducer Amplifiers Sample and Hold Circuits Low Frequency Active Filters Connection Diagram The LMV301 exhibits excellent speed-power ratio, achieving 1MHz at unity gain with low supply current. The high DC gain of 100dB makes it ideal for other low frequency applications. The LMV301 is offered in a space saving SC70 package, which is only 2.0X2.1X1.0mm. It is also similar to the LMV321 except the LMV301 has a CMOS input. Applications Circuit Top View Figure 2. Low Leakage Sample and Hold Figure 1. SC70-5 Package See Package Number DCK0005A These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Absolute Maximum Ratings (1) (2) Machine Model ESD Tolerance (3) 200V Human Body Model 2000V Differential Input Voltage ±Supply Voltage Supply Voltage (V+ - V−) 5.5V + (4) Output Short Circuit to V Output Short Circuit to V− (4) −65°C to 150°C Storage Temperature Range Mounting Temperature Infrared or Convection (20 sec) 235°C Junction Temperature (5) (1) (2) (3) (4) (5) 150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. Human body model, 1.5kΩ in series with 100pF. Machine model, 200Ω in series with 100pF. Applies to both single supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect reliability. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)θJA. All numbers apply for packages soldered directly into a PC board. Operating Ratings (1) Supply Voltage 1.8V to 5.0V −40°C ≤ TJ ≤ +85°C Temperature Range Thermal Resistance (θJA) (1) 2 Ultra Tiny SC70-5 Package 5-pin Surface Mount 478°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 1.8V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 1.8V, V− = 0V, VCM = V+/2, VO = V+/2, and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Min (1) Test Conditions + − VCM = 0.4V, V = 1.3V, = V = −0.5V Typ (2) Max (1) Units 0.9 8 9 mV 0.182 35 50 pA 150 250 275 µA VOS Input Offset Voltage IB Input Bias Current IS Supply Current VCM = 0.4V, V+ = 1.3V, = V− = −0.5V CMRR Common Mode Rejection Ratio 0.3V ≤ VCM ≤ 0.9V 62 60 108 dB PSRR Power Supply Rejection Ratio 1.8V ≤ V+ ≤ 5V, 0.9 ≤ VCM ≤ 2.5V 67 62 110 dB VCM Input Common-Mode Voltage Range For CMRR ≥ 50dB AV Large Signal Voltage Gain Sourcing RL = 600Ω to 0V, V+ = 1.2V, V− = −0.6V, VO = −0.2V to 0.8V, VCM = 0V 80 75 119 RL = 2kΩ to 0V, V+ = 1.2V, V− = −0.6V, VO = −0.2V to 0.8V, VCM = 0V 80 75 111 RL = 600Ω to 0V, V+ = 1.2V, V− = −0.6V, VO = −0.2V to 0.8V, VCM = 0V 80 75 94 RL = 2kΩ to 0V, V+ = 1.2V, V− = −0.6V, VO = −0.2V to 0.8V, VCM = 0V 80 75 96 1.65 1.63 1.72 Sinking VO Output Swing RL = 600Ω to 0.9V VIN = ±100mV −0.3 0 VOH VOL RL = 2kΩ to 0.9V VIN = ±100mV VOH 0.074 1.75 1.74 VOL IO Output Short Circuit Current Sourcing, VO = 0V, VIN = 100mV Sinking, VO = 1.8V, VIN = −100mV (1) (2) 0.6 V dB dB V 0.100 V 1.77 0.024 V 0.035 0.040 V 4 3.3 8.4 mA 7 9.8 mA All limits are ensured by testing or statistical analysis. Typical value represent the most likely parametric norm. 1.8V AC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 1.8V, V− = 0V, VCM = V+/2, VO = V+/2, and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Test Conditions Typ (1) Units SR Slew Rate 0.57 V/µs GBW Gain Bandwidth Product 1 MHz φm Phase Margin 60 Deg Gm Gain Margin en Input-Referred Voltage Noise f = 1kHz, VCM = 0.5V f = 100kHz THD Total Harmonic Distortion f = 1kHz, AV = +1 RL = 600kΩ, VIN = 1VPP (1) (2) See (2) 10 dB 40 30 nV/√Hz 0.089 % Typical value represent the most likely parametric norm. V+ = 5V. Connected as voltage follower with 5V step input. Number specified is the slower of the positive and negative slew rates. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 3 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com 2.7V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2, and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Min (1) Test Conditions − + VCM = 0.35V, V = 1.7V, V = −1V Typ (2) Max (1) Units 0.9 8 9 mV 0.182 35 50 pA 153 250 275 µA VOS Input Offset Voltage IB Input Bias Current IS Supply Current VCM = 0.35V, V+ = 1.7V, V− = −1V CMRR Common Mode Rejection Ratio −0.15V ≤ VCM ≤ 1.35V 62 60 115 dB PSRR Power Supply Rejection Ratio 1.8V ≤ V+ ≤ 5V 67 62 110 dB VCM Input Common-Mode Voltage Range For CMRR ≥ 50dB AV Large Signal Voltage Gain Sourcing RL = 600Ω to 0V, V+ = 1.35V, V− = −1.35V, VO = −1V to 1V, VCM = 0V 80 75 100 RL = 2kΩ to 0V, V+ = 1.35V, V− = −1.35V, VO = −1V to 1V, VCM = 0V 83 77 114 RL = 600Ω to 0V, V+ = 1.35V, V− = −1.35V, VO = −1V to 1V, VCM = 0V 80 75 98 RL = 2kΩ to 0V, V+ = 1.35V, V− = −1.35V, VO = −1V to 1V, VCM = 0V 80 75 99 2.550 2.530 2.62 Sinking VO Output Swing −0.3 0 RL = 600Ω to 1.35V VIN = ±100mV VOH VOL RL = 2kΩ to 1.35V VIN = ±100mV VOH 0.078 2.650 2.640 VOL IO (1) (2) Output Short Circuit Current 1.5 V dB dB V 0.100 V 2.675 0.024 V 0.045 V Sourcing, VO = 0V, VIN = 100mV 20 15 32 mA Sinking, VO = 2.7V, VIN = −100mV 19 12 24 mA All limits are ensured by testing or statistical analysis. Typical value represent the most likely parametric norm. 2.7V AC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 2.7V, V− = 0V, VCM = 1.0V, VO = 1.35V and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Test Conditions See (2) Typ (1) Units 0.60 V/µs SR Slew Rate GBW Gain Bandwidth Product 1 MHz φm Phase Margin 65 Deg Gm Gain Margin 10 dB en Input-Referred Voltage Noise f = 1kHz, VCM = 0.5V f = 100kHz 40 30 nV/√Hz THD Total Harmonic Distortion f = 1kHz, AV = +1 RL = 600kΩ, VIN = 1VPP 0.077 % (1) (2) 4 Typical value represent the most likely parametric norm. V+ = 5V. Connected as voltage follower with 5V step input. Number specified is the slower of the positive and negative slew rates. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 5V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2, and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Min (1) Test Conditions + − VCM = 0.5V, V = 3V, V = −2V Typ (2) Max (1) Units 0.9 8 9 mV 0.182 35 50 pA 163 260 285 µA VOS Input Offset Voltage IB Input Bias Current IS Supply Current VCM = 0.5V, V+ = 3V, V− = −2V CMRR Common Mode Rejection Ratio −1.3V ≤ VCM ≤ 2.5V 62 61 111 dB PSRR Power Supply Rejection Ratio 1.8V ≤ V+ ≤ 5V 67 62 110 dB VCM Input Common-Mode Voltage Range For CMRR ≥ 50dB AV Large Signal Voltage Gain Sourcing RL = 600Ω to 0V, V+ = 2.5V, V− = −2.5V, VO = −2V to 2V, VCM = 0V 86 82 117 RL = 2kΩ to 0V, V+ = 2.5V, V− = −2.5V, VO = −2V to 2V, VCM = 0V 89 85 116 RL = 600Ω to 0V, V+ = 2.5V, V− = −2.5V, VO = −2V to 2V, VCM = 0V 80 75 105 RL = 2kΩ to 0V, V+ = 2.5V, V− = −2.5V, VO = −2V to 2V, VCM = 0V 80 75 107 4.850 4.840 4.893 Sinking VO Output Swing RL = 600Ω to 2.5V VIN = ±100mV −0.3 0 VOH VOL RL = 2kΩ to 2.5V VIN = ±100mV IO (1) (2) Output Short Circuit Current VOH 3.8 0.1 4.935 VOL V dB dB V 0.150 1.160 V 4.966 0.034 V 0.065 0.075 V Sourcing, VO = 0V, VIN = 100mV 85 68 108 mA Sinking, VO = 5V, VIN = −100mV 60 45 69 mA All limits are ensured by testing or statistical analysis. Typical value represent the most likely parametric norm. 5V AC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C. V+ = 5V, V− = 0V, VCM = V+/2, VO = 2.5V and RL > 1MΩ. Boldface limits apply at the temperature extremes. Parameter Test Conditions Typ (1) Units SR Slew Rate 0.66 V/µs GBW Gain Bandwidth Product 1 MHz φm Phase Margin 70 Deg Gm Gain Margin en Input-Referred Voltage Noise f = 1kHz, VCM = 1V f = 100kHz THD Total Harmonic Distortion f = 1kHz, AV = +1 RL = 600Ω, VO = 1VPP (1) (2) See (2) 15 dB 40 30 nV/√Hz 0.069 % Typical value represent the most likely parametric norm. V+ = 5V. Connected as voltage follower with 5V step input. Number specified is the slower of the positive and negative slew rates. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 5 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Simplified Schematic 6 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 Typical Performance Characteristics Unless otherwise specified, TA = 25°C. Supply Current vs. Supply Voltage Output Negative Swing vs. Supply Voltage Figure 3. Figure 4. Output Negative Swing vs. Supply Voltage Output Positive Swing vs. Supply Voltage Figure 5. Figure 6. Output Positive Swing vs. Supply Voltage VOS vs. VCM Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 7 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C. 8 VOS vs. VCM VOS vs. VCM Figure 9. Figure 10. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage Figure 11. Figure 12. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage Figure 15. Figure 16. IBIAS Current vs. VCM Open Loop Frequency Response Figure 17. Figure 18. Open Loop Frequency Response Open Loop Frequency Response Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 9 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C. 10 Open Loop Frequency Response Open Loop Frequency Response Figure 21. Figure 22. Open Loop Frequency Response Noise vs. Frequency Response Figure 23. Figure 24. Noise vs. Frequency Response Noise vs. Frequency Response Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C. Small Signal Response Large Signal Response Figure 27. Figure 28. Small Signal Response Large Signal Response Figure 29. Figure 30. Small Signal Response Large Signal Response Figure 31. Figure 32. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 11 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C. 12 Small Signal Response Large Signal Response Figure 33. Figure 34. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 APPLICATION HINTS Compensating Input Capacitance The high input resistance of the LMV301 op amp allows the use of large feedback and source resistor values without losing gain accuracy due to loading. However, the circuit will be especially sensitive to its layout when these large value resistors are used. Every amplifier has some capacitance between each input and AC ground, and also some differential capacitance between the inputs. When the feedback network around an amplifier is resistive, this input capacitance (along with any additional capacitance due to circuit board traces, the socket, etc.) and the feedback resistors create a pole in the feedback path. In the following General Operational Amplifier circuit, Figure 35, the frequency of this pole is where • • CS is the total capacitance at the inverting input, including amplifier input capacitance and any stray capacitance from the IC socket (if one is used), circuit board traces, etc., RP is the parallel combination of RF and RIN (1) This formula, as well as all formulae derived below, apply to inverting and non-inverting op amp configurations. When the feedback resistors are smaller than a few kΩ, the frequency of the feedback pole will be quite high, since CS is generally less than 10pF. If the frequency of the feedback pole is much higher than the “ideal” closedloop bandwidth (the nominal closed-loop bandwidth in the absence of CS), the pole will have a negligible effect on stability, as it will add only a small amount of phase shift. However, if the feedback pole is less than approximately 6 to 10 times the “ideal” −3dB frequency, a feedback capacitor, CF, should be connected between the output and the inverting input of the op amp. This condition can also be stated in terms of the amplifier's low frequency noise gain. To maintain stability a feedback capacitor will probably be needed if (2) Where (3) is the amplifier's low frequency noise gain and GBW is the amplifier's gain bandwidth product. An amplifier's low frequency noise gain is represented by the formula (4) regardless of whether the amplifier is being used in inverting or non-inverting mode. Note that a feedback capacitor is more likely to be needed when the noise gain is low and/or the feedback resistor is large. If the above condition is met (indicating a feedback capacitor will probably be needed), and the noise gain is large enough that: (5) the following value of feedback capacitor is recommended: (6) Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 13 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com If (7) the feedback capacitor should be: (8) Note that these capacitor values are usually significantly smaller than those given by the older, more conservative formula: (9) CS consists of the amplifier's input capacitance plus any stray capacitance from the circuit board and socket. CF compensates for the pole caused by CS and the feedback resistors. Figure 35. General Operational Amplifier Circuit Using the smaller capacitor will give much higher bandwidth with little degradation of transient response. It may be necessary in any of the above cases to use a somewhat larger feedback capacitor to allow for unexpected stray capacitance, or to tolerate additional phase shifts in the loop, or excessive capacitive load, or to decrease the noise or bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently stable. For example, a printed circuit board's stray capacitance may be larger or smaller than the breadboard's, so the actual optimum value for CF may be different from the one estimated using the breadboard. In most cases, the values of CF should be checked on the actual circuit, starting with the computed value. Capacitive Load Tolerance Like many other op amps, the LMV301 may oscillate when its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration most sensitive to oscillation is a unity gain follower. The load capacitance interacts with the op amp’s output resistance to create an additional pole. If this pole frequency is sufficiently low, it will degrade the op amp's phase margin so that the amplifier is no longer stable. As shown in Figure 36, the addition of a small resistor (50Ω to 100Ω) in series with the op amp's output, and a capacitor (5pF to 10pF) from inverting input to output pins, returns the phase margin to a safe value without interfering with lower frequency circuit operation. Thus, larger values of capacitance can be tolerated without oscillation. Note that in all cases, the output will ring heavily when the load capacitance is near the threshold for oscillation. 14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 Figure 36. Rx, Cx Improve Capacitive Load Tolerance Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 37). Typically a pull up resistor conducting 500µA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor. Figure 37. Compensating for Large Capacitive Loads with a Pull Up Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 100pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the low bias current of the LMV301, typically less than 0.182pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptable low, because under conditions of the high humidity or dust or contamination, the surface leakage will be appreciable. To minimized the effect of any surface leakage, lay out a ring of foil completely surrounding the LMV301's inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op amp's inputs. See Figure 38. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. The PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5pA if the trace were a 5V bus adjacent to the pad of an input. This would cause a 100 times degradation from the LMV301's actual performance. However, if a guard ring is held within 5mV of the inputs, then even a resistance of 1011Ω would cause only 0.05pA of leakage current, or perhaps a minor (2:1) degradation of the amplifier performance. See Figure 39, Figure 40, and Figure 41 for typical connections of guard rings for standard op amp configurations. If both inputs are active and at high impedance, the guard can be tied to ground and still provide some protection; see Figure 42. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 15 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Figure 38. Example, using the LMV301, of Guard Ring in P.C. Board Layout Guard Ring Connections Figure 39. Inverting Amplifier Figure 40. Non-Inverting Amplifier Figure 41. Follower 16 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 Figure 42. Howland Current Pump The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 43. (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) Figure 43. Air Wiring Typical Single-Supply Applications (V+ = 5.0 VDC) Figure 44. Low-Leakage Sample-and-Hold Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 17 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com Figure 45. Sine-Wave Oscillator Oscillator frequency is determined by R1, R2, C1, and C2: fosc = 1/2πRC where • • R = R1 = R2 C = C1 = C2 (10) This circuit, as shown, oscillates at 2.0kHz with a peak-to-peak output swing of 4.5V. Figure 46. 1 Hz Square-Wave Oscillator Figure 47. Power Amplifier 18 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 LMV301 www.ti.com SNOS968A – MAY 2004 – REVISED MAY 2013 fO = 10 Hz Q = 2.1 Gain = −8.8 Figure 48. 10Hz Bandpass Filter fc = 10 Hz d = 0.895 Gain = 1 2 dB passband ripple Figure 49. 10 Hz High-Pass Filter fc = 1 Hz d = 1.414 Gain = 1.57 Figure 50. 1 Hz Low-Pass Filter (Maximally Flat, Dual Supply Only) Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 19 LMV301 SNOS968A – MAY 2004 – REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Original (May 2013) to Revision A • 20 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 19 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMV301 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LMV301MG/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A48 LMV301MGX/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A48 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of