Product
Folder
Order
Now
Support &
Community
Tools &
Software
Technical
Documents
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
MAX660 Switched Capacitor Voltage Converter
1 Features
3 Description
•
•
•
•
•
The MAX660 CMOS charge-pump voltage converter
is a versatile unregulated switched-capacitor inverter
or doubler. Operating from a wide 1.5-V to 5.5-V
supply voltage, the MAX660 uses two low-cost
capacitors to provide 100 mA of output current
without the cost, size and EMI related to inductorbased converters. With an operating current of only
120 µA and operating efficiency greater than 90% at
most loads, the MAX660 provides ideal performance
for battery-powered systems. MAX660 devices can
be operated directly in parallel to lower output
impedance, thus providing more current at a given
voltage.
1
Inverts or Doubles Input Supply Voltage
Narrow SO-8 Package
6.5-Ω Typical Output Resistance
88% Typical Conversion Efficiency at 100 mA
Selectable Oscillator Frequency: 10 kHz/80 kHz
2 Applications
•
•
•
•
•
•
Laptop Computers
Cellular Phones
Medical Instruments
Operational Amplifier Power Supplies
Interface Power Supplies
Handheld Instruments
The FC (frequency control) pin selects between a
nominal 10-kHz or 80-kHz oscillator frequency. The
oscillator frequency can be lowered by adding an
external capacitor to the OSC pin. Also, the OSC pin
may be used to drive the MAX660 with an external
clock up to 150 kHz. Through these methods, output
ripple frequency and harmonics may be controlled.
Additionally, the MAX660 may be configured to divide
a positive input voltage precisely in half. In this mode,
input voltages as high as 11 V may be used.
Device Information(1)
PART NUMBER
MAX660
PACKAGE
SOIC (8)
BODY SIZE (NOM)
4.90 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Voltage Inverter
Positive Voltage Doubler
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Tables...................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
8
Parameter Measurement Information .................. 9
9
Detailed Description ............................................ 10
8.1 MAX660 Test Circuit ................................................. 9
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
9.3 Feature Description................................................. 11
9.4 Device Functional Modes........................................ 11
10 Application and Implementation........................ 12
10.1 Application Information.......................................... 12
10.2 Typical Applications ............................................. 12
10.3 Split V+ in Half ...................................................... 18
11 Power Supply Recommendations ..................... 18
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 19
13 Device and Documentation Support ................. 20
13.1
13.2
13.3
13.4
13.5
13.6
Device Support......................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
20
14 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (October 2016) to Revision B
•
Page
Changed Figure 5 caption from "Efficiency vs Oscillator Frequency" to "Efficiency vs Load Current" ................................. 7
Changes from Original (SNOS405) to Revision A
Page
•
Added additional info to DescriptionDevice Information and Pin Configuration and Functions sections, ESD Ratings
and Thermal Information tables, Feature Description, Device Functional Modes, Application and Implementation,
Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and
Orderable Information sections .............................................................................................................................................. 1
•
Deleted obsolete device number information from Device Comparison table ...................................................................... 3
•
Deleted lead temperature spec from Abs Max as it is in POA .............................................................................................. 5
•
Added additional thermal values; changed RθJA from "170°C/W" to "114.4°C/W" ................................................................. 5
•
Changed "PL" to "PM" and "PF" to PJ" - manufacturers changed their part number prefix ............................................... 14
•
Changed "Sprague" to "Vishay Sprague" per website ........................................................................................................ 14
2
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
5 Device Comparison Tables
LM2664
LM2665
SOT-23 (6)
SOT-23 (6)
SOIC
0.22
0.22
0.12 at 10 kHz, 1 at 80 kHz
Output (typical) (Ω)
12
12
6.5
Oscillator (kHz)
80
80
10, 80
1.8 to 5.5
1.8 to 5.5
1.8 to 5.5
Invert
Double
Invert, Double
Package
Supply current (typical) (mA)
Input (V)
Output mode(s)
Package
Supply current (typical) (mA)
MAX660
LM2662
LM2663
SOIC, VSSOP (8)
SOIC (8)
SOIC (8)
0.12 at 10 kHz, 1 at 80 kHz
0.3 at 10 kHz, 1.3 at 70 kHz
1.3
6.5
3.5
3.5
10, 80
10, 70
70
1.8 to 5.5
1.8 to 5.5
1.8 to 5.5
Invert, Double
Invert, Double
Invert, Double
Output (typical) (Ω)
Oscillator (kHz)
Input (V)
Output mode(s)
MAX660
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
3
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
6 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
Pin Functions
PIN
NAME
NO.
DESCRIPTION
I/O
VOLTAGE INVERTER
VOLTAGE DOUBLER
CAP+
2
Power
Connect this pin to the positive terminal of charge-pump
capacitor.
CAP–
4
Power
Connect this pin to the negative terminal of charge-pump
Same as inverter
capacitor.
Same as inverter
Frequency control for internal oscillator:
FC = open, ƒOSC = 10 kHz (typical);
FC = V+, ƒOSC = 80 kHz (typical);
FC has no effect when OSC pin is driven externally
Same as inverter
Power supply ground input.
Power supply positive voltage input
LV must be tied to OUT.
FC
1
Input
GND
3
Ground
LV
6
Input
Low-voltage operation input. Tie LV to GND when input
voltage is less than 3.5 V. Above 3.5 V, LV can be
connected to GND or left open. When driving OSC with
an external clock, LV must be connected to GND.
OSC
7
Input
Oscillator control input. OSC is connected to an internal
15-pF capacitor. An external capacitor can be connected Same as inverter except that OSC cannot
to slow the oscillator. Also, an external clock can be
be driven by an external clock
used to drive OSC.
OUT
5
Power
Negative voltage output
Positive supply ground input
V+
8
Power
Power supply positive voltage input
Positive voltage output
4
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
7 Specifications
7.1 Absolute Maximum Ratings
MIN
Supply voltage (V+ to GND, or GND to OUT)
(OUT − 0.3 V)
LV
MAX
UNIT
6
V
GND + 3 V)
The least negative of (OUT − 0.3 V)(V+ − 6 V) to
(V+ 0.3 V)
FC, OSC
V+ and OUT continuous output current
120
mA
Output short-circuit duration to GND (3)
1
sec
Power dissipation, TA = 25°C (4)
735
mW
TJ, maximum (4)
150
°C
Operating junction temperature
−40
85
°C
Storage temperature, Tstg
−65
150
°C
(1)
(2)
(3)
(4)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and must be
avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.
The maximum allowable power dissipation is calculated by using PD_MAX = (TJ_MAX − TA) / RθJA, where TJ_MAX is the maximum junction
temperature, TA is the ambient temperature, and RθJA is the junction-to-ambient thermal resistance of the specified package.
7.2 ESD Ratings
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
VALUE
UNIT
±2000
V
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
V+ (supply voltage)
NOM
MAX
Inverter, LV = open
3.5
5.5
Inverter, LV = GND
1.5
5.5
Doubler, LV = out
2.5
5.5
–40
85
Junction temperature (TJ)
UNIT
V
°C
7.4 Thermal Information
MAX660
THERMAL METRIC (1)
SOIC (D)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
114.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
61.4
°C/W
RθJB
Junction-to-board thermal resistance
55.5
°C/W
ψJT
Junction-to-top characterization parameter
9.8
°C/W
ψJB
Junction-to-board characterization parameter
54.9
°C/W
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
5
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
7.5 Electrical Characteristics
Unless otherwise specified: Limits apply for TJ = 25°C, V+ = 5 V, FC = open, C1 = C2 = 150 μF. (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(3)
V+ (2)
Supply voltage
RL = 1 kΩ
Inverter LV = open ,
TJ = –40°C to 85°C
3.5
5.5
Inverter, LV = GND,
TJ = –40°C to 85°C
1.5
5.5
Doubler, LV = OUT,
TJ = –40°C to 85°C
2.5
5.5
FC = open
IQ
Supply current
No load, LV = open
0.12
FC = open,
TJ = –40°C to 85°C
0.5
FC = V+
Output current
3
TA ≤ 85°C, OUT ≤ −4 V
100
TA > 85°C, OUT ≤ −3.8 V
100
TA ≤ 85°C
ROUT
Output resistance
(2)
IL = 100 mA
Oscillator frequency
10
TA > 85°C, TJ = –40°C to 85°C
12
OSC input current
5
FC = V+
80
±2
FC = V+
±16
RL (1 kΩ) between V+ and OUT
PEFF
Power efficiency
96%
96%
92%
IL = 100 mA to GND
VOEFF
(1)
(2)
(3)
6
Voltage conversion
efficiency
µA
98%
RL (500 Ω) between GND and OUT
RL (500 Ω) between GND and OUT
TJ = –40°C to 85°C
kHz
40
FC = open
RL (1 kΩ) between V+ and OUT
TJ = –40°C to 85°C
Ω
10
FC = V+, TJ = –40°C to 85°C
IOSC
10
TJ = –40°C to 85°C
FC = open, TJ = –40°C to 85°C
OSC = open
mA
6.5
FC = open
ƒOSC
mA
1
FC = V+,
TJ = –40°C to 85°C
IL
V
88%
No load
99.96%
No load, TJ = –40°C to 85°C
99%
In the test circuit, capacitors C1 and C2 are 0.2-Ω maximum ESR capacitors. Capacitors with higher ESR increase output resistance,
reduce output voltage, and efficiency.
Specified output resistance includes internal switch resistance and capacitor ESR.
The minimum limit for this parameter is different from the limit of 3 V for the industry-standard 660 product. For inverter operation with
supply voltage below 3.5 V, connect the LV pin to GND.
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
7.6 Typical Characteristics
Circuit of Voltage Inverter and Positive Voltage Doubler.
Figure 1. Supply Current vs Supply Voltage
Figure 2. Supply Current vs Oscillator Frequency
Figure 3. Output Source Resistance vs Supply Voltage
Figure 4. Output Source Resistance vs Temperature
Figure 5. Efficiency vs Load Current
Figure 6. Output Voltage Drop vs Load Current
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
7
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
Typical Characteristics (continued)
Circuit of Voltage Inverter and Positive Voltage Doubler.
Figure 7. Efficiency vs Oscillator Frequency
FC = V+
FC = Open
Figure 9. Oscillator Frequency Supply Voltage
Figure 10. Oscillator Frequency vs Supply Voltage
FC = V+
FC = Open
Figure 11. Oscillator Frequency vs Temperature
8
Figure 8. Output Voltage vs Oscillator Frequency
Figure 12. Oscillator Frequency vs Temperature
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
8 Parameter Measurement Information
8.1 MAX660 Test Circuit
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
9
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
9 Detailed Description
9.1 Overview
The MAX660 contains four large CMOS switches which are switched in a sequence to invert the input supply
voltage. Energy transfer and storage are provided by external capacitors. Figure 13 shows the voltage
conversion scheme. When S1 and S3 are closed, C1 charges to the supply voltage V+. During this time interval
switches S2 and S4 are open. In the second time interval, S1 and S3 are open and S2 and S4 are closed, C1 is
charging C2. After a number of cycles, the voltage across C2 is pumped to V+. Because the anode of C2 is
connected to ground, the output at the cathode of C2 equals −(V+) assuming no load on C2, no loss in the
switches, and no ESR in the capacitors. In reality, the charge transfer efficiency depends on the switching
frequency, the on-resistance of the switches, and the ESR of the capacitors.
Figure 13. Voltage Inverting Principle
9.2 Functional Block Diagram
OUT
V+
CAP+
FC
OSCILLATOR
Switch Array
Switch Drivers
OSC
CAP-
LV
GND
Copyright©2016, Texas Instruments Incorporated
10
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
9.3 Feature Description
The internal oscillator frequency can be selected using the frequency control (FC) pin. When FC is open, the
oscillator frequency is 10 kHz; when FC is connected to V+, the frequency increases to 80 kHz. A higher
oscillator frequency allows use of smaller capacitors for equivalent output resistance and ripple, but increases the
typical supply current from 0.12 mA to 1 mA. The oscillator frequency can be lowered by adding an external
capacitor between OSC and GND. (See Typical Characteristics.) Also, in the inverter mode, an external clock
that swings within 100 mV of V+ and GND can be used to drive OSC. Any CMOS logic gate is suitable for driving
OSC. LV must be grounded when driving OSC. The maximum external clock frequency is limited to 150 kHz.
The switching frequency of the converter (also called the charge-pump frequency) is half of the oscillator
frequency.
NOTE
OSC cannot be driven by an external clock in the voltage-doubling mode.
Table 1. MAX660 Oscillator Frequency Selection
FC
OSC
OSCILLATOR
Open
Open
10 kHz
V+
Open
80 kHz
Open or V+
External capacitor
See Typical Characteristics
N/A
External clock (inverter mode only)
External clock frequency
9.4 Device Functional Modes
When V+ is applied to the MAX660, the device becomes enabled and operates in whichever configuration the
device is placed (inverter, doubler, etc.).
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
11
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The MAX660 CMOS charge-pump voltage converter is a versatile, unregulated switched-capacitor inverter or
doubler. Operating from a wide 1.5-V to 5.5-V supply voltage, the MAX660 uses two low-cost capacitors to
provide 100 mA of output current without the cost, size, and EMI related to inductor-based converters. With an
operating current of only 120 µA and operating efficiency greater than 90% at most loads, the MAX660 provides
ideal performance for battery-powered systems. MAX660 devices can be operated directly in parallel to lower
output impedance, thus providing more current at a given voltage.
10.2 Typical Applications
10.2.1 Voltage Inverter
Figure 14. MAX660 Voltage Inverter
10.2.1.1 Design Requirements
For typical switched capacitor applications, use the parameters in Table 2:
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage
5.5 V (maximum)
Negative output voltage
–1.5 V to –5.5 V
Output current
100 mA
10.2.1.2 Detailed Design Procedure
The main application of MAX660 is to generate a negative supply voltage. The voltage inverter circuit uses only
two external capacitors as shown in the Figure 14. The range of the input supply voltage is 1.5 V to 5.5 V. For a
supply voltage less than 3.5 V, the LV pin must be connected to ground to bypass the internal regulator circuitry.
This gives the best performance in low-voltage applications. If the supply voltage is greater than 3.5 V, LV may
be connected to ground or left open. The choice of leaving LV open simplifies the direct substitution of the
MAX660 for the LMC7660 switched capacitor voltage converter.
The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor.
The voltage source equals −(V+). The output resistance Rout is a function of the ON resistance of the internal
MOS switches, the oscillator frequency, and the capacitance and ESR of C1 and C2. A good approximation is:
12
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
where
•
RSW is the sum of the ON resistance of the internal MOS switches shown in Figure 13.
(1)
High-value, low-ESR capacitors reduce the output resistance. Instead of increasing the capacitance, the
oscillator frequency can be increased to reduce the 2/(ƒOSCc × C1) term. Once this term is trivial compared with
RSW and ESRs, further increase to oscillator frequency and capacitance become ineffective. The peak-to-peak
output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR of the output
capacitor C2:
(2)
Again, using a low-ESR capacitor results in lower ripple.
10.2.1.2.1 Capacitor Selection
The output resistance and ripple voltage are dependent on the capacitance and ESR values of the external
capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is
shown in Equation 3:
where
•
•
IQ(V+) is the quiescent power loss of the device
IL2ROUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their
ESRs
(3)
Because the switching current charging and discharging C1 is approximately twice that of the output current, the
effect of the ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The output capacitor
C2 is charging and discharging at a current approximately equal to the output current; therefore, its ESR only
counts once in the output resistance. However, the ESR of C2 directly affects the output voltage ripple.
Therefore, TI recommends low-ESR capacitors (Table 3) for both capacitors to maximize efficiency, reduce the
output voltage drop and voltage ripple. For convenience, C1 and C2 are usually chosen to be the same. The
output resistance varies with the oscillator frequency and the capacitors. In Figure 15, the output resistance vs
oscillator frequency curves are drawn for three different tantalum capacitors. At very low frequency range,
capacitance plays the most important role in determining the output resistance. Once the frequency is increased
to some point (such as 20 kHz for the 150-μF capacitors), the output resistance is dominated by the ON
resistance of the internal switches and the ESRs of the external capacitors. A low-value, smaller size capacitor
usually has a higher ESR compared with a larger size capacitor of the same type. For lower ESR, use ceramic
capacitors.
Figure 15. Output Source Resistance vs Oscillator Frequency
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
13
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
Table 3. Low-ESR Capacitor Manufacturers
MANUFACTURER
CAPACITOR TYPE
Nichicon Corp.
PM, PJ series, through-hole aluminum electrolytic
AVX Corp.
TPS series, surface-mount tantalum
Vishay Sprague
593D, 594D, 595D series, surface-mount tantalum
Sanyo
OS-CON series, through-hole aluminum electrolytic
10.2.1.2.2 Paralleling Devices
Any number of MAX660 devices can be paralleled to reduce the output resistance. Each device must have its
own pumping capacitor C1, while only one output capacitor COUT is required as shown in Figure 16. The
composite output resistance is:
ROUT = ROUT of each MAX660 / Number of Devices
(4)
Figure 16. Lowering Output Resistance by Paralleling Devices
10.2.1.2.3 Cascading Devices
Cascading the MAX660s is an easy way to produce a greater negative voltage (as shown in Figure 17). If n is
the integer representing the number of devices cascaded, the unloaded output voltage Vout is (−nVin). The
effective output resistance is equal to the weighted sum of each individual device:
(5)
A three-stage cascade circuit shown in Figure 18 generates −3 Vin, from Vin.
Cascading is also possible when devices are operating in doubling mode. In Figure 19, two devices are
cascaded to generate 3 VIN.
An example of using the circuit in Figure 18 or Figure 19 is generating +15 V or −15 V from a +5-V input.
NOTE
The number of n is practically limited because the increasing of n significantly reduces the
efficiency and increases the output resistance and output voltage ripple.
14
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
Figure 17. Increasing Output Voltage by Cascading Devices
Figure 18. Generating −3VIN From +VIN
Figure 19. Generating +3VIN From +VIN
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
15
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
10.2.1.2.4 Regulating Output Voltage
Output of the MAX660 can be regulated by use of a low-dropout regulator (such as LP2951). The whole
converter is depicted in Figure 20. This converter can give a regulated output from −1.5 V to −5.5 V by choosing
the proper resistor ratio:
(6)
The error flag on pin 5 of the LP2951 goes low when the regulated output at pin 4 drops by about 5%. The
LP2951 can be shut down by taking pin 3 high.
Figure 20. Combining MAX660 With LP2951 to Make a Negative Regulator
As shown in Figure 21 by operating MAX660 in voltage doubling mode and adding a linear regulator (such as
LP2981) at the output, the user can get +5-V output from an input as low as +3 V.
Figure 21. Generating +5 V From +3-V Input Voltage
16
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
10.2.1.3 Application Curves
Figure 22. Efficiency vs Load Current
Figure 23. Efficiency vs Oscillator Frequency
10.2.2 Positive Voltage Doubler
Figure 24. MAX660 Voltage Doubler
10.2.2.1 Design Requirements
The MAX660 can operate as a positive voltage doubler (as shown in the Figure 24). The doubling function is
achieved by reversing some of the connections to the device. The input voltage is applied to the GND pin with an
allowable voltage from 2.5 V to 5.5 V. The V+ pin is used as the output. The LV pin and OUT pin must be
connected to ground. The OSC pin cannot be driven by an external clock in this operation mode. The unloaded
output voltage is twice of the input voltage and is not reduced by the forward drop of the diode (D1) .
10.2.2.2 Detailed Design Procedure
The Schottky diode D1 is only needed for start-up. The internal oscillator circuit uses the V+ pin and the LV pin
(connected to ground in the voltage doubler circuit) as its power rails. Voltage across V+ and LV must be larger
than 1.5 V to ensure the operation of the oscillator. During start-up, D1 is used to charge up the voltage at V+ pin
to start the oscillator; also, it protects the device from turning on its own parasitic diode and potentially latching
up. Therefore, the Schottky diode D1 must have enough current carrying capability to charge the output capacitor
at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning on. A Schottky
diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a smaller
Schottky diode like MBR0520LT1 can be used to reduce the circuit size.
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
17
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
10.3 Split V+ in Half
Another interesting application shown in Figure 25 is to use the MAX660 as a precision voltage divider. Because
the off-voltage across each switch equals VIN/2, the input voltage can be raised to 11 V.
Figure 25. Splitting VIN in Half
11 Power Supply Recommendations
The MAX660 is designed to operate from as an inverter over an input voltage supply range between 1.5 V and
5.5 V when the LV pin is grounded. This input supply must be well regulated and capable to supply the required
input current. If the input supply is located far from the MAX660 additional bulk capacitance may be required in
addition to the ceramic bypass capacitors.
18
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
MAX660
www.ti.com
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
12 Layout
12.1 Layout Guidelines
The high switching frequency and large switching currents of the MAX660 make the choice of layout important.
The following steps should be used as a reference to ensure the device is stable and maintains proper LED
current regulation across its intended operating voltage and current range:
• Place CIN on the top layer (same layer as the MAX60) and as close as possible to the device. Connecting the
input capacitor through short, wide traces to both the V+ and GND pins reduces the inductive voltage spikes
that occur during switching which can corrupt the V+ line.
• Place COUT on the top layer (same layer as the MAX660) and as close as possible to the OUT and GND pin.
The returns for both CIN and COUT must come together at one point, as close as possible to the GND pin.
Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND pins that can
corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding circuitry.
• Place C1 on the top layer (same layer as the MAX660) and as close as possible to the device. Connect the
flying capacitor through short, wide traces to both the CAP+ and CAP– pins.
12.2 Layout Example
FC
CAP+
V+
OSC
GND
LV
CAP-
OUT
Figure 26. MAX660 Layout Example
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
19
MAX660
SNOS405B – NOVEMBER 1999 – REVISED MAY 2017
www.ti.com
13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
Product Folder Links: MAX660
PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
MAX660M
NRND
SOIC
D
8
95
Non-RoHS
& Green
Call TI
Level-1-235C-UNLIM
MAX
660M
MAX660M/NOPB
ACTIVE
SOIC
D
8
95
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
MAX
660M
MAX660MX/NOPB
ACTIVE
SOIC
D
8
2500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
MAX
660M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
