OPA1662
OPA1664
Burr-Brown Audio
SBOS489 – DECEMBER 2011
www.ti.com
™ Low-Power, Low Noise and Distortion, Bipolar-Input
AUDIO OPERATIONAL AMPLIFIERS
Check for Samples: OPA1662, OPA1664
FEATURES
DESCRIPTION
• Low Noise: 3.3 nV/√Hz at 1 kHz
• Low Distortion: 0.00006% at 1 kHz
• Low Quiescent Current:
1.5 mA per Channel
• Slew Rate: 17 V/μs
• Wide Gain Bandwidth: 22 MHz (G = +1)
• Unity Gain Stable
• Rail-to-Rail Output
• Wide Supply Range:
±1.5 V to ±18 V, or +3 V to +36 V
• Dual and Quad Versions Available
• Small Package Sizes:
Dual: SO-8 and MSOP-8
Quad: SO-14 and TSSOP-14
The OPA1662 (dual) and OPA1664 (quad) series of
bipolar-input operational amplifiers achieve a low 3.3
nV/√Hz noise density with an ultralow distortion of
0.00006% at 1 kHz. The OPA1662 and OPA1664
series of op amps offer rail-to-rail output swing to
within 600 mV with 2-kΩ load, which increases
headroom and maximizes dynamic range. These
devices also have a high output drive capability of
±30 mA.
1
234
APPLICATIONS
•
•
•
•
•
•
•
USB and Firewire Audio Systems
Analog and Digital Mixers
Portable Recording Systems
Audio Effects Processors
High-End A/V Receivers
High-End DVD and Blu-Ray™ Players
HIGH-End Car Audio
These devices operate over a very wide supply range
of ±1.5 V to ±18 V, or +3 V to +36 V, on only 1.5 mA
of supply current per channel. The OPA1662 and
OPA1664 op amps are unity-gain stable and provide
excellent dynamic behavior over a wide range of load
conditions.
These devices also feature completely independent
circuitry for lowest crosstalk and freedom from
interactions between channels, even when overdriven
or overloaded.
The OPA1662 and OPA1664
from –40°C to +85°C. SoundPlus™
are
specified
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SoundPlus is a trademark of Texas Instruments Incorporated.
Blu-Ray is a trademark of Blu-Ray Disc Association.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION (1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
SO-8
D
OP1662
MSOP-8
DGK
OUQI
SO-14
D
OP1664
TSSOP-14
PW
OP1664
OPA1662
OPA1664
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
OPA1662, OPA1664
UNIT
40
V
Supply voltage, VS = (V+) – (V–)
Input voltage
(V–) – 0.5 to (V+) + 0.5
V
±10
mA
Input current (all pins except power-supply pins)
Output short-circuit (2)
Continuous
Operating temperature range
–55 to +125
°C
Storage temperature range
–65 to +150
°C
200
°C
Human body model (HBM)
2
kV
Charged device model (CDM)
1
kV
200
V
Junction temperature
ESD ratings
Machine model (MM)
(1)
(2)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package.
PIN CONFIGURATIONS
OPA1662: D AND DGK PACKAGES
SO-8 AND MSOP-8
(TOP VIEW)
OUT A
1
-IN A
2
+IN A
3
V-
4
A
B
8
V+
7
OUT B
6
-IN B
5
+IN B
OPA1664: D AND PW PACKAGES
SO-14 AND TSSOP-14
(TOP VIEW)
Out A
1
-In A
2
A
14
Out D
13
-In D
D
+In A
3
12
+In D
V+
4
11
V-
+ In B
5
10
+ In C
B
C
-In B
6
9
-In C
Out B
7
8
Out C
2
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±15 V
At TA = +25°C and RL = 2 kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
THD+N Total harmonic distortion + noise
IMD
Intermodulation distortion
G = +1, f = 1 kHz, VO = 3 VRMS
G = +1,
VO = 3 VRMS
0.00006
%
–124
dB
SMPTE/DIN two-tone, 4:1
(60 Hz and 7 kHz)
0.00004
%
–128
dB
DIM 30
(3-kHz square wave and
15-kHz sine wave)
0.00004
%
–128
dB
CCIF twin-tone
(19 kHz and 20 kHz)
0.00004
%
–128
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
G = +1
22
SR
Slew rate
G = –1
17
MHz
V/μs
Full power bandwidth (1)
VO = 1 VP
2.7
MHz
Overload recovery time
G = –10
Channel separation (dual and quad)
f = 1 kHz
Input voltage noise
f = 20 Hz to 20 kHz
2.8
μVPP
f = 1 kHz
3.3
nV/√Hz
f = 100 Hz
5
nV/√Hz
f = 1 kHz
1
pA/√Hz
f = 100 Hz
2
pA/√Hz
1
μs
–120
dB
NOISE
en
Input voltage noise density
In
Input current noise density
OFFSET VOLTAGE
VOS
Input offset voltage
PSRR
Power-supply rejection ratio
VS = ±1.5 V to ±18 V
±0.5
±1.5
VS = ±1.5 V to ±18 V, TA = –40°C to +85° (2)
2
8
μV/°C
VS = ±1.5 V to ±18 V
1
3
μV/V
mV
INPUT BIAS CURRENT
IB
Input bias current
VCM = 0 V
600
1200
nA
IOS
Input offset current
VCM = 0 V
±25
±100
nA
(V+) – 1
V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
(V–) +0.5
CMRR
Common-mode rejection ratio
106
114
dB
INPUT IMPEDANCE
Differential
Common-mode
170 || 2
kΩ || pF
600 || 2.5
MΩ || pF
OPEN-LOOP GAIN
Open-loop voltage gain
(V–) + 0.6 V ≤ VO ≤ (V+) – 0.6 V, RL = 2 kΩ
VOUT
Output voltage
RL = 2 kΩ
IOUT
Output current
See Typical Characteristics
ZO
Open-loop output impedance
See Typical Characteristics
ISC
Short-circuit current (3)
±50
mA
CLOAD
Capacitive load drive
200
pF
AOL
106
114
dB
OUTPUT
(1)
(2)
(3)
(V+) – 0.6
(V–) + 0.6
V
mA
Ω
Full-power bandwidth = SR/(2π × VP), where SR = slew rate.
Specified by design and characterization.
One channel at a time.
3
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±15 V (continued)
At TA = +25°C and RL = 2 kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VS
±1.5
Specified voltage range
Quiescent current
(per channel)
IQ
IOUT = 0 A
1.5
IOUT = 0 A, TA = –40°C to +85° (4)
±18
V
1.8
mA
2
mA
TEMPERATURE
(4)
Specified range
–40
+85
°C
Operating range
–55
+125
°C
MAX
UNIT
Specified by design and characterization.
ELECTRICAL CHARACTERISTICS: VS = +5 V
At TA = +25°C and RL = 2 kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER
CONDITIONS
MIN
TYP
AUDIO PERFORMANCE
THD+N Total harmonic distortion + noise
IMD
Intermodulation distortion
G = +1, f = 1 kHz, VO = 3 VRMS
G = +1,
VO = 3 VRMS
0.0001
%
–120
dB
SMPTE/DIN two-tone, 4:1
(60 Hz and 7 kHz)
0.00004
%
–128
dB
DIM 30
(3-kHz square wave and
15-kHz sine wave)
0.00004
%
–128
dB
CCIF twin-tone
(19 kHz and 20 kHz)
0.00004
%
–128
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
G = +1
20
SR
Slew rate
G = –1
13
MHz
V/μs
Full power bandwidth (1)
VO = 1 VP
2
MHz
Overload recovery time
G = –10
Channel separation (dual and quad)
f = 1 kHz
Input voltage noise
f = 20 Hz to 20 kHz
3.3
μVPP
f = 1 kHz
3.3
nV/√Hz
f = 100 Hz
5
nV/√Hz
f = 1 kHz
1
pA/√Hz
f = 100 Hz
2
pA/√Hz
1
μs
–120
dB
NOISE
en
Input voltage noise density
In
Input current noise density
OFFSET VOLTAGE
VOS
Input offset voltage
PSRR
Power-supply rejection ratio
VS = ±1.5 V to ±18 V
±0.5
±1.5
VS = ±1.5 V to ±18 V, TA = –40°C to +85° (2)
2
8
μV/°C
VS = ±1.5 V to ±18 V
1
3
μV/V
mV
INPUT BIAS CURRENT
IB
Input bias current
VCM = 0 V
600
1200
nA
IOS
Input offset current
VCM = 0 V
±25
±100
nA
(V+) – 1
V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
(V–) +0.5
CMRR
Common-mode rejection ratio
86
100
dB
INPUT IMPEDANCE
Differential
Common-mode
(1)
(2)
170 || 2
kΩ || pF
600 || 2.5
MΩ || pF
Full-power bandwidth = SR/(2π × VP), where SR = slew rate.
Specified by design and characterization.
4
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = +5 V (continued)
At TA = +25°C and RL = 2 kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER
CONDITIONS
MIN
TYP
90
100
MAX
UNIT
OPEN-LOOP GAIN
Open-loop voltage gain
(V–) + 0.6 V ≤ VO ≤ (V+) – 0.6 V, RL = 2 kΩ
VOUT
Output voltage
RL = 2 kΩ
IOUT
Output current
See Typical Characteristics
ZO
Open-loop output impedance
See Typical Characteristics
ISC
Short-circuit current (3)
±40
mA
CLOAD
Capacitive load drive
200
pF
AOL
dB
OUTPUT
(V+) – 0.6
(V–) + 0.6
V
mA
Ω
POWER SUPPLY
VS
Specified voltage range
IQ
Quiescent current
(per channel)
±1.5
IOUT = 0 A
1.4
±18
V
1.7
mA
2
mA
IOUT = 0 A, TA = –40°C to +85° (2)
TEMPERATURE
(3)
Specified range
–40
+85
°C
Operating range
–55
+125
°C
One channel at a time.
THERMAL INFORMATION: OPA1662
OPA1662
THERMAL METRIC (1)
D (SO)
DGK (MSOP)
8 PINS
8 PINS
θJA
Junction-to-ambient thermal resistance
156.3
225.4
θJCtop
Junction-to-case (top) thermal resistance
85.5
78.8
θJB
Junction-to-board thermal resistance
64.9
110.5
ψJT
Junction-to-top characterization parameter
33.8
14.6
ψJB
Junction-to-board characterization parameter
64.3
108.5
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION:OPA1664
OPA1664
THERMAL METRIC (1)
D (SO)
PW (TSSOP)
14 PINS
14 PINS
θJA
Junction-to-ambient thermal resistance
78.6
125.8
θJCtop
Junction-to-case (top) thermal resistance
37.0
45.2
θJB
Junction-to-board thermal resistance
24.9
57.5
ψJT
Junction-to-top characterization parameter
9.7
5.5
ψJB
Junction-to-board characterization parameter
24.6
56.7
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
5
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY AND
INPUT CURRENT NOISE DENSITY vs FREQUENCY
0.1Hz TO 10Hz NOISE
100
100
10
1
1
0.1
1
10
100
1k
Frequency (Hz)
10k
Voltage Noise ( 50nV/div)
10
Current Noise (pA/ Hz)
Voltage Noise (nV/ Hz)
Voltage Noise
Current Noise
0.1
100k
Time (1s/div)
G001
Figure 1.
VOLTAGE NOISE vs SOURCE RESISTANCE
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
15
10k
E2o = e2n + (inRS)2 + 4KTRS
RS
Output Voltage (V)
Voltage Noise (nV/ Hz)
VS = ± 15 V
12
EO
1k
OPA166x
100
OPA165x
10
8
VS = ± 5 V
5
10
2
Resistor Noise
1
100
1k
10k
100k
VS = ± 1.5 V
0
10k
1M
Source Resistance (W)
100k
1M
Frequency (Hz)
G003
Figure 3.
GAIN AND PHASE vs FREQUENCY
G004
CLOSED-LOOP GAIN vs FREQUENCY
180
40
CL = 100pF
Gain = −1V/V
Gain = +1V/V
Gain = +10V/V
120
135
100
40
0
45
20
Gain (dB)
90
60
Phase (°)
20
80
Gain
Phase
0
−20
10M
Figure 4.
140
Gain (dB)
G002
Figure 2.
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
0
100M
−20
G005
1k
Figure 5.
10k
100k
1M
Frequency (Hz)
10M
100M
G006
Figure 6.
6
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
THD+N RATIO vs FREQUENCY
THD+N RATIO vs FREQUENCY
0.01
G = 10V/V, RL = 600Ω
G = 10V/V, RL = 2kΩ
G = +1V/V, RL = 600Ω
G = +1V/V, RL = 2kΩ
G = −1V/V, RL = 600Ω
G = −1V/V, RL = 2kΩ
0.001
THD+N (%)
THD+N (%)
0.01
0.0001
G = 10V/V, RL = 600Ω
G = 10V/V, RL = 2kΩ
G = +1V/V, RL = 600Ω
G = +1V/V, RL = 2kΩ
G = −1V/V, RL = 600Ω
G = −1V/V, RL = 2kΩ
0.001
0.0001
VOUT = 1VRMS
BW = 80kHz
VS = ± 2.5V
VOUT = 3VRMS
BW = 80kHz
0.00001
20
100
1k
Frequency (Hz)
10k
0.00001
20k
20
100
1k
Frequency (Hz)
G007
Figure 7.
THD+N RATIO vs FREQUENCY
THD+N RATIO vs FREQUENCY
G = 10V/V, RL = 600Ω
G = 10V/V, RL = 2kΩ
G = +1V/V, RL = 600Ω
G = +1V/V, RL = 2kΩ
G = −1V/V, RL = 600Ω
G = −1V/V, RL = 2kΩ
0.001
THD+N (%)
THD+N (%)
G038
0.01
0.0001
G = 10V/V, RL = 600Ω
G = 10V/V, RL = 2kΩ
G = +1V/V, RL = 600Ω
G = +1V/V, RL = 2kΩ
G = −1V/V, RL = 600Ω
G = −1V/V, RL = 2kΩ
0.001
0.0001
VOUT = 1VRMS
BW = 500kHz
VS = ± 2.5V
VOUT = 3VRMS
BW = 500kHz
20
100
1k
Frequency (Hz)
10k
0.00001
100k
20
100
1k
Frequency (Hz)
G009
Figure 9.
10k
THD+N RATIO vs FREQUENCY
G039
THD+N RATIO vs FREQUENCY
0.01
RS = 0 W
RS = 30 W
RS = 60 W
RS = 1 kW
+15V
RSOURCE OPA1662
-15V
RL
VOUT = 3 VRMS
BW = 500 kHz
+15V
RSOURCE OPA1662
-15V
THD+N (%)
0.001
0.0001
0.001
RL
0.0001
RS = 0 W
RS = 30 W
RS = 60 W
RS = 1 kW
VOUT = 3 VRMS
BW = 80 kHz
0.00001
100k
Figure 10.
0.01
THD+N (%)
20k
Figure 8.
0.01
0.00001
10k
20
100
1k
Frequency (Hz)
10k
20k
0.00001
20
G008
Figure 11.
100
1k
Frequency (Hz)
10k
100k
G010
Figure 12.
7
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Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
INTERMODULATION DISTORTION vs
OUTPUT AMPLITUDE
THD+N RATIO vs OUTPUT AMPLITUDE
0.01
0.01
0.001
0.0001
f = 1 kHz
BW = 80 kHz
RS = 0 Ω
THD+N (%)
THD+N (%)
DIM 30: 3 kHz − Square Wave, 15 kHz Sine Wave
CCIF Twin Tone: 19 kHz and 20 kHz
SMPTE / DIN: Two −Tone 4:1, 60 Hz and 7 KHz
G = 10V/V, RL = 600Ω
G = 10V/V, RL = 2kΩ
G = +1V/V, RL = 600Ω
G = +1V/V, RL = 2kΩ
G = −1V/V, RL = 600Ω
G = −1V/V, RL = 2kΩ
0.00001
1m
10m
0.001
0.0001
100m
1
Output Amplitude (Vrms)
G=+1V/V
0.00001
100m
10 20
10
20
G012
Figure 13.
Figure 14.
CHANNEL SEPARATION vs FREQUENCY
CMRR AND PSRR vs FREQUENCY (Referred to Input)
140
−80
VOUT = 3 VRMS
Gain = +1 V/V
120
CMRR, PSRR (dB)
−100
Crosstalk (dB)
1
Output Amplitude (Vrms)
G011
−120
−140
100
80
60
40
20
−160
100
1k
10k
0
100
100k
Frequency (Hz)
+PSRR
−PSRR
CMRR
1k
G013
10k
100k
1M
Frequency (Hz)
10M
G014
Figure 15.
Figure 16.
SMALL-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
VIN
VOUT
G = +1 V/V
CL = 10 pF
VS = ±1.5 V
Voltage (25 mV/div)
Voltage (25 mV/div)
VIN
VOUT
100M
G = +1 V/V
CL = 10 pF
Time (1 ms/div)
G015
Figure 17.
Time (1 ms/div)
G040
Figure 18.
8
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Product Folder Link(s): OPA1662 OPA1664
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OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
G = −1 V/V
CL = 10 pF
VS = ±1.5 V
VIN
VOUT
Voltage (25 mV/div)
Voltage (25 mV/div)
VIN
VOUT
G = −1 V/V
CL = 10 pF
Time (1 ms/div)
G016
Figure 19.
Figure 20.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
VIN
VOUT
VIN
VOUT
Voltage (2.5 V/div)
Voltage (250 mV/div)
G = +1 V/V
CL = 10 pF
RF = 1 kW
Time (1 ms/div)
G = +1 V/V
CL = 10 pF
VS = ±1.5 V
Time (1 ms/div)
G017
G032
Figure 21.
Figure 22.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
Voltage (250 mV/div)
Voltage (2.5 V/div)
Time (1 ms/div)
G041
VIN
VOUT
G = −1 V/V
CL = 10 pF
Time (1 ms/div)
G018
Figure 23.
VIN
VOUT
G = −1 V/V
CL = 10 pF
VS = ±1.5 V
Time (1 ms/div)
G035
Figure 24.
9
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Product Folder Link(s): OPA1662 OPA1664
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OPA1664
SBOS489 – DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD
50
50
VOUT = 100 mVPP
G = +1 V/V
+15 V
45
RS
35
RL
-15 V
CL
30
RS = 0 W
RS = 25 W
RS = 50 W
25
20
25
20
15
10
5
5
50
100
150
200
250
Capacitance (pF)
300
350
CL
-15 V
30
10
0
RS
OPA1662
35
15
0
0
400
0
50
300
350
400
G020
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD
50
40
RS = 0 W
RS = 25 W
RS = 50 W
45
40
OPA1662
35
RL
-15 V
CL
Overshoot (%)
Overshoot (%)
150
200
250
Capacitance (pF)
Figure 26.
RS
RS = 0 W
RS = 25 W
RS = 50 W
30
25
VOUT = 100 mVPP
G = +1 V/V
VS = ±1.5 V
20
15
30
25
20
5
5
100
RF = 2 kW
+15 V
RS
10
50
RI = 2 kW
15
10
0
VOUT = 100 mVPP
G = −1 V/V
VS = ±1.5 V
35
150
200
250
Capacitance (pF)
300
350
0
400
OPA1662
CL
-15 V
0
50
100
G034
150
200
250
Capacitance (pF)
300
350
400
G033
Figure 27.
Figure 28.
SMALL-SIGNAL OVERSHOOT
vs FEEDBACK CAPACITOR
PERCENT OVERSHOOT
vs CAPACITIVE LOAD
50
50
VS = ±18 V
VS = ±1.5 V
CF
RI = 2 kW
40
VOUT = 100 mVPP
G = +1 V/V
CL = 100 pF
35
30
25
+15 V
RS
OPA1662
CL
-15 V
20
15
40
35
30
25
20
15
10
10
5
5
0
0
1
2
3
Capacitance (pF)
G = +1 V/V
VIN = 100 mVPP
45
RF = 2 kW
Percent Overshoot (%)
45
Overshoot (%)
100
Figure 25.
+15 V
45
0
RS = 0 W
RS = 25 W
RS = 50 W
VOUT = 100 mVPP
G = −1 V/V
G019
50
0
RF = 2 kW
+15 V
40
OPA1662
Overshoot (%)
Overshoot (%)
40
RI = 2 kW
45
4
5
VS = ± 18 V
VS = ± 1.5 V
0
50
G021
Figure 29.
100
150
200
250
Capacitance (pF)
300
350
400
G037
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
OPEN-LOOP GAIN vs TEMPERATURE
90
4
80
3.5
70
3
50
40
30
2
1.5
1
0.5
20
0
VS = ± 18 V
VS = ± 1.5 V
10
0
RL = 10 kΩ
RL = 2 kΩ
RL = 600 Ω
2.5
60
AOL (µV)
Phase Margin (°)
PHASE MARGIN
vs CAPACITIVE LOAD
0
50
100
−0.5
150
200
250
Capacitance (pF)
300
350
−1
−40
400
−15
10
G036
Figure 31.
IB AND IOS vs TEMPERATURE
110
G022
IB AND IOS vs COMMON-MODE VOLTAGE
IOS
IBP
IBN
0
−200
−400
−600
0
−200
−400
−Ib
+Ib
Ios
−600
−800
−1000
−40
−15
10
35
60
Temperature (°C)
85
110
−800
−18
135
−14
−10
G023
−6
−2
2
6
10
Common−Mode Voltage (V)
Figure 33.
SUPPLY CURRENT vs TEMPERATURE
18
G024
SUPPLY CURRENT vs SUPPLY VOLTAGE
3
1.7
2.5
Supply Current (mA)
Supply Current (mA)
14
Figure 34.
1.8
1.6
1.5
1.4
1.3
1.2
−40
135
200
Ib and Ios Current (nA)
Ib and Ios Current (nA)
85
Figure 32.
400
200
35
60
Temperature (°C)
2
1.5
1
0.5
−15
10
35
60
Temperature (°C)
85
110
135
0
0
4
G025
Figure 35.
8
12
16
20
24
28
Supply Voltage (V)
32
36
40
G026
Figure 36.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
SHORT-CIRCUIT CURRENT vs TEMPERATURE
OUTPUT VOLTAGE vs OUTPUT CURRENT
20
15
55
Output Volage Swing (V)
Short Circuit Current (mA)
60
50
45
40
35
+Isc
−Isc
30
−40
−15
10
−55°C
−40°C
−25°C
0°C
+25°C
+85°C
5
0
−5
−10
−15
10
35
60
Temperature (°C)
85
110
135
−20
20
25
30
G027
35
40
45
Output Current (mA)
50
55
60
G028
Figure 37.
Figure 38.
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
VIN
VOUT
Output Voltage (5V /div)
Output Voltage (5 V/div)
VIN
VOUT
G = −10 V/V
G = −10 V/V
Time (0.5 ms/div)
Time (0.5 ms/div)
G029
Figure 39.
Figure 40.
OPEN-LOOP OUTPUT IMPEDANCE vs
FREQUENCY
NO PHASE REVERSAL
G031
1k
Voltage (5 V/div)
Impedance (Ω)
VOUT
VIN
100
10
1
10
100
1k
10k
Frequency (Hz)
100k
1M
Time (250 ms/div)
G042
G030
Figure 41.
Figure 42.
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APPLICATION INFORMATION
applications do not require equal positive and
negative output voltage swing. With the OPA166x
series, power-supply voltages do not need to be
equal. For example, the positive supply could be set
to +25 V with the negative supply at –5 V.
The OPA1662 and OPA1664 are unity-gain stable,
precision dual and quad op amps with very low noise.
Applications with noisy or high-impedance power
supplies require decoupling capacitors close to the
device pins. In most cases, 0.1-μF capacitors are
adequate. Figure 43 shows a simplified schematic of
the OPA166x (one channel shown).
In all cases, the common-mode voltage must be
maintained within the specified range. In addition, key
parameters are assured over the specified
temperature range of TA = –40°C to +85°C.
Parameters that vary significantly with operating
voltage or temperature are shown in the Typical
Characteristics.
OPERATING VOLTAGE
The OPA166x series op amps operate from ±1.5 V to
±18 V supplies while maintaining excellent
performance. The OPA166x series can operate with
as little as +3 V between the supplies and with up to
+36 V between the supplies. However, some
V+
IN-
IN+
Pre-Output Driver
OUT
V-
Figure 43. OPA166x Simplified Schematic
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The input terminals of the OPA1662 and OPA1664
are protected from excessive differential voltage with
back-to-back diodes, as Figure 44 illustrates. In most
circuit applications, the input protection circuitry has
no consequence. However, in low-gain or G = +1
circuits, fast ramping input signals can forward bias
these diodes because the output of the amplifier
cannot respond rapidly enough to the input ramp. If
the input signal is fast enough to create this forward
bias condition, the input signal current must be limited
to 10 mA or less. If the input signal current is not
inherently limited, an input series resistor (RI) and/or
a feedback resistor (RF) can be used to limit the
signal input current. This resistor degrades the
low-noise performance of the OPA166x and is
examined in the following Noise Performance section.
Figure 44 shows an example configuration when both
current-limiting input and feeback resistors are used.
The equation in Figure 45 shows the calculation of
the total circuit noise, with these parameters:
• en = Voltage noise
• in = Current noise
• RS = Source impedance
• k = Boltzmann’s constant = 1.38 × 10–23 J/K
• T = Temperature in Kelvins (K)
10k
E2o = e2n + (inRS)2 + 4KTRS
EO
Voltage Noise (nV/ Hz)
INPUT PROTECTION
1k
RS
OPA166x
100
OPA165x
10
Resistor Noise
RF
1
100
1k
10k
Source Resistance (W)
-
Input
1M
G003
Figure 45. Noise Performance of the OPA166x in
Unity-Gain Buffer Configuration
OPA166x
RI
100k
Output
+
BASIC NOISE CALCULATIONS
Figure 44. Pulsed Operation
NOISE PERFORMANCE
Figure 45 shows the total circuit noise for varying
source impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions).
The OPA166x (GBW = 22 MHz, G = +1) is shown
with total circuit noise calculated. The op amp itself
contributes both a voltage noise component and a
current noise component. The voltage noise is
commonly modeled as a time-varying component of
the offset voltage. The current noise is modeled as
the time-varying component of the input bias current
and reacts with the source resistance to create a
voltage component of noise. Therefore, the lowest
noise op amp for a given application depends on the
source impedance. For low source impedance,
current noise is negligible, and voltage noise
generally dominates. The low voltage noise of the
OPA166x series op amps makes them a better
choice for low source impedances of less than 1 kΩ.
Design of low-noise op amp circuits requires careful
consideration of a variety of possible noise
contributors: noise from the signal source, noise
generated in the op amp, and noise from the
feedback network resistors. The total noise of the
circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. Figure 45 plots this equation.
The source impedance is usually fixed; consequently,
select the op amp and the feedback resistors to
minimize the respective contributions to the total
noise.
Figure 46 illustrates both inverting and noninverting
op amp circuit configurations with gain. In circuit
configurations with gain, the feedback network
resistors also contribute noise. The current noise of
the op amp reacts with the feedback resistors to
create additional noise components. The feedback
resistor values can generally be chosen to make
these noise sources negligible. The equations for
total noise are shown for both configurations.
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A) Noise in Noninverting Gain Configuration
Noise at the output:
R2
2
R2
EO2 = 1 +
R1
R1
2
en2 +
R2
R1
2
e12 + e22 + 1 +
R2
R1
es2
EO
RS
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
VS
B) Noise in Inverting Gain Configuration
Noise at the output:
R2
2
R2
2
EO = 1 +
R1
RS
e n2 +
R 1 + RS
e12 + e22 +
2
R2
R 1 + RS
e s2
EO
VS
Note:
R1 + RS
2
R2
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
For the OPA166x series of op amps at 1 kHz, en = 3.3 nV/√Hz.
Figure 46. Noise Calculation in Gain Configurations
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TOTAL HARMONIC DISTORTION
MEASUREMENTS
The OPA166x series op amps have excellent
distortion characteristics. THD + noise is below
0.0006% (G = +1, VO = 3 VRMS, BW = 80kHz)
throughout the audio frequency range, 20 Hz to 20
kHz, with a 2-kΩ load (see Figure 7 for characteristic
performance).
The distortion produced by the OPA166x series op
amps is below the measurement limit of many
commercially available distortion analyzers. However,
a special test circuit (such as Figure 47 shows) can
be used to extend the measurement capabilities.
Op amp distortion can be considered an internal error
source that can be referred to the input. Figure 47
shows a circuit that causes the op amp distortion to
be gained up (refer to the table in Figure 47 for the
distortion gain factor for various signal gains). The
addition of R3 to the otherwise standard noninverting
amplifier configuration alters the feedback factor or
noise gain of the circuit. The closed-loop gain is
unchanged, but the feedback available for error
correction is reduced by the distortion gain factor,
thus extending the resolution by the same amount.
Note that the input signal and load applied to the op
amp are the same as with conventional feedback
without R3. The value of R3 should be kept small to
minimize its effect on the distortion measurements.
R1
The validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
measurements. The measurement technique can,
however, be performed with manual distortion
measurement instruments.
CAPACITIVE LOADS
The dynamic characteristics of the OPA1662 and
OPA1664 have been optimized for commonly
encountered gains, loads, and operating conditions.
The combination of low closed-loop gain and high
capacitive loads decreases the phase margin of the
amplifier and can lead to gain peaking or oscillations.
As a result, heavier capacitive loads must be isolated
from the output. The simplest way to achieve this
isolation is to add a small resistor (RS equal to 50 Ω,
for example) in series with the output.
This small series resistor also prevents excess power
dissipation if the output of the device becomes
shorted. Figure 25 illustrates a graph of Small-Signal
Overshoot vs Capacitive Load for several values of
RS. Also, refer to Applications Bulletin AB-028
(literature number SBOA015, available for download
from the TI web site) for details of analysis
techniques and application circuits.
R2
SIGNAL DISTORTION
GAIN
GAIN
R3
Signal Gain = 1+
OPA166x
VO = 3 VRMS
R2
R1
Distortion Gain = 1+
R2
R1 II R3
Generator
Output
R1
R2
R3
¥
1 kW
10 W
+1
101
-1
101
4.99 kW 4.99 kW 49.9 W
+10
110
549 W 4.99 kW 49.9 W
Analyzer
Input
Audio Precision
System Two(1)
with PC Controller
Load
(1) For measurement bandwidth, see Figure 7 through Figure 12.
Figure 47. Distortion Test Circuit
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POWER DISSIPATION
The OPA1662 and OPA1664 series op amps are
capable of driving 2-kΩ loads with a power-supply
voltage up to ±18 V and full operating temperature
range. Internal power dissipation increases when
operating at high supply voltages. Copper leadframe
construction used in the OPA166x series op amps
improves heat dissipation compared to conventional
materials. Circuit board layout can also help minimize
junction temperature rise. Wide copper traces help
dissipate the heat by acting as an additional heat
sink. Temperature rise can be further minimized by
soldering the devices to the circuit board rather than
using a socket.
ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
It is helpful to have a good understanding of this
basic ESD circuitry and its relevance to an electrical
overstress event. Figure 48 illustrates the ESD
circuits contained in the OPA166x (indicated by the
dashed line area). The ESD protection circuitry
involves several current-steering diodes connected
from the input and output pins and routed back to the
internal power-supply lines, where they meet at an
absorption device internal to the operational amplifier.
This protection circuitry is intended to remain inactive
during normal circuit operation.
An ESD event produces a short duration,
high-voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When the operational amplifier connects into a circuit
such as that illustrated in Figure 48, the ESD
protection components are intended to remain
inactive and not become involved in the application
circuit operation. However, circumstances may arise
where an applied voltage exceeds the operating
voltage range of a given pin. Should this condition
occur, there is a risk that some of the internal ESD
protection circuits may be biased on, and conduct
current. Any such current flow occurs through
steering diode paths and rarely involves the
absorption device.
Figure 48 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500 mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
+VS can sink the current, one of the upper input
steering diodes conducts and directs current to +VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10 mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings. In extreme but
rare cases, the absorption device triggers on while
+VS and –VS are applied. If this event happens, a
direct current path is established between the +VS
and –VS supplies. The power dissipation of the
absorption device is quickly exceeded, and the
extreme internal heating destroys the operational
amplifier.
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies +VS and/or –VS are at 0 V.
Again, it depends on the supply characteristic while at
0 V, or at a level below the input signal amplitude. If
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device internal to the
OPA166x triggers when a fast ESD voltage pulse is
impressed across the supply pins. Once triggered, it
quickly activates, clamping the ESD pulse to a safe
voltage level.
17
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If there is an uncertainty about the ability of the
supply to absorb this current, external zener diodes
may be added to the supply pins as shown in
Figure 48.
The zener voltage must be selected such that the
diode does not turn on during normal operation.
However, its zener voltage should be low enough so
that the zener diode conducts if the supply pin begins
to rise above the safe operating supply voltage level.
TVS
RF
+VS
+V
OPA166x
RI
ESD CurrentSteering Diodes
-In
RS
+In
Op-Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
Out
RL
(1)
-V
-VS
TVS
(1) VIN = +VS + 500mV.
Figure 48. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application (Single
Channel Shown)
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APPLICATION CIRCUIT
An additional application idea is shown in Figure 49.
820 W
2200 pF
+VA
(+15 V)
0.1 mF
330 W
IOUTL+
OPA166x
2700 pF
-VA
(-15 V)
680 W
620 W
Audio DAC
with Differential
Current
Outputs
0.1 mF
+VA
(+15 V)
0.1 mF
100 W
820 W
OPA166x
8200 pF
2200 pF
+VA
(+15 V)
L Ch
Output
-VA
(-15 V)
0.1 mF
0.1 mF
680 W
620 W
IOUTLOPA166x
330 W
2700 pF
-VA
(-15 V)
0.1 mF
Figure 49. Audio DAC I/V Converter and Output Filter
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
OPA1662AID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OP1662
OPA1662AIDGK
ACTIVE
VSSOP
DGK
8
80
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
OUQI
OPA1662AIDGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
OUQI
OPA1662AIDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OP1662
OPA1664AID
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1664
OPA1664AIDR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1664
OPA1664AIPW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1664
OPA1664AIPWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1664
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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