OPA836, OPA2836
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
OPAx836 Very-Low-Power, Rail-to-Rail Out, Negative Rail In, Voltage-Feedback
Operational Amplifiers
1 Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low Power:
– Supply Voltage: 2.5 V to 5.5 V
– Quiescent Current: 1 mA (Typical)
– Power Down Mode: 0.5 µA (Typical)
Bandwidth: 205 MHz
Slew Rate: 560 V/µs
Rise Time: 3 ns (2 VSTEP)
Settling Time (0.1%): 22 ns (2 VSTEP)
Overdrive Recovery Time: 60 ns
SNR: 0.00013% (–117.6 dBc) at 1 kHz (1 VRMS)
THD: 0.00003% (–130 dBc) at 1 kHz (1 VRMS)
HD2/HD3: –85 dBc/–105 dBc at 1 MHz (2 VPP)
Input Voltage Noise: 4.6 nV/√ Hz (f = 100 kHz)
Input Offset Voltage: 65 µV (±400-µV Maximum)
CMRR: 116 dB
Output Current Drive: 50 mA
RRO: Rail-to-Rail Output
Input Voltage Range: –0.2 V to +3.9 V
(5-V Supply)
Operating Temperature Range:
–40°C to +125°C
versus-power capability that is not attainable in other
devices. Coupled with a power-savings mode to
reduce current to < 1.5 μA, these devices offer an
attractive solution for high-frequency amplifiers in
battery-powered applications.
The OPA836 RUN package option includes integrated
gain-setting resistors for the smallest possible
footprint on a printed-circuit board (approximately 2.00
mm × 2.00 mm). By adding circuit traces on the
PCB, gains of +1, –1, –1.33, +2, +2.33, –3, +4, –4,
+5, –5.33, +6.33, –7, +8 and inverting attenuations
of –0.1429, –0.1875, –0.25, –0.33, –0.75 can be
achieved. See Table 9-1 and Table 9-2 for details.
The OPA836 and OPA2836 devices are characterized
for operation over the extended industrial temperature
range of –40°C to +125°C.
Device Information(1)
PART NUMBER
OPA836
OPA2836
2 Applications
Low-Power Signal Conditioning
Audio ADC Input Buffers
Low-Power SAR and ΔΣ ADC Drivers
Portable Systems
Low-Power Systems
High-Density Systems
3 Description
The OPA836 and OPA2836 devices (OPAx836) are
single- and dual-channel, ultra-low power, rail-to-rail
output, negative-rail input, voltage-feedback (VFB)
operational amplifiers designed to operate over a
power-supply range of 2.5 V to 5.5 V with a single
supply, or ±1.25 V to ±2.75 V with a dual supply.
Consuming only 1 mA per channel and a unitygain bandwidth of 205 MHz, these amplifiers set an
industry-leading power-to-performance ratio for rail-torail amplifiers.
(1)
BODY SIZE (NOM)
2.90 mm × 1.60 mm
WQFN (10)
2.00 mm × 2.00 mm
SOIC (8)
4.90 mm × 3.91 mm
VSSOP (10)
3.00 mm × 3.00 mm
UQFN (10)
2.00 mm × 2.00 mm
WQFN (10)
2.00 mm × 2.00 mm
See the package option addendum at the end of the data
sheet for all available packages.
-40
VS = 2.7 V,
-50 G = 1,
VOUT = 1 Vpp,
-60 R = 0 W,
F
Harmonic Distortion - dBc
•
•
•
•
•
•
PACKAGE
SOT-23 (6)
-70
RL = 1 kW
-80
-90
HD2
-100
-110
HD3
-120
-130
-140
10k
100k
1M
10M
f - Frequency - Hz
Harmonic Distortion vs Frequency
For battery-powered, portable applications where
power is of key importance, the low-power
consumption and high-frequency performance of the
OPA836 and OPA2836 devices offer performanceAn IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................5
6 Pin Configuration and Functions...................................6
7 Specifications.................................................................. 8
7.1 Absolute Maximum Ratings........................................ 8
7.2 ESD Ratings............................................................... 8
7.3 Recommended Operating Conditions.........................8
7.4 Thermal Information: OPA836.................................... 8
7.5 Thermal Information: OPA2836.................................. 9
7.6 Electrical Characteristics: VS = 2.7 V.......................... 9
7.7 Electrical Characteristics: VS = 5 V........................... 12
7.8 Typical Characteristics: VS = 2.7 V........................... 15
7.9 Typical Characteristics: VS = 5 V.............................. 20
8 Detailed Description......................................................25
8.1 Overview................................................................... 25
8.2 Functional Block Diagrams....................................... 25
8.3 Feature Description...................................................25
8.4 Device Functional Modes..........................................28
9 Application and Implementation.................................. 31
9.1 Application Information............................................. 31
9.2 Typical Applications.................................................. 37
10 Power Supply Recommendations..............................41
11 Layout........................................................................... 42
11.1 Layout Guidelines................................................... 42
11.2 Layout Example...................................................... 43
12 Device and Documentation Support..........................44
12.1 Device Support....................................................... 44
12.2 Receiving Notification of Documentation Updates..44
12.3 Support Resources................................................. 44
12.4 Electrostatic Discharge Caution..............................44
12.5 Glossary..................................................................44
13 Mechanical, Packaging, and Orderable
Information.................................................................... 44
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (October 2016) to Revision J (March 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Changed the input impedance common mode conditions From: = 200 || 1.2 kΩ || pF (Typical) To: 100 || 1.2
MΩ || pF (Typical)................................................................................................................................................9
• Changed the input impedance differential mode conditions From: = 200 || 1 kΩ || pF (Typical) To: 100 || 1 kΩ ||
pF (Typical)......................................................................................................................................................... 9
• Changed the input impedance common mode conditions From: = 200 || 1.2 kΩ || pF (Typical) To: 100 || 1.2
MΩ || pF (Typical)..............................................................................................................................................12
• Changed the input impedance differential mode conditions From: = 200 || 1 kΩ || pF (Typical) To: 100 || 1 kΩ ||
pF (Typical)....................................................................................................................................................... 12
Changes from Revision H (September 2016) to Revision I (October 2016)
Page
• Changed text in sections throughout the data sheet to be more clear and concise........................................... 1
• Changed "RG = ∞Ω (open)" to "RG = open"......................................................................................................32
• Changed "gain tracking is superior to using" to "gain drift is superior to the drift with".....................................35
• Changed "results in degraded harmonic distortion" to "increases the harmonic distortion" ............................ 38
• Deleted "A 10-Ω series resistor can be inserted between the capacitor and the noninverting pin to isolate the
capacitance.".................................................................................................................................................... 39
Changes from Revision G (October 2015) to Revision H (September 2016)
Page
• Changed "Type" column header to "I/O" on Pin Functions table ....................................................................... 6
• Reformatted header rows in Thermal Information: OPA836 and Thermal Information: OPA2836 tables ..........8
• Reformatted Thermal Information table note ..................................................................................................... 8
• Reformatted Thermal Information table note ..................................................................................................... 9
• Deleted the word "linear" from Output section parameters in Electrical Characteristics VS = 2.7 V table ......... 9
• Deleted the word "linear" from Output section parameters in Electrical Characteristics VS = 5 V table .......... 12
• Reformatted Development Support subsection ............................................................................................... 44
• Reformatted Related Documentation section .................................................................................................. 44
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
Changes from Revision E (September 2013) to Revision F (June 2015)
Page
• Changed Features section..................................................................................................................................1
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ............................................................................................................................................................... 1
• Changed Device Comparison Table .................................................................................................................. 5
• Changed Pin Functions table..............................................................................................................................6
• Changed Open Loop Gain vs Frequency graph............................................................................................... 15
• Changed Input Referred Noise vs Frequency graph ....................................................................................... 15
• Changed Open Loop Gain vs Frequency graph .............................................................................................. 20
• Changed Input Referred Noise vs Frequency graph........................................................................................ 20
Changes from Revision D (October 2011) to Revision E (September 2013)
Page
• Added OPA2836 RMC package to document.....................................................................................................1
• Added RMC pin definitions to Pin Functions table..............................................................................................6
• Deleted Packaging/Ordering Information table, leaving only note to POA......................................................... 8
• Added OPA2836 RMC package to Thermal Information table........................................................................... 9
Changes from Revision C (September 2011) to Revision D (September 2011)
Page
• Removed Product Preview from OPA835IRUNT and OPA835IRUNR............................................................... 5
• Removed Product Preview from OPA836IRUNT and OPA836IRUNR............................................................... 8
• Changed typical value for resistor temperature coefficien parameter from TBD to < 10.................................... 9
• Changed "quiescent operating current" parameter to "quiescent operating current per amplifier".....................9
• Changed resistor temperature coefficient typical value from TBD to < 10........................................................12
• Changed "quiescent operating current" to "quiescent operating current per amplifier".................................... 12
Changes from Revision B (May 2011) to Revision C (August 2011)
Page
• Added the "The OPA836 RUN package..." text to the Description..................................................................... 1
• Removed Product Preview from all devices except OPA835IRUNT and OPA835IRUNR..................................5
• Removed Product Preview from all devices except OPA836IRUNT and OPA836IRUNR..................................8
• Changed typical value for channel to channel crosstalk (OPA2836) parameter from TBD to –120 dB.............. 9
• Changed the common-mode rejection ratio minimum value from 94 dB to 91 dB............................................. 9
• Added Gain Setting Resistors (OPA836IRUN ONLY) parameter in Electrical Characteristics table.................. 9
• Changed the quiescent operating current (TA = 25°C) minimum value from 0.8 mA to 0.7 mA......................... 9
• Changed the minimum value for power supply rejection (±PSRR) parameter from 95 dB to 91 dB.................. 9
• Changed the power-down pin bias current test condition from PD = 0.7 V to PD = 0.5 V..................................9
• Changed the power-down quiescent current test condition from PD = 0.7 V to PD = 0.5 V...............................9
• Changed typical value for channel to channel crosstalk (OPA2836) parameter from TBD to –120 dB............ 12
• Changed the Common-mode rejection ratio Min value From: 97 dB To: 94 dB............................................... 12
• Added GAIN SETTING RESISTORS (OPA836I RUN ONLY) parameter to Electrical Characteristics table....12
• Changed the quiescent operating current (TA = 25°C) minimum value from 0.9 mA to 0.8 mA....................... 12
• Changed the power supply rejection (±PSRR) minimum value from: 97 dB to 94 dB......................................12
• Changed the Power-down quiescent current CONDITIONS From: PD = 0.7 V To: PD = 0.5 V.......................12
• Changed the Power-down quiescent current Conditions From: PD = 0.7 V To: PD = 0.5 V............................ 12
• Added Figure Crosstalk vs Frequency..............................................................................................................15
• Added Crosstalk vs Frequency figure...............................................................................................................20
• Added section Single Ended to Differential Amplifier ...................................................................................... 32
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
3
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
Changes from Revision A (March 2011) to Revision B (May 2011)
Page
• Changed OPA836 from product preview to production data.............................................................................. 1
4
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
5 Device Comparison Table
BW (AV = 1)
(MHz)
SLEW RATE
(V/µs)
Iq (+5 V)
(mA)
INPUT NOISE
(nV/√ Hz)
RAIL-TO-RAIL
IN/OUT
DUALS
OPA836
205
560
1
4.6
–VS/Out
OPA2836
OPA835
30
110
0.25
9.3
–VS/Out
OPA2835
OPA365
50
25
5
4.5
In/Out
OPA2365
THS4281
95
35
0.75
12.5
In/Out
LMH6618
140
45
1.25
10
In/Out
LMH6619
OPA830
310
600
3.9
9.5
–VS/Out
OPA2830
DEVICE
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
5
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
6 Pin Configuration and Functions
VS+
VOUT1
1
VS+
9
10
VOUT
VOUT2
1
10
9
FB1
8
FB2
7
FB3
6
FB4
1.6k
VIN1-
2
+ -
- +
- +
8
VIN2-
VINVIN+
3
PD
4
2
1.2k
VIN1+
3
7
VIN2+
PD1
4
6
PD2
400
5
5
VS-
VS-
Figure 6-1. OPA2836 RUN, RMC Packages 10-Pin
WQFN, UQFN Top View
VOUT1
1
VIN1-
2
VIN1+
3
VS-
4
+
+
8
VS+
7
VOUT2
6
VIN2-
5
VIN2+
Figure 6-3. OPA2836 D Package 8-Pin SOIC Top
View
VOUT1
1
VIN1-
2
VIN1+
3
VS-
4
PD1
5
Figure 6-2. OPA836 RUN Package 10-Pin WQFN
Top View
VOUT
1
VS-
2
VIN+
3
6
VS+
5
PD
4
VIN-
+ -
Figure 6-4. OPA836 DBV Package 6-Pin SOT-23 Top
View
10
+
+
VS+
9
VOUT2
8
VIN2-
7
VIN2+
6
PD2
Figure 6-5. OPA2836 DGS Package 10-Pin VSSOP Top View
6
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
Table 6-1. Pin Functions
PIN
OPA836
NAME
SOT-23
OPA2836
WQFN
SOIC
VSSOP
I/O
DESCRIPTION
WQFN,
UQFN
FB1
9
I/O
Connection to top of 2.4-kΩ internal gain setting resistors
FB2
8
I/O
Connection to junction of 1.8-kΩ and 2.4-kΩ internal gain
setting resistors
I/O
Connection to junction of 600-Ω and 1.8-kΩ internal gain
setting resistors
I/O
Connection to bottom of 600-Ω internal gain setting resistors
—
FB3
7
FB4
6
PD
5
4
—
—
I
Amplifier 1 Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
6
6
I
Amplifier 2 Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
—
—
I
Amplifier noninverting input
I
Amplifier inverting input
3
3
3
I
Amplifier 1 noninverting input
2
2
2
I
Amplifier 1 inverting input
5
7
7
I
Amplifier 2 noninverting input
—
VIN+
3
3
VIN–
4
2
VIN1+
—
—
1
1
—
—
VS+
6
VS–
2
VIN2+
VIN2–
VOUT
VOUT1
VOUT2
Amplifier Power Down, low = low-power mode,
high = normal operation (PIN MUST BE DRIVEN)
4
PD2
VIN1–
I
5
PD1
—
—
6
8
8
I
Amplifier 2 inverting input
—
—
—
O
Amplifier output
1
1
1
O
Amplifier 1 output
7
9
9
O
Amplifier 2 output
10
8
10
10
POW
Positive power supply input
5
4
4
5
POW
Negative power supply input
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
7
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
VS– to VS+
Supply voltage
VS– – 0.7
MAX
UNIT
5.5
V
VI
Input voltage
VS+ + 0.7
V
VID
Differential input voltage
1
V
II
Continuous input current
0.85
mA
IO
Continuous output current
60
mA
See Section 7.4
and
Section 7.5
Continuous power dissipation
TJ
Maximum junction temperature
150
°C
TA
Operating free-air temperature
–40
125
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC
V(ESD)
Electrostatic discharge
JS-001(1)
UNIT
±6000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1000
Machine model
±200
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VS+
Single supply voltage
2.5
5
5.5
V
TA
Ambient temperature
–40
25
125
°C
7.4 Thermal Information: OPA836
OPA836
THERMAL
DBV (SOT23-6) RUN (WQFN-10)
6 PINS
10 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
194
145.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
129.2
75.1
°C/W
RθJB
Junction-to-board thermal resistance
39.4
38.9
°C/W
ψJT
Junction-to-top characterization parameter
25.6
13.5
°C/W
ψJB
Junction-to-board characterization parameter
38.9
104.5
°C/W
(1)
8
METRIC(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
7.5 Thermal Information: OPA2836
OPA2836
THERMAL METRIC(1)
D (SOIC-8)
(DGS) VSSOP,
MSOP-10
(RUN)
WQFN-10
RMC
(UQFN-10)
8 PINS
10 PINS
10 PINS
10 PINS
150.1
206
145.8
143.2
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJCtop
Junction-to-case (top) thermal resistance
83.8
75.3
75.1
49.0
°C/W
RθJB
Junction-to-board thermal resistance
68.4
96.2
38.9
61.9
°C/W
ψJT
Junction-to-top characterization parameter
33.0
12.9
13.5
3.3
°C/W
ψJB
Junction-to-board characterization parameter
67.9
94.6
104.5
61.9
°C/W
(1)
°C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).
7.6 Electrical Characteristics: VS = 2.7 V
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL(1)
MHz
C
AC PERFORMANCE
Small-signal bandwidth
VOUT = 100 mVPP, G = 1
200
VOUT = 100 mVPP, G = 2
100
VOUT = 100 mVPP, G = 5
26
VOUT = 100 mVPP, G = 10
11
Gain-bandwidth product
VOUT = 100 mVPP, G = 10
110
MHz
C
Large-signal bandwidth
VOUT = 1 VPP, G = 2
60
MHz
C
Bandwidth for 0.1-dB flatness
VOUT = 1 VPP, G = 2
25
MHz
C
Slew rate, rise
VOUT = 1 VSTEP, G = 2
260
V/µs
C
Slew rate, fall
VOUT = 1 VSTEP, G = 2
240
V/µs
C
Rise time
VOUT = 1 VSTEP, G = 2
4
ns
C
Fall time
VOUT = 1 VSTEP, G = 2
4.5
ns
C
Settling time to 1%, rise
VOUT = 1 VSTEP, G = 2
15
ns
C
Settling time to 1%, fall
VOUT = 1 VSTEP, G = 2
15
ns
C
Settling time to 0.1%, rise
VOUT = 1 VSTEP, G = 2
30
ns
C
Settling time to 0.1%, fall
VOUT = 1 VSTEP, G = 2
25
ns
C
Settling time to 0.01%, rise
VOUT = 1 VSTEP, G = 2
50
ns
C
Settling time to 0.01%, fall
VOUT = 1 VSTEP, G = 2
45
ns
C
Overshoot/Undershoot
VOUT = 1 VSTEP, G = 2
5%/3%
Second-order harmonic distortion
f = 10 kHz, VIN_CM = mid-supply – 0.5 V
–133
f = 100 kHz, VIN_CM = mid-supply – 0.5 V
–120
C
C
dBc
C
f = 1 MHz, VIN_CM = mid-supply – 0.5 V
–84
f = 10 kHz, VIN_CM = mid-supply – 0.5 V
–137
Third-order harmonic distortion
f = 100 kHz, VIN_CM = mid-supply – 0.5 V
–130
f = 1 MHz, VIN_CM = mid-supply – 0.5 V
–105
Second-order intermodulation distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP
VIN_CM = mid-supply – 0.5 V
–90
dBc
C
Third-order intermodulation distortion
f = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP
VIN_CM = mid-supply – 0.5 V
–90
dBc
C
Input voltage noise
f = 100 KHz
Voltage noise 1/f corner frequency
Input current noise
f = 1 MHz
C
C
dBc
C
C
4.6
nV/√ Hz
C
215
Hz
C
0.75
pA/√ Hz
C
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
9
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
7.6 Electrical Characteristics: VS = 2.7 V (continued)
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL(1)
AC PERFORMANCE (continued)
Current noise 1/f corner frequency
31.7
kHz
C
55/60
ns
C
f = 100 kHz
0.02
Ω
C
f = 10 kHz
–120
dB
C
Overdrive recovery time, over/under
Overdrive = 0.5 V
Closed-loop output impedance
Channel-to-channel crosstalk (OPA2836)
DC PERFORMANCE
Open-loop voltage gain (AOL)
Input referred offset voltage
100
125
TA = 25°C
–400
±65
TA = 0°C to 70°C
–680
680
TA = –40°C to 85°C
–760
760
TA = –40°C to 125°C
–1060
TA = 0°C to 70°C
Input offset voltage drift(2)
Input bias current(3)
±1
–6
±1
6
TA = –40°C to 125°C
–6.6
±1.1
6.6
650
TA = –40°C to 85°C
Input offset current
Input offset current
drift(2)
A
A
µV
B
1060
–6.2
6.2
TA = 25°C
300
TA = 0°C to 70°C
190
1400
TA = –40°C to 85°C
120
1500
TA = –40°C to 125°C
120
1800
TA = 0°C to 70°C
Input bias current drift(2)
dB
400
µV/°C
1000
–2
±0.33
2
TA = –40°C to 85°C
–1.9
±0.32
1.9
TA = –40°C to 125°C
–2.1
±0.37
2.1
TA = 25°C
–180
±30
180
TA = 0°C to 70°C
–200
±30
200
TA = –40°C to 85°C
–215
±30
215
TA = –40°C to 125°C
–240
±30
240
TA = 0°C to 70°C
–460
±77
460
TA = –40°C to 85°C
–575
±95
575
TA = –40°C to 125°C
–600
±100
600
TA = 25°C,
< 3-dB degradation in CMRR limit
–0.2
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
–0.2
B
A
nA
nA/°C
B
B
A
nA
B
pA/°C
B
0
V
A
0
V
B
INPUT
Common-mode input range low
Common-mode input range high
Input operating voltage range
TA = 25°C,
< 3-dB degradation in CMRR limit
1.5
1.6
V
A
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
1.5
1.6
V
B
–0.3 to
1.75
V
C
TA = 25°C,
< 6-dB degradation in THD
Common-mode rejection ratio
91
Input impedance common-mode
Input impedance differential mode
10
Submit Document Feedback
dB
A
100 || 1.2
114
MΩ || pF
C
100 || 1
kΩ || pF
C
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
7.6 Electrical Characteristics: VS = 2.7 V (continued)
at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM =
mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
UNIT
TEST
LEVEL(1)
0.2
V
A
0.2
V
B
TYP
MAX
TA = 25°C, G = 5
0.15
TA = –40°C to 125°C, G = 5
0.15
OUTPUT
Output voltage low
Output voltage high
Output saturation voltage, high/low
Output current drive
TA = 25°C, G = 5
2.45
2.5
V
A
TA = –40°C to 125°C, G = 5
2.45
2.5
V
B
C
TA = 25°C, G = 5
80/40
mV
TA = 25°C
±40
±45
mA
A
TA = –40°C to 125°C
±40
±45
mA
B
GAIN SETTING RESISTORS (OPA836IRUN ONLY)
Resistor FB1 to FB2
DC resistance
1584
1600
1616
Ω
A
Resistor FB2 to FB3
DC resistance
1188
1200
1212
Ω
A
Resistor FB3 to FB4
DC resistance
396
400
404
Ω
A
Resistor tolerance
DC resistance
–1%
Resistor temperature coefficient
DC resistance
PPM
C
5.5
V
B
1.15
mA
A
1.4
mA
B
dB
A
2.1
V
A
1%
1 MHz
Current noise 1/f corner frequency
dBc
C
C
4.6
nV/√ Hz
C
215
Hz
C
0.75
pA/√ Hz
C
31.7
kHz
C
55/60
ns
C
Overdrive recovery time, over/under
Overdrive = 0.5 V
Closed-loop output impedance
f = 100 kHz
0.02
Ω
C
Channel to channel crosstalk (OPA2836)
f = 10 kHz
–120
dB
C
DC PERFORMANCE
Open-loop voltage gain (AOL)
TA = 25°C
Input referred offset voltage
12
100
122
–400
±65
dB
400
TA = 0°C to 70°C
–685
685
TA = –40°C to 85°C
–765
765
TA = –40°C to 125°C
–1080
1080
Submit Document Feedback
A
A
µV
B
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA836 OPA2836
OPA836, OPA2836
www.ti.com
SLOS712J – JANUARY 2011 – REVISED MARCH 2021
7.7 Electrical Characteristics: VS = 5 V (continued)
at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA =
25°C, unless otherwise noted.
PARAMETER
Input offset voltage drift(2)
Input bias current(3)
Input bias current drift(2)
TEST CONDITIONS
MIN
TYP
MAX
TA = 0°C to 70°C
–6.3
±1.05
6.3
TA = –40°C to 85°C
–6.1
±1
6.1
TA = –40°C to 125°C
–6.8
±1.1
6.8
650
1000
TA = 25°C
300
TA = 0°C to 70°C
190
1400
TA = –40°C to 85°C
120
1550
TA = –40°C to 125°C
120
1850
TA = 0°C to 70°C
±0.34
±2
TA = –40°C to 85°C
±0.34
±2
TA = –40°C to 125°C
±0.38
±2.3
UNIT
TEST
LEVEL(1)
µV/°C
B
A
nA
nA/°C
B
B
DC PERFORMANCE (continued)
Input offset current
Input offset current
drift(2)
TA = 25°C
±30
±180
TA = 0°C to 70°C
±30
±200
TA = –40°C to 85°C
±30
±215
TA = –40°C to 125°C
±30
±250
TA = 0°C to 70°C
±80
±480
TA = –40°C to 85°C
±100
±600
TA = –40°C to 125°C
±110
±660
TA = 25°C,
< 3-dB degradation in CMRR limit
–0.2
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
–0.2
A
nA
B
pA/°C
B
0
V
A
0
V
B
INPUT
Common-mode input range low
Common-mode input range high
Input linear operating voltage range
TA = 25°C,
< 3-dB degradation in CMRR limit
3.8
3.9
V
A
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
3.8
3.9
V
B
–0.3 to 4.05
V
C
TA = 25°C,
< 6-dB degradation in THD
Common-mode rejection ratio
94
Input impedance common mode
Input impedance differential mode
dB
A
100 || 1.2
116
MΩ || pF
C
100 || 1
kΩ || pF
C
OUTPUT
Output voltage low
Output voltage high
Output saturation voltage, high/low
Output current drive
TA = 25°C, G = 5
TA = –40°C to 125°C, G = 5
0.15
0.2
V
A
0.15
0.2
V
B
TA = 25°C, G = 5
4.75
4.8
V
A
TA = –40°C to 125°C, G = 5
4.75
4.8
V
B
100/50
mV
C
TA = 25°C, G = 5
TA = 25°C
±40
±50
mA
A
TA = –40°C to 125°C
±40
±50
mA
B
GAIN SETTING RESISTORS (OPA836IRUN ONLY)
Resistor FB1 to FB2
DC resistance
1584
1600
1616
Ω
A
Resistor FB2 to FB3
DC resistance
1188
1200
1212
Ω
A
Resistor FB3 to FB4
DC resistance
396
400
404
Ω
A
Resistor tolerance
DC resistance
–1
Resistor temperature coefficient
DC resistance
1%
36.6
工商网监
湘ICP备2023018690号
