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OPA602AP

OPA602AP

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    PDIP8_10.16X6.6MM

  • 描述:

    IC OPAMP GP 6.5MHZ 8DIP

  • 数据手册
  • 价格&库存
OPA602AP 数据手册
® OPA602 High-Speed Precision Difet ® OPERATIONAL AMPLIFIER FEATURES q q q q q q WIDE BANDWIDTH: 6.5MHz HIGH SLEW RATE: 35V/µs LOW OFFSET: ±250µV max LOW BIAS CURRENT: ±1pA max FAST SETTLING TIME: 1µs to 0.01% UNITY-GAIN STABLE APPLICATIONS q q q q q q PRECISION INSTRUMENTATION OPTOELECTRONICS SONAR, ULTRASOUND PROFESSIONAL AUDIO EQUIPMENT MEDICAL EQUIPMENT DATA CONVERSION DESCRIPTION The OPA602 is a precision, wide bandwidth FET operational amplifier. Monolithic Difet (dielectrically isolated FET) construction provides an unusual combination of high speed and accuracy. Its wide-bandwidth design minimizes dynamic errors. High slew rate and fast settling time allow accurate signal processing in pulse and data conversion applications. Wide bandwidth and low distortion minimize AC errors. All specifications are rated with a 1kΩ resistor in parallel with 500pF load. The OPA602 is unity-gain stable and easily drives capacitive loads up to 1500pF. Laser-trimmed input circuitry provides offset voltage and drift performance normally associated with precision bipolar op amps. Difet construction achieves extremely low input bias currents (1pA max) without compromising input voltage noise. The OPA602’s unique input cascode circuitry maintains low input bias current and precise input characteristics over its full input common-mode voltage range. Difet® Burr-Brown Corp. +V S (7) –In (2) +In (3) Cascode Output (6) –V S (4) (1) (5) International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • © • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PDS-753E Printed in U.S.A. August, 1995 1987 Burr-Brown Corporation SPECIFICATIONS ELECTRICAL At VS = ±15VDC and TA = +25°C unless otherwise noted. OPA602AM/AP/AU PARAMETER INPUT NOISE Voltage: fO = 10Hz fO = 100Hz fO = 1kHz fO = 10kHz fB = 10Hz to 10kHz fB = 0.1Hz to 10Hz Current: fB = 0.1Hz to 10Hz fO= 0.1Hz to 20kHz OFFSET VOLTAGE Input Offset Voltage: M Package P Package U Package Over Specified Temperature M Package P, U Packages Average Drift Supply Rejection BIAS CURRENT Input Bias Current Over Specified Temperature SM Grade OFFSET CURRENT Input Offset Current Over Specified Temperature SM Grade INPUT IMPEDANCE Differential Common-Mode INPUT VOLTAGE RANGE Common-Mode Input Range Common-Mode Rejection OPEN-LOOP GAIN, DC Open-Loop Voltage Gain FREQUENCY RESPONSE Gain Bandwidth Full Power Response Slew Rate Settling Time: 0.1% 0.01% RATED OUTPUT Voltage Output Current Output Output Resistance Load Capacitance Stability Short Circuit Current POWER SUPPLY Rated Voltage Voltage Range, Derated Performance Current, Quiescent Over Specified Temperature TEMPERATURE RANGE Specification SM Grade Operating: M Package P, U Packages Storage: M Package P, U Packages θ JA * Same specifications as OPA602BM. ® OPA602BM/SM/BP MIN TYP 23 19 13 12 1.4 0.95 12 0.6 MAX MIN OPA602CM TYP * * * * * * * * MAX UNITS nV/√Hz nV/√Hz nV/√Hz nV/√Hz µVrms µVp-p fAp-p fA/√Hz CONDITIONS MIN TYP * * * * * * * * MAX VCM = 0VDC ±300 1 1 ±550 ±1.5 * * ±2 ±20 ±1000 2 3 ±150 0.5 ±500 1 ±100 ±250 µV mV mV µV mV µV/°C dB pA pA pA pA pA pA Ω || pF Ω || pF V dB dB MHz kHz V/µs µs µs V mA Ω pF mA VDC TA = TMIN to TMAX ±VS = 12V to 18V VCM = 0VDC ±15 80 ±10 ±500 70 ±250 ±0.75 ±3 100 ±1 ±20 ±200 0.5 20 200 1013 || 1 1014 || 3 ±1000 ±1.5 ±5 86 ±2 ±200 ±2000 2 200 1000 ±200 * * ±0.5 ±10 ±500 ±2 ±1 ±100 VCM = 0VDC 1 20 10 500 0.5 10 1 100 * * * VIN = ±10VDC RL ≥ 1kΩ Gain = 100 20Vp-p, RL = 1kΩ VO = ±10V, RL = 1kΩ Gain = –1, RL = 1kΩ CL = 500pF, 10V Step RL = 1kΩ VO = ±10VDC 1MHz, Open Loop Gain = +1 75 75 3.5 20 * * * * * * * * * * * * * * * IO = 0mADC * * * * –25 * –40 * * * * * * +85 * +125 ±5 ±10.2 88 88 4 24 * * * 92 92 5 28 * * * * * * * * * * * * * * ±18 4 4.5 +85 +125 +125 +85 +150 +125 * * * * * * * * * * * * * +13, –11 100 100 6.5 570 35 0.6 1.0 +12.9, –13.8 ±20 80 1500 ±50 ±15 ±11 * ±11.5 ±15 * * ±25 ±30 * 3 3.5 –25 –55 –55 –25 –65 –40 200 VDC mA mA °C °C °C °C °C °C °C/W Ambient Temperature Ambient Temperature Ambient Temperature OPA602 2 ABSOLUTE MAXIMUM RATINGS Supply Voltage .............................................................................. ±18VDC Internal Power Dissipation (TJ ≤ +175°C) .................................... 1000mW Differential Input Voltage ............................................................... Total VS Input Voltage Range ............................................................................ ±VS Storage Temperature Range M Package .................................................................. –65°C to +150°C P and U Packages ....................................................... –40°C to +125°C Operating Temperature Range M Package .................................................................. –55°C to +125°C P and U Packages ........................................................ –25°C to + 85°C Lead Temperature M and P Packages (soldering, 10s) ............................................ +300°C U Package, SOIC (3s) ................................................................ +260°C Output Short Circuit to Ground (+25°C) ................................... Continuous Junction Temperature .................................................................... +175°C PACKAGE INFORMATION MODEL OPA602AM OPA602BM OPA602CM OPA602SM OPA602AP OPA602BP OPA602AU PACKAGE TO-99 TO-99 TO-99 TO-99 Plastic DIP Plastic DIP Plastic SOIC PACKAGE DRAWING NUMBER(1) 001 001 001 001 006 006 182 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. ORDERING INFORMATION MODEL OPA602AM OPA602BM OPA602CM OPA602SM OPA602AP OPA602BP OPA602AU PACKAGE TO-99 TO-99 TO-99 TO-99 Plastic DIP Plastic DIP Plastic SOIC TEMPERATURE RANGE –25 to +85°C –25 to +85°C –25 to +85°C –55 to +125°C –25 to +85°C –25 to +85°C –25 to +85°C OFFSET VOLTAGE MAX (µV) AT 25°C ±1000 ±500 ±250 ±500 ±2000 ±1000 ±3000 PIN CONFIGURATIONS Top View — TO-99 NC 8 Offset Trim 1 7 +VS –In +In –VS 2 3 4 7 6 5 +VS Output Offset Trim Offset Trim 1 8 NC Top View — DIP –In 2 6 Output 3 +In 4 –VS Case Connected to +VS. 5 Offset Trim Top View — SOIC Offset Trim –In +In –VS 1 2 3 4 8 7 6 5 NC +VS Output Offset Trim The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 OPA602 DICE INFORMATION 1 2 7 PAD 1 2 3 4 5 6 7 Substrate Bias: –VS NC: No Connection. FUNCTION Offset Trim –In +In –VS Offset Trim Output +VS MECHANICAL INFORMATION MILS (0.001") MILLIMETERS 1.60 x 1.47 ±0.13 0.51 ±0.08 0.10 x 0.10 None 36 3 4 5 6 Die Size Die Thickness Min. Pad Size Backing Transistor Count 63 x 58 ±5 20 ±3 4x4 OPA602 DIE TOPOGRAPHY TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15VDC unless otherwise noted. INPUT CURRENT NOISE SPECTRAL DENSITY 100 1k INPUT VOLTAGE NOISE SPECTRAL DENSITY 10 Voltage Noise (nV/√Hz) Current Noise (fA/√Hz) 100 1 10 0.1 1 10 100 1k Frequency (Hz) 10k 100k 1M 1 1 10 100 1k Frequency (Hz) 10k 100k 1M POWER SUPPLY REJECTION AND COMMON-MODE REJECTION vs TEMPERATURE 110 Voltage Noise, EO (nV/√Hz) 1k TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY AT 1kHz vs SOURCE RESISTANCE EO CMR and PSR (dB) 105 100 RS CMR 100 PSR 95 OPA602 + Resistor 10 Resistor Noise Only 90 –75 –50 –25 0 25 50 75 100 125 Temperature (°C) 1 100 1k 10k 100k 1M 10M 100M Source Resistance ( Ω) ® OPA602 4 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15VDC unless otherwise noted. COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE 120 OPEN-LOOP FREQUENCY RESPONSE 140 120 RL = 1kΩ CL = 100pF Voltage Gain (dB) Common-Mode Rejection (dB) –45 Phase Shift (Degrees) 110 100 80 60 40 AOL 20 0 –180 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) –135 φ –90 100 90 80 70 –15 –10 –5 0 +5 +10 +15 Common-Mode Voltage (V) GAIN BANDWIDTH AND SLEW RATE vs TEMPERATURE 10 37 GAIN BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE 8 AV = –1 38 Gain Bandwidth (MHz) Gain Bandwidth (MHz) 8 GBW 35 Slew Rate (V/µs) GBW 6 Slew Rate 4 33 6 34 31 Slew Rate 2 –75 –50 –25 0 25 50 75 100 Ambient Temperature (°C) 29 125 5 0 5 10 Supply Voltage (±VCC) 15 20 32 OPEN-LOOP GAIN vs TEMPERATURE 120 MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY 30 Output Voltage (V p-p) 110 Voltage Gain (dB) 20 100 10 RL = 1kΩ 90 80 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 0 10k 100k Frequency (Hz) 1M 10M Slew Rate (V/µs) ® 7 36 5 OPA602 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15VDC unless otherwise noted. LARGE SIGNAL TRANSIENT RESPONSE SMALL SIGNAL TRANSIENT RESPONSE 110 Output Voltage (mV) 0 1 2 3 4 5 Output Voltage (V) 10 100 50 0 –50 –100 –150 0 –10 0 1 Time (µs) 2 Time (µs) SETTLING TIME vs CLOSED-LOOP GAIN 5 SUPPLY CURRENT vs TEMPERATURE 3.5 4 3 0.01% 0.1% Supply Current (mA) RL = 1kΩ CL = 100pF 3.25 Settling Time (µs) 3.0 2 1 2.75 0 –1 –10 –100 –1k Closed-Loop Gain (V/V) 2.5 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) OPEN-LOOP GAIN vs SUPPLY VOLTAGE 104 1 402Ω TOTAL HARMONIC DISTORTION vs FREQUENCY 40.2kΩ AV = +101V/V 6.5Vrms 1kΩ Voltage Gain 100 THD + Noise (%rms) 0.1 96 A V = +101V/V 0.01 A V = +1V/V 92 0 5 10 Supply Voltage (±VCC) 15 20 0.001 0.1 1 10 100 Frequency (Hz) 1k 10k 100k ® OPA602 6 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15VDC unless otherwise noted. BIAS AND OFFSET CURRENT vs TEMPERATURE 10nA 10nA 10 BIAS AND OFFSET CURRENT vs INPUT COMMON MODE VOLTAGE 10 1nA Bias Current (pA) 1nA Offset Current (pA) 1 Offset Current 0.1 1 100 100 10 10 0.1 1 1 0.1 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 0.1 0.01 –15 –10 –5 0 5 10 15 Common-Mode Voltage (V) 0.01 POWER SUPPLY REJECTION vs FREQUENCY 140 140 COMMON-MODE REJECTION vs FREQUENCY 100 80 60 40 20 0 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) – + Common-Mode Rejection (dB) Power Supply Rejection (dB) 120 120 100 80 60 40 20 0 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) APPLICATIONS INFORMATION Unity-gain stability with good phase margin and excellent output drive characteristics bring freedom from the subtle problems associated with other high speed amplifiers. But with any high speed, wide bandwidth circuitry, careful circuit layout will ensure best performance. Make short, direct interconnections and avoid stray wiring capacitance— especially at the inverting input pin. Power supplies should be bypassed with good high frequency capacitors positioned close to the op amp pins. In most cases 0.1µF ceramic capacitors are adequate. Applications with heavier loads and fast transient waveforms may benefit from use of additional 1.0µF tantalum bypass capacitors. INPUT BIAS CURRENT GUARDING Leakage currents across printed circuit boards can easily exceed the input bias current of the OPA602. A circuit board “guard” pattern (Figure 1) is an effective solution to difficult leakage problems. This guard pattern must be repeated on all layers of a multilayer board. By surrounding critical high impedance input circuitry with a low impedance circuit connection at the same potential, leakage currents will flow harmlessly to the low impedance node. Input bias current may also be degraded by improper handling or cleaning. Contamination from handling parts and circuit boards may be cleaned with appropriate solvents and deionized water. Each rinsing operation should be followed by a 30-minute bake at +85°C. Offset Current (pA) ® Bias Current (pA) Bias Current 7 OPA602 Noninverting Buffer 2 OPA602 In 3 6 Out In 2 OPA602 3 6 Out Inverting In 2 OPA602 3 6 Out 2 3 TO-99 Bottom View 4 5 6 7 1 8 Board Layout for Input Guarding: Guard top and bottom of board. Alternate—use Teflon® standoff for sensitive input pins. Teflon® E.I. Du Pont de Nemours & Co. To Guard Drive FIGURE 1. Connection of Input Guard. APPLICATION CIRCUITS +VS 7 2 3 4 (1) MSB B1 • • • • • • • • • • B12 18 1 VOUT 2 OPA602 100kΩ Single-Point Ground –VCC C1 15pF OPA602 5 6 1 ±10mV Typical Trim Range 16 17 4 5 6 7 8 9 10 11 12 13 14 15 +15V DAC7541A VREFERENCE RF Out 1 Out 2 3 –VS NOTE: (1) 10kΩ to 1M Ω Trim Potentiometer (100kΩ Recommended) FIGURE 2. Offset Voltage Trim. VOUT = –VREF ( B1 2 B2 + 4 B3 + 8 B12 + ••• + 4096 ) –10V ≤ VREF ≤ +10V 0 ≤ VOUT ≤ – 4095 4096 VREF Where: BN = 1 if the BN digital input is high BN = 0 if the BN digital input is low FIGURE 3. Voltage Output D/A Converter. ® OPA602 8 (2) HP 5082-2835 2kΩ 47pF 1µF High Quality Pulse Generator +15V Pulse in ±5V 1µF Tantalum 2kΩ OPA602 1µF Tantalum + CL 500pF –15V 1/2 2N5564 1µF + 510Ω 1µF + + + 1/2 2N5564 51Ω Output Error Out ±0.5mV (0.01%) 2kΩ 510Ω 1µF + 2kΩ 50Ω +15V –15V FIGURE 4. Settling Time and Slew Rate Test Circuit. ® 9 OPA602
OPA602AP 价格&库存

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