OPA862IDTKR

OPA862 SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 OPA862 High Input Impedance, Single-Ended to Differential ADC Driver 1 Features 3 Description • • • The OPA862 is a single-ended to differential analogto-digital converter (ADC) driver with high input impedance for directly interfacing with sensors. The device only consumes 3.1-mA quiescent current for an output-referred noise density of 8.3 nV/√ Hz in a gain of 2-V/V configuration. A fully differential amplifier configured in a gain of 1 V/V with 1-kΩ resistors must be less than 1 nV/√ Hz to achieve the OPA862 equivalent output-referred noise density of 8.3 nV/√ Hz. The OPA862 can be configured for other gains using external resistors. The device has a large gain-bandwidth product of 400 MHz and a slew rate of 140 V/µs. This yields exceptional linearity and fastsettling, 18-bit performance over comparable singleended-to-differential ADC drivers. The device includes a reference input pin for setting the output commonmode voltage. • • • • 2 Applications • • • • • • • • 16-bit and 18-bit ADC Drivers Memory and LCD Testers Data Acquisition (DAQ) Test and Measurement Transimpedance Amplifiers (TIA) Class-D audio Amplifier Drivers Piezoelectric Sensor Interface Medical Instrumentation The OPA862 is fully characterized to operate over a wide supply range of 3 V to 12.6 V, and features a rail-to-rail output stage. The device is fabricated using Texas Instruments' proprietary, high-speed, silicongermanium (SiGe) process and achieves exceptional distortion performance for 18-bit systems. The device includes a disable mode that consumes only 12-µA quiescent current in power-down state. The OPA862 is rated to work over the extended industrial temperature range of –40°C to +125°C. Device Information(1) PART NUMBER OPA862 (1) OPA862 ± RINT 700 470 pF ADS8881 RINT 700 RREF 0 470 pF ± A2 + VREF 2.5 V -90 +5 V 64.9 A1 VIN BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.90 mm WSON (8) 3.00 mm × 3.00 mm -80 +7 V + PACKAGE For all available packages, see the orderable addendum at the end of the data sheet. 64.9 ±3.3 V Single-Ended High-Input Impedance Sensor Interface Harmonic Distortion (dBc) • • • • • • • Wide Supply Range: 3 V to 12.6 V High Input Impedance: 325 MΩ Voltage Noise: – Input-Referred (f ≥ 5 kHz): 2.3 nV/√ Hz – Output-Referred (f ≥ 10 kHz): 8.3 nV/√ Hz Differential Output Offset: ±700 µV (Maximum) Output Offset Drift: ±1.5 µV/°C (Typical) A2 Bias Current Cancellation, IB: ±5 nA (Typical) Gain-Bandwidth Product: 400 MHz Small-Signal Bandwidth: 44 MHz (G = 2 V/V) Slew Rate: 140 V/µs HD2, HD3 (VOD = 10 VPP, 50 kHz): –122 dBc, –140 dBc Rail-to-Rail Output: – High Linear Output Current: 60 mA (Typical) Quiescent Current: 3.1 mA Disable mode: 12-µA Quiescent Current Extended Temperature Operation: –40°C to +125°C -100 HD2, VS = 10 V HD3, VS = 10 V HD2, VS = 5 V HD3, VS = 5 V -110 -120 -130 -140 -150 -160 10k 100k Frequency (Hz) 1M D017 Harmonic Distortion vs Frequency An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings ....................................... 4 6.2 ESD Ratings .............................................................. 4 6.3 Recommended Operating Conditions ........................4 6.4 Thermal Information ...................................................4 6.5 Electrical Characteristics: VS = ±2.5 V to ±5 V ...........5 6.6 Typical Characteristics: VS = ±5 V.............................. 7 6.7 Typical Characteristics: VS = ±2.5 V......................... 10 6.8 Typical Characteristics: VS = 1.9 V, –1.4 V............... 12 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V...13 7 Detailed Description......................................................16 7.1 Overview................................................................... 16 7.2 Functional Block Diagram......................................... 16 7.3 Feature Description...................................................17 7.4 Device Functional Modes..........................................19 8 Application and Implementation.................................. 20 8.1 Application Information............................................. 20 8.2 Typical Applications.................................................. 21 9 Power Supply Recommendations................................26 10 Layout...........................................................................26 10.1 Layout Guidelines................................................... 26 10.2 Layout Examples.................................................... 27 11 Device and Documentation Support..........................28 11.1 Documentation Support.......................................... 28 11.2 Receiving Notification of Documentation Updates.. 28 11.3 Support Resources................................................. 28 11.4 Trademarks............................................................. 28 11.5 Electrostatic Discharge Caution.............................. 28 11.6 Glossary.................................................................. 28 12 Mechanical, Packaging, and Orderable Information.................................................................... 28 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (Feburary 2020) to Revision C (August 2020) Page • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 • Changed the status of OPA862 WSON package From: Preview To: Active ......................................................1 Changes from Revision A (September 2019) to Revision B (February 2020) Page • Changed document status from advance information to production data ......................................................... 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 5 Pin Configuration and Functions 1 2 VS+ 3 8 VIN 7 PD 6 VS- 5 VOUT- 8 VIN VFB 1 VS+ 3 ± 4 7 PD VREF 2 + ± + VOUT+ + ± + ± VFB VREF 6 VS5 VOUT- VOUT+ 4 Not to scale Not to scale Figure 5-1. D Package, 8-Pin SOIC (Top View) Figure 5-2. DTK Package, 8-Pin WSON (Top View) Table 5-1. Pin Functions PIN(1) NAME NO. TYPE(2) DESCRIPTION PD 7 I Power down (low = enable, high = disable), cannot be floated VFB 1 I Amplifier 1 inverting (feedback) input VIN 8 I Amplifier 1 noninverting (signal) input VOUT+ 4 O Noninverting output VOUT– 5 O Inverting output VREF 2 I Amplifier 2 noninverting (reference) input VS+ 3 P Positive power supply VS– 6 P Negative power supply (1) (2) Solder the exposed DTK package thermal pad to a heatspreading power or ground plane. This pad is electrically isolated from the die, but must be connected to a power or ground plane and not floated. I = input, O = output, and P = power. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 3 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX Supply voltage, (VS+) – (VS–) Supply turn-on/turn-off maximum Voltage dV/dT(2) Input-output voltage range Current (VS–) – 0.5 (1) (2) (3) (4) 1 V/µs (VS+) + 0.5 0.7 Continuous input current(3) ±10 current(4) V mA ±20 Continuous power dissipation Temperature V Differential input voltage Continuous output UNIT 13 See Thermal Information Junction, TJ 150 Operating free-air, TA –40 125 Storage, Tstg –65 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Stay below this ± supply turn-on edge rate to make sure that the edge-triggered ESD absorption device across the supply pins remains off. Continuous input current limit for both the ESD diodes to supply pins and amplifier differential input clamp diode. The differential input clamp diode limits the voltage across it to 0.7 V with this continuous input current flowing through it. Long-term continuous current for electromigration limits. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) UNIT ±2500 Charged device model (CDM), per JEDEC specificationJESD22-C101(2) V ±1500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VS+ Single-supply positive voltage TA Ambient temperature MIN NOM MAX UNIT 3 10 12.6 V –40 25 125 °C 6.4 Thermal Information OPA862 THERMAL D (SOIC) DTK (WSON) 8 PINS 8 PINS UNIT RθJA Junction-to-ambient thermal resistance 125.7 65.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 65.9 56.7 °C/W RθJB Junction-to-board thermal resistance 69.1 34.4 °C/W ΨJT Junction-to-top characterization parameter 18 1.6 °C/W ΨJB Junction-to-board characterization parameter 68.3 34.4 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 8.8 °C/W (1) 4 METRIC(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.5 Electrical Characteristics: VS = ±2.5 V to ±5 V TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, RREF = 0 Ω, and VS = ±5 V for VOD = 10 VPP condtions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AC PERFORMANCE SSBW LSBW GBWP SR tr, tf HD2 HD3 en ei VOD = 20 mVPP 44 VOD = 20 mVPP, G = 4 V/V, RF = 700 Ω 48 VOD = 20 mVPP, G = –2 V/V, RF = 700 Ω 48 VOD = 1 VPP 42 VS = ±2.5 V, VOD = 5 VPP 14 VOD = 10 VPP 7.5 Differential gain-bandwidth product VOD = 40 mVPP, G = 200 V/V, RF = 700 Ω 400 MHz Bandwidth for 0.1-dB flatness VOD = 20 mVPP, G = 2 V/V 6.5 MHz Output balance (ΔVOD / ΔVOCM) VOD = 5 VPP, f = 1 MHz Slew rate(1) (20% – 80%) VOD = 10 VPP Overshoot, undershoot VOD = 10-V step Rise and fall time VOD = 200-mV step 8.5 ns Settling time To 0.0015% of final value, VOD = 10-V step 100 ns Input overdrive recovery VIN = VS ± 0.5 V, VREF = midsupply 100 ns Output overdrive recovery G = –4 V/V, VOD = 2x overdrive 120 ns Differential small-signal bandwidth Differential large-signal bandwidth Second-order harmonic distortion Third-order harmonic distortion MHz MHz 41 dB 140 V/µs 0.2% VOD = 10 VPP, f = 15 kHz –133 VOD = 10 VPP, f = 50 kHz –122 VOD = 10 VPP, f = 350 kHz –110 VOD = 10 VPP, f = 15 kHz –148 VOD = 10 VPP, f = 50 kHz –140 VOD = 10 VPP, f = 350 kHz –110 Differential output noise f ≥ 10 kHz 8.3 Input voltage noise of A1 and A2 f ≥ 5 kHz 2.3 Input current noise of A1 f ≥ 100 kHz 0.7 Input current noise of A2 f ≥ 100 kHz 0.9 dBc dBc nV/√Hz pA/√Hz DC PERFORMANCE VOS IB IOS Differential output offset voltage ±50 ±700 Input offset voltage for A1, A2 ±50 ±325 Differential output offset drift TA = 0°C to 85°C, TA = –40°C to 125°C SOIC ±1.5 ±9 WSON ±1.5 ±7 Input offset voltage drift for A1, A2 TA = 0°C to 85°C, TA = –40°C to 125°C SOIC ±0.5 ±3 WSON ±0.5 ±2.5 Input bias current, A1 Input bias current, A2 VREF pin Input bias current drift, A1 TA = –40°C to 125°C Input bias current drift, A2 VREF pin, TA = –40°C to 125°C Input offset current, A1 G Differential gain error drift 1 3.1 µA ±90 nA 13 nA/°C ±65 pA/°C ±110 2 Differnetial gain error ±0.1 TA = –40°C to 125°C µV/°C ±5 ±4 Differential gain µV ±0.02 nA V/V ±0.25 % ppm/°C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 5 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.5 Electrical Characteristics: VS = ±2.5 V to ±5 V (continued) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, RREF = 0 Ω, and VS = ±5 V for VOD = 10 VPP condtions (unless otherwise noted) PARAMETER RINT TEST CONDITIONS MIN Internal resistors TYP MAX 700 UNIT Ω INPUT CMIR CMRR Input common-mode range, A1 VS– + 0.5 VS+ – 1.1 VREF pin common-mode range VS– + 1.3 VS+ – 1.1 V ΔVOS (2) at CMIR specification, A1 VCM = VS+ – 1.1 V and VCM = VS– + 0.5 V ±25 µV ΔVOS (2) at CMIR specification VREF = VS+ – 1.1 V and VREF = VS– + 1.3 V ±50 µV Common-mode rejection ratio CMRR = VOD / VIN, VIN = VREF, VCM = ±1 V, RREF = 0 Ω 100 Input impedance common-mode, A1 120 dB 325 || 0.6 Input impedance differential-mode, A1 Input impedance, A2 VREF pin VOL Output voltage range low Each output, single-ended VOH Output voltage range high Each output, single-ended Linear output current VS = ±5 V, VOD = ±2.65 V, ∆VOCM < ±10 mV relative to no-load condition MΩ || pF 35 || 1.9 kΩ || pF 2.3 || 3.5 GΩ || pF OUTPUT VS– + 0.15 VS– + 0.25 VS+ – 0.25 VS+ – 0.15 40 V V 60 mA POWER SUPPLY VS Specified operating voltage Single-supply referred to GND IQ Quiescent current VS = ±5 V, TA = 25°C Quiescent current drift VS = ±5 V, TA = –40°C to 125°C Power-supply rejection ratio VIN = VREF = 0 V, ΔVS = 2 V PSRR 3 10 12.6 V 2.8 3.1 3.3 mA 105 115 9 µA/°C dB POWER DOWN Disable voltage threshold Disabled above specified voltage Enable voltage threshold Enabled below specified voltage Disable pin bias current (1) (2) 6 VS– + 1.5 V 10 nA 20 µA VS– + 1 V –10 Power-down quiescent current 12 Turn-on time delay 1.3 µs Turn-off time delay 2.5 µs Average of rising and falling slew rate. ΔVOS = VOS at specified CMIR VCM – VOS at midsupply VCM. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.6 Typical Characteristics: VS = ±5 V TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 3 Normalized Gain (dB) Normalized Gain (dB) 0 -3 -6 G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V -9 -12 1M 10M Frequency (Hz) 100M 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1M G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V 10M Frequency (Hz) D003 VOD = 20 mVPP Figure 6-1. Small-Signal Frequency Response Figure 6-2. Large-Signal Frequency Response A1, Magnitude -45 A1, Phase A2, Magnitude -60 A2, Phase -75 140 120 100 -90 80 -105 60 -120 40 -135 20 -150 0 -165 -20 -180 1 10 100 1k 10k 100k 1M Frequency (Hz) CMRR and PSRR (dB) -30 Open-Loop Gain Phase (q) Open-Loop Gain Magnitude (dB) 180 160 10M 100M 160 150 140 130 120 110 100 90 80 70 60 50 40 30 20 100 1k 10k 100k Frequency (Hz) 1M 10M D054 Simulation, A1 and A2 Figure 6-4. CMRR and PSRR vs Frequency Figure 6-3. Open-Loop Gain And Phase vs Frequency 400 100 A1 A2 Closed-Loop Output Impedance (:) Open-Loop Output Impedance (:) CMRR PSRR+ PSRR D058 Simulation 100 10 4 10 D006 VOD = 10 VPP 100 1k 10k 100k 1M Frequency (Hz) 10M 100M 1G 10 1 0.1 0.01 0.001 0.0001 10k D059 Simulation A1 A2 100k 1M Frequency (Hz) 10M 100M D053 Simulation Figure 6-5. Open-Loop Output Impedance vs Frequency Figure 6-6. Closed-Loop Output Impedance vs Frequency Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 7 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.6 Typical Characteristics: VS = ±5 V (continued) 625 150 500 125 A1 Input VOS Shift From 25qC (PV) 375 250 125 0 -125 -250 -375 -500 -625 -40 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 100 75 50 25 0 -25 -50 -75 -100 -125 -150 -40 110 125 -25 -10 5 D038 20 35 50 65 Temperature (qC) 99 units Figure 6-7. Differential Output Offset Voltage vs Temperature D061 35 20 105 A1 Input Bias Current Offset (nA) 120 2.75 2.5 2.25 2 1.75 1.5 1.25 1 0.75 20 35 50 65 Temperature (qC) 80 95 3.0 2.5 Figure 6-10. A1 Input Offset Voltage Drift Histogram 3 5 2.0 –40°C to +125°C, over 115 units 3.25 -10 1.5 A1 Input VOS Drift (PV/°C) Figure 6-9. Differential Output Offset Voltage Drift Histogram -25 1.0 D062 D040 –40°C to +125°C, over 115 units 0.5 -40 0 -3.0 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 0 -6 0 -7 5 -8 10 3 0.5 15 6 -1.0 9 25 -1.5 12 30 -2.0 15 -2.5 18 Differential VOS Drift (PV/°C) VS = 10 V VS = 5 V VS = 3.3 V 40 # of units in each bin 21 # of units in each bin 110 125 45 VS = 10 V VS = 5 V VS = 3.3 V 24 A1 Input Bias Current (PA) 95 Figure 6-8. A1 Input Offset Voltage vs Temperature 27 110 125 90 75 60 45 30 15 0 -15 -30 -40 D044 32 units -25 -10 5 20 35 50 65 Temperature (qC) 80 95 110 125 D063 32 units Figure 6-11. A1 Input Bias Current vs Temperature 8 80 99 units -0.5 Differential Output VOS Shift From 25qC (PV) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). Figure 6-12. A1 Input Offset Current vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.6 Typical Characteristics: VS = ±5 V (continued) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 0.5 3 90 2.5 60 2 30 0.2 0.1 0 -0.1 -0.2 -0.3 1.5 0 1 -30 VIN IB VFB IB IOS 0.5 -0.4 -0.5 -5 -4 -3 -2 -1 0 1 2 3 A1 Input Common-Mode Voltage (V) 4 0 -5 5 -60 -90 -4 -3 -2 -1 0 1 2 3 A1 Input Common-Mode Voltage (V) D037 . 5 D045 Figure 6-14. A1 Input Bias Current and Input Offset Current vs Input Common-Mode Voltage 30 80 20 60 A2 Input Bias Current (nA) A2 Input Bias Current (nA) 4 . Figure 6-13. A1 Input Offset Voltage vs Input Common-Mode Voltage 10 0 -10 -20 -30 40 20 0 -20 -40 -60 -40 -50 -40 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 -80 -5 110 125 -4 -3 -2 -1 0 1 2 3 A2 Input Common-Mode Voltage (V) D046 Figure 6-15. A2 Input Bias Current vs Temperature VIN u 2 VOD 8 6 Votlage (V) 4 2 0 -2 -4 -6 -8 -10 -12 0 200 400 600 5 D047 Figure 6-16. A2 Input Bias Current vs Input Common-Mode Voltage 12 10 4 . 32 units Voltage (V) A1 Input Offset Current (nA) 0.3 A1 Input Bias Current (PA) A1 Input Offset Voltage (mV) 0.4 800 1000 1200 1400 1600 1800 2000 Time (ns) D026 20 17.5 15 12.5 10 7.5 5 2.5 0 -2.5 -5 -7.5 -10 -12.5 -15 -17.5 -20 VIN u 4 VOD 0 . 200 400 600 800 1000 1200 1400 1600 1800 2000 Time (ns) D027 G = –4 V/V Figure 6-17. Input Overdrive Recovery Figure 6-18. Output Overdrive Recovery Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 9 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.7 Typical Characteristics: VS = ±2.5 V TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 3 Normalized Gain (dB) Normalized Gain (dB) 0 -3 -6 -9 G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V -12 1M 10M Frequency (Hz) 100M 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1M G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V 10M Frequency (Hz) D002 VOD = 20 mVPP Figure 6-19. Small-Signal Frequency Response Figure 6-20. Large-Signal Frequency Response 1 -1 Normalized Gain (dB) Normalized Gain (dB) 0 -2 -3 -4 -5 -6 -7 CL = 0 pF CL = 5 pF CL = 10 pF -8 1M 10M Frequency (Hz) 100M 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1M CL = 0 pF CL = 5 pF CL = 10 pF 10M Frequency (Hz) D009 VOD = 20 mVPP -15 -20 Input to Output Isolation (dBc) Normalized Gain (dB) Figure 6-22. Large-Signal Frequency Response Over CL VOD = 20 mVPP VOD = 1 VPP VOD = 2 VPP VOD = 5 VPP -25 -30 -35 -40 -45 -50 -55 VIN = 10 mVPP VIN = 1 VPP -60 10M Frequency (Hz) -65 100k 100M 1M 10M Frequency (Hz) D011 . 100M D052 . Figure 6-23. Frequency Response Over Differential Output Voltage, VOD 10 D010 VOD = 5 VPP Figure 6-21. Small-Signal Frequency Response Over CL 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1M D005 VOD = 5 VPP Figure 6-24. Input-to-Output Disable Mode Isolation Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.7 Typical Characteristics: VS = ±2.5 V (continued) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 15 kHz, HD2 15 kHz, HD3 100 kHz, HD2 100 kHz, HD3 -65 1 MHz, HD2 1 MHz, HD3 HD2, G = 2 V/V HD3, G = 2 V/V HD2, G = 2 V/V -75 -85 Harmonic Distortion (dBc) Harmonic Distortion (dBc) -75 -95 -105 -115 -125 -135 -145 -85 -95 -105 -115 -125 -135 -145 -155 200 -155 10k 1k Differential Load, RL (:) 100k Frequency (Hz) D014 VOD = 5 VPP CL = 0 pF 0 100 200 CL = 5 pF D018 Figure 6-26. Harmonic Distortion vs Frequency and Gain Differential Output Voltage (V) Differential Output Voltage (mV) 150 125 100 75 50 25 0 -25 -50 -75 -100 -125 -150 -175 1M VOD = 5 VPP Figure 6-25. Harmonic Distortion vs Differential Load CL = 10 pF 300 400 Time (ns) 500 600 3 2.5 2 1.5 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 700 CL = 0 pF 0 100 200 300 D020 VOD = 200 mVPP CL = 5 pF 400 500 600 Time (ns) CL = 10 pF 700 800 900 1000 D021 VOD = 5 VPP Figure 6-27. Small-Signal Step Response Over CL Figure 6-28. Large-Signal Step Response Over CL 6 10 VIN u 2 VOD 5 4 VIN u 4 VOD 7.5 3 5 Voltage (V) 2 Voltage (V) HD3, G = 2 V/V HD2, G = 4 V/V HD3, G = 4 V/V 1 0 -1 -2 -3 2.5 0 -2.5 -5 -4 -7.5 -5 -6 -10 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Time (ns) D064 0 . 200 400 600 800 1000 1200 1400 1600 1800 2000 Time (ns) D028 G = –4 V/V Figure 6-29. Input Overdrive Recovery Figure 6-30. Output Overdrive Recovery Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 11 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.8 Typical Characteristics: VS = 1.9 V, –1.4 V TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 3 Normalized Gain (dB) Normalized Gain (dB) 0 -3 -6 G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V -9 -12 1M 10M Frequency (Hz) 100M 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1M G = 2 V/V G = 2 V/V G = 4 V/V G = 10 V/V 10M Frequency (Hz) D001 VOD = 20 mVPP Figure 6-31. Small-Signal Frequency Response Figure 6-32. Large-Signal Frequency Response 5 VIN u 2 VOD 4 3 Voltage (V) Voltage (V) 2 1 0 -1 -2 -3 -4 -5 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Time (ns) D065 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 VIN u 4 VOD 0 200 . 400 600 800 1000 1200 1400 1600 1800 2000 Time (ns) D029 G = –4 V/V Figure 6-33. Input Overdrive Recovery 12 D006 VOD = 2 VPP Figure 6-34. Output Overdrive Recovery Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 1 1 0 0 -1 Normalized Gain (dB) Normalized Gain (dB) 2 -1 -2 -3 -4 -5 -6 -7 -2 -3 -4 -5 -6 -7 VS = 3.3 V VS = 5 V VS = 10 V -8 -9 1M 10M Frequency (Hz) -9 1M 100M D012 VIN = 10 mVPP, VREF = 0 V, measured at VOUT+ Harmonic Distortion (dBc) Harmonic Distortion (dBc) -95 -100 -120 -130 -140 -105 -110 HD2, VS = 10 V HD3, VS = 10 V HD2, VS = 5 V HD3, VS = 5 V HD2, VS = 3.3 V HD3, VS = 3.3 V -115 -120 -125 -130 -135 -140 -150 -145 100k Frequency (Hz) -150 10k 1M D017 VOD = 10 VPP for 10-V supply, VOD = 5 VPP for 5-V supply 100k Frequency (Hz) 1M D066 VOD = 2 VPP Figure 6-37. Harmonic Distortion vs Frequency Figure 6-38. Harmonic Distortion vs Frequency -105 -90 -115 VS = 5 V, HD3 VS = 3.3 V, HD2 VS = 3.3 V, HD3 VS = 10 V, HD2 VS = 10 V, HD3 VS = 5 V, HD2 -95 Harmonic Distortion (dBc) VS = 10 V, HD2 VS = 10 V, HD3 VS = 5 V, HD2 -110 Harmonic Distortion (dBc) D013 -90 HD2, VS = 10 V HD3, VS = 10 V HD2, VS = 5 V HD3, VS = 5 V -110 -160 10k 100M Figure 6-36. VREF Small-Signal Frequency Response -80 -100 10M Frequency (Hz) VIN = 0 V, VREF = 20 mVPP, measured at VOUT– Figure 6-35. A1 Small-Signal Frequency Response -90 VS = 3.3 V VS = 5 V VS = 10 V -8 -120 -125 -130 -135 -140 -145 -100 VS = 5 V, HD3 VS = 3.3 V, HD2 VS = 3.3 V, HD3 -105 -110 -115 -120 -125 -130 -135 -150 -140 -145 -155 1 10 Differential Output Voltage, VOD (VPP) 1 D015 10 Differential Output Voltage, VOD (VPP) D016 Frequency = 50 kHz, G = –2 V/V Frequency = 50 kHz Figure 6-39. Harmonic Distortion vs Differential Output Voltage Figure 6-40. Harmonic Distortion vs Differential Output Voltage Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 13 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V (continued) 125 6 100 5 Differential Output Voltage, VOD (V) Differential Output Voltage, V OD (mV) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 75 50 25 0 -25 -50 -75 -100 -125 VS = 10 V VS = 5 V VS = 3.3 V -150 0 100 200 300 400 500 600 Time (ns) 700 800 4 3 2 1 0 -1 -2 -3 VS = 10 V VS = 5 V VS = 3.3 V -4 -5 -6 900 1000 0 100 200 300 D022 VOD = 200 mVPP 400 500 Time (ns) 600 700 800 900 D023 Figure 6-42. Large-Signal Step Response Figure 6-41. Small-Signal Step Response 30 10 Input-Referred Current Noise (pA/—Hz) Voltage Noise, nV/—Hz) A1, A2, Input Referred Total Output Referred 10 1 10 100 1k Frequency (Hz) 10k 5 4 3 2 1 0.7 0.5 10 100k 100 1k 10k Frequency (Hz) D041 100k 1M D043 1/f corner (A1) = 1.2 kHz, 1/f corner (A2) = 700 Hz 1/f corner (A1, A2) = 30 Hz, 1/f corner (output) = 49 Hz Figure 6-44. Current Noise Density vs Frequency Figure 6-43. Voltage Noise Density vs Frequency 65 7 VS = 10 V VS = 5 V VS = 3.3 V 60 55 4 50 45 Gain (dB) Output Balance (dB) A1, each input A2, VREF 7 40 35 1 30 25 -2 20 15 10 100k 1M Frequency (Hz) 10M -5 1M D055 Figure 6-45. Output Balance vs Frequency TA = 40qC TA = 25qC TA = 85qC TA = 125qC 10M Frequency (Hz) 100M D007 VS = 5 V, VOD = 20 mVPP Figure 6-46. Small-Signal Frequency Response vs Temperature 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V (continued) 6 3.14 5 3.12 4 Quiescent Current (mA) Output Saturation Voltage (V) TA ≈ 25°C, A1 input common-mode voltage (VCM) = midsupply, VREF = midsupply, RF (connected between VOUT+ and VFB) = 0 Ω, RG = open, differential gain (G) = 2 V/V, RL (differential load) = 2 kΩ, and RREF = 0 Ω (unless otherwise noted). 3 2 TA = 40qC TA = 25qC TA = 85qC TA = 125qC 1 0 -1 -2 -3 3.10 3.08 3.06 3.04 3.02 3.00 2.98 -4 2.96 -5 2.94 -6 0 5 10 15 20 25 30 35 40 45 Output Load Current (mA) 50 55 3 60 D031 4 5 6 7 8 9 10 Voltage Supply, VS (V) 11 12 13 D033 Figure 6-48. Quiescent Current vs Voltage Supply VS = 10 V, single-ended output voltage and load current for A1 and A2 Figure 6-47. Output Saturation Voltage vs Output Load Current 20 4.00 3.25 3.00 2.75 2.50 2.25 -40 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 TA = 40qC TA = 25qC TA = 85qC TA = 125qC 18 16 14 12 10 8 6 4 110 125 3 4 5 6 D034 Figure 6-49. Quiescent Current vs Temperature 7 8 9 10 Voltage Supply, VS (V) 12 13 D035 Figure 6-50. Power-Down Quiescent Current vs Voltage Supply 1 1.5 3 VOD PD 0.8 1 Output Voltage, VOD (V) 0.6 PD Bias Current (nA) 11 0.4 0.2 0 -0.2 -0.4 -0.6 2 0.5 1 0 0 -0.5 -1 -1 -2 PD Voltage (V) 3.50 Quiescent Current in Power Down (PA) Quiescent Current (mA) 3.75 VS = 12.6 V VS = 10 V VS = 5 V VS = 3.3 V VS = 3 V -0.8 -1.5 -1 -5 0 -4 -3 -2 -1 0 1 PD Voltage (V) 2 3 4 1 5 D049 VS = 10 V Figure 6-51. Power-Down Bias Current vs Power-Down Voltage 2 3 4 5 6 Time (Ps) 7 8 9 -3 10 D050 VS = 5 V Figure 6-52. Turnon and Turnoff Timing Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 15 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 7 Detailed Description 7.1 Overview The OPA862 is a 44-MHz, single-ended-to-differential amplifier suitable for use in high-input impedance analog front-ends. This device offers a gain-bandwidth product (GBWP) of 400 MHz with a low output-referred voltage noise of 8.3 nV/√ Hz while consuming only 3.1 mA of quiescent current. The OPA862 includes a REF pin for output common-mode voltage control using amplifier 2 and a shutdown pin for low-power mode operation that consumes only 12 µA of quiescent current. The OPA862 can be configured for a single-ended-to-differential gain of 2 V/V without using any external resistors. The device can be configured in gains other than 2 V/V by using only two external resistors in the feedback loop of amplifier 1 (A1) and requires fewer external gain-setting resistors compared to a fully differential amplifier (FDA). The noninverting input of A1 offers high input impedance (325 MΩ typical) for interfacing single-ended sensors that often have a non-zero output impedance to differential input analogto-digital converters (ADCs). A combination of large 140-V/µs slew rate, 400-MHz GBWP, and nonlinearity cancellation in the output stages of the two amplifiers results in exceptional distortion and settling performance for 18-bit systems. The OPA862 includes an internal capacitor CFILT in the feedback circuit of amplifier 2 (A2) that limits the device bandwidth to approximately 44 MHz. Although the individual amplifiers have a GBWP of 200 MHz, because of the architecture of the OPA862, the input and output signal bandwidth must not exceed approximately 44 MHz to achieve good linearity. High GBWP amplifiers generally have high linearity because they can maintain high loop gain. The simple architecture of the OPA862 (as compared to an FDA) has an inherent delay between the outputs VOUT+ and VOUT– that primarily limits the linearity performance versus the high GBWP of the individual amplifiers. The benefit of the CFILT capacitor is that the CFILT filters and minimizes the noise at the output beyond the usable frequency of the OPA862. The VREF pin can be used to set the output common-mode to a desired value. Section 7.4 describes various configurations that the OPA862 can be used in. 7.2 Functional Block Diagram VS+ OPA862 VFB ± VIN + A1 VOUT+ CFILT 6 pF RINT 700 RLINT 8.4 k RINT 700 ± A2 PD 16 VOUT± + VREF VS± Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 7.3 Feature Description 7.3.1 Input and ESD Protection The OPA862 is built using a high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in Section 6.1. As shown in Figure 7-1 all device pins are protected with internal ESD protection diodes to the power supplies. These diodes provide moderate protection to input overdrive voltages beyond the supplies as well. The protection diodes can typically support 10-mA continuous current. Where higher currents are possible (for example, in systems with ±12-V supply parts driving into the OPA862), add current limiting series resistors in series with the inputs to limit the current. Keep these resistor values as low as possible because high values can degrade both noise performance and frequency response. The OPA862 has back-to-back ESD diodes between the VIN and VFB pins. As a result, the differential input voltage between the VIN and VFB pins must be limited to 0.7 V or less to keep from forward biasing these back-to-back ESD diodes. The diodes are robust enough to survive transient conditions such as those common during slew conditions. In the event the differential input voltage exceeds 0.7 V, these back-to-back diodes forward bias and protect the amplifier but the current must be limited per the specifications in Section 6.1 to avoid permanent damage to these diodes or the amplifier. VS+ OPA862 VFB ± VOUT+ A1 + RINT 700 VIN RINT 700 Power Supply ESD Cell ± VOUT± A2 VREF + VS± PD Figure 7-1. Internal ESD Protection Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA862 17 OPA862 www.ti.com SBOS919C – AUGUST 2019 – REVISED AUGUST 2020 7.3.2 Anti-Phase Reversal Protection When the input common-mode voltage approaches or exceeds VS–, the base-collector junction of the input transistors forward biases. This condition creates an output path parallel to the normal gm path of the transistors that is opposite in phase to the gm path. When this parallel path starts to dominate, phase inversion occurs. To protect against phase inversion, the OPA862 features anti-phase reversal (APR) protection Schottky diodes on the input transistors. The Schottky diodes turn on at a voltage lower than the forward bias voltage of the base-collector junction, thus preventing the forward bias and the phase-inversion at the base-collector junction of the input transistors. Figure 7-2 shows a diagram of APR protection within the OPA862. VS+ VIN VFB Internal Circuitry Figure 7-2. Anti-Phase Reversal Protection 7.3.3 Precision and Low Noise The OPA862 is laser trimmed for high DC precision. An important factor that reduces the DC precision of the system that uses the OPA862 is the errors introduced by the bias currents of A2 flowing through the internal feedback resistors, RINT; see Section 7.2. To minimize the error contribution from IB, the A2 amplifier of the OPA862 features a unique IB cancellation mechanism. This IB cancellation mechanism is the reason why the IB of A2 is orders of magnitude lower than the IB of A1. The DC errors are negligible for most applications because of the nanoamperes of IB and very low IB drift of A2. However, despite being very low, if the IB errors of A2 are significant for an application, a 348-Ω RREF resistor can be used on the VREF input to cancel out the IB errors. The tradeoff of using the RREF is that this resistor introduces noise that is amplified by a factor of two at VOUT– because of the noise gain of two of A2. The CFILT capacitor (see Section 7.2) also helps filter out the flat band noise contribution of RREF. The 700-Ω internal resistors were carefully chosen to balance low noise while keeping the total power dissipation low by taking advantage of the low 3.1-mA quiescent current of the OPA862. As shown in Figure 7-3, to get the equivalent 8.3-nV/√ Hz noise of the OPA862 with a typical FDA configuration, the FDA must be less than 1 nV/√ Hz; such FDAs are often difficult to find or expensive. When RREF equals 0 Ω, the typical error resulting from the IB of A2 appears as an input-referred offset of 3.5 µV at the VREF input, and when RREF is 348 Ω, the differential output-referred noise increases from 8.3 nV/√ Hz to 9.6 nV/√ Hz. Fully Differential Amplifier