PCM2904
PCM2906
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
STEREO AUDIO CODEC WITH USB INTERFACE, SINGLE-ENDED ANALOG
INPUT/OUTPUT AND S/PDIF
FEATURES
1
• PCM2904: Without S/PDIF
• PCM2906: With S/PDIF
• On-Chip USB Interface:
– With Full-Speed Transceivers
– Fully Compliant With USB 1.1 Specification
– Certified by USB-IF
– Partially Programmable Descriptors (1)
– USB Adaptive Mode for Playback
– USB Asynchronous Mode for Record
– Bus Powered
• 16-Bit Delta-Sigma ADC and DAC
• Sampling Rate:
– DAC: 32, 44.1, 48 kHz
– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
• On-Chip Clock Generator With Single 12-MHz
Clock Source
• Single Power Supply: 5 V Typical (VBUS)
• Stereo ADC
– Analog Performance at VBUS = 5 V
– THD+N = 0.01%
– SNR = 89 dB
– Dynamic Range = 89 dB
– Decimation Digital Filter
– Pass-Band Ripple = ±0.05 dB
– Stop-Band Attenuation = –65 dB
– Single-Ended Voltage Input
– Antialiasing Filter Included
– Digital LCF Included
• Stereo DAC:
– Analog Performance at VBUS = 5 V
– THD+N = 0.005%
– SNR = 96 dB
– Dynamic Range = 93 dB
– Oversampling Digital Filter
23
(1)
•
•
– Pass-Band Ripple = ±0.1 dB
– Stop-Band Attenuation = –43 dB
– Single-Ended Voltage Output
– Analog LPF Included
Multifunctions:
– Human Interface Device (HID) Volume ±
Control and Mute Control
– Suspend Flag
Package: 28-Pin SSOP
APPLICATIONS
•
•
•
•
USB Audio Speaker
USB Headset
USB Monitor
USB Audio Interface Box
DESCRIPTION
The PCM2904/2906 is Texas Instruments single-chip
USB stereo audio codec with USB-compliant
full-speed protocol controller and S/PDIF (PCM2906
only). The USB protocol controller works with no
software code, but the USB descriptors can be
modified in some areas (for example, vendor
ID/product ID). The PCM2904/2906 employs SpAct™
architecture, TI's unique system that recovers the
audio clock from USB packet data. On-chip analog
PLLs with SpAct enable playback and record with low
clock jitter and with independent playback and record
sampling rates.
The descriptor can be modified by changing a mask.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SpAct is a trademark of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2007, Texas Instruments Incorporated
PCM2904
PCM2906
www.ti.com
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING ORDERING INFORMATION
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
PCM2904DB
28-lead SSOP
28DB
–25°C to 85°C
PCM2904
PCM2906DB
28-lead SSOP
28DB
–25°C to 85°C
PCM2906
ORDERING
NUMBER
TRANSPORT
MEDIA
PCM2904DB
Rails
PCM2904DBR
Tape and reel
PCM2906DB
Rails
PCM2906DBR
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage, VBUS
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
PCM2904/PCM2906
UNIT
–0.3 to 6.5
V
±0.1
V
Digital input
voltage
SEL0, SEL1, TEST0 (DIN) (2)
D+, D–, HID0, HID1, HID2, XTI, XTO, TEST1 (DOUT) (2), SSPND
–0.3 to (VDDI + 0.3) < 4
Analog input
voltage
VINL, VINR, VCOM, VOUTR, VOUTL
–0.3 to (VCCCI + 0.3) < 4
VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
–0.3 to 4
–0.3 to 6.5
Input current (any pins except supplies)
V
V
±10
mA
Ambient temperature under bias
–40 to 125
°C
Storage temperature, Tstg
–55 to 150
°C
Junction temperature, TJ
150
°C
Lead temperature (soldering)
260
°C, 5 s
Package temperature (IR reflow, peak)
250
°C
(1)
(2)
2
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
( ): PCM2906
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PCM2906
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
PARAMETER
TEST CONDITIONS
PCM2904DB, PCM2906DB
MIN
TYP
UNIT
MAX
DIGITAL INPUT/OUTPUT
Host interface
Apply USB Revision 1.1, full speed
Audio data format
USB isochronous data format
INPUT LOGIC
VIH (1)
2
3.3
VIL (1)
0.8
VIH (2) (3)
VIL
2.52
3.3
2
5.25
2.52
5.25
(2) (3)
VIH (4)
0.9
Input logic level
VIL (4)
0.8
VIH (5)
VIL (5)
0.9
IIH(1) (2) (4)
VIN = 3.3 V
±10
IIL(1) (2) (4)
VIN = 0 V
±10
(3)
IIH
VIN = 3.3 V
Input logic current
IIL(3)
50
VIN = 0 V
IIH (5)
IIL
Vdc
VIN = 3.3 V
(5)
80
µA
±10
65
VIN = 0 V
100
±10
OUTPUT LOGIC
VOH(1)
2.8
VOL(1)
VOH
0.3
(6)
VOL (6)
IOH = –4 mA
Output logic level
VOH (7)
VOL
2.8
IOL = 4 mA
IOH = –2 mA
(7)
Vdc
0.5
2.8
IOL = 2 mA
0.5
CLOCK FREQUENCY
Input clock frequency, XTI
11.994
12
12.006
MHz
ADC CHARACTERISTICS
Resolution
Audio data channel
8, 16
bits
1, 2
channel
CLOCK FREQUENCY
fs
8, 11.025, 16, 22.05, 32,
44.1, 48
Sampling frequency
kHz
DC ACCURACY
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Gain mismatch, channel-to-channel
±1
±5
% of FSR
Gain error
±2
±10
% of FSR
Bipolar zero error
±0
% of FSR
Pins 1, 2: D+, D–
Pin 21: XTI
Pins 5, 6, 7: HID0, HID1, HID2
Pins 8, 9: SEL0, SEL1
Pin 24: DIN
Pin 25: DOUT
Pin 28: SSPND
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PCM2906
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS (Continued)
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
TEST CONDITIONS
PARAMETER
PCM2904DB, PCM2906DB
MIN
TYP
MAX
0.01%
0.02%
UNIT
DYNAMIC PERFORMANCE (1)
VIN = –0.5 dB (2), VCCCI = 3.67 V
THD+N
VIN = –0.5 dB (3)
Total harmonic distortion plus noise
0.1%
VIN = –60 dB
5%
Dynamic range
A-weighted
81
89
dB
S/N ratio
A-weighted
81
89
dB
80
85
dB
Channel separation
ANALOG INPUT
Input voltage
0.6 VCCCI
Center voltage
0.5 VCCCI
Input impedance
Antialiasing filter frequency response
–3 dB
fIN = 20 kHz
Vp-p
V
30
kΩ
150
kHz
–0.08
dB
DIGITAL FILTER PERFORMANCE
Pass band
0.454 fs
Stop band
0.583 fs
Hz
Pass-band ripple
±0.05
Stop-band attenuation
td
–65
Delay time
LCF frequency response
–3 dB
Hz
dB
dB
17.4/fs
s
0.078 fs
MHz
DAC CHARACTERISTICS
Resolution
Audio data channel
8, 16
bits
1, 2
channel
CLOCK FREQUENCY
fs
Sampling frequency
32, 44.1, 48
kHz
DC ACCURACY
Gain mismatch, channel-to-channel
±1
±5
% of FSR
Gain error
±2
±10
% of FSR
Bipolar zero error
±2
% of FSR
DYNAMIC PERFORMANCE (4)
THD+N
SNR
Total harmonic distortion plus noise
VOUT = 0 dB
0.005%
VOUT = –60 dB
3%
Dynamic range
EIAJ, A-weighted
87
93
dB
Signal-to-noise ratio
EIAJ, A-weighted
90
96
dB
86
92
dB
Channel separation
(1)
(2)
(3)
(4)
4
0.016%
fIN = 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in RMS mode with 20-kHz LPF, 400-Hz HPF in
calculation.
Using external voltage regulator for VCCCI (as shown in Figure 36 and Figure 37, using REG103xA-A)
Using internal voltage regulator for VCCCI (as shown in Figure 38 and Figure 39)
fOUT = 1 kHz, using the System Two audio measurement system by Audio Precision in RMS mode with 20-kHz LPF, 400-Hz HPF.
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS (Continued)
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
PARAMETER
PCM2904DB, PCM2906DB
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG OUTPUT
VO
Output voltage
0.6 VCCCI
Center voltage
0.5 VCCCI
Load impedance
AC coupling
V
10
–3 dB
LPF frequency response
Vp-p
f = 20 kHz
kΩ
250
kHz
–0.03
dB
DIGITAL FILTER PERFORMANCE
Pass band
0.445 fs
Stop band
Hz
Pass-band ripple
±0.1
Stop-band attenuation
td
Hz
0.555 fs
dB
–43
Delay time
dB
14.3 fs
s
POWER SUPPLY REQUIREMENTS
VBUS
Voltage range
4.36
ADC, DAC operation
Supply current
PD
Suspend mode
(1)
Suspend mode
5.25
56
67
VDC
mA
µA
210
ADC, DAC operation
Power dissipation
5
280
(1)
352
1.05
Internal power supply voltage (2)
3.25
3.35
mW
3.5
VDC
85
°C
TEMPERATURE RANGE
Operating temperature
θJA
(1)
(2)
–25
Thermal resistance
28-pin SSOP
°C/W
100
In USB suspend state
Pins 10, 17, 19, 23, 27: VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
PIN ASSIGNMENTS
PCM2904
(Top View)
D+
D–
VBUS
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCCI
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM2906
(Top View)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
DGND
TEST1
TEST0
VCCXI
D+
D–
VBUS
AGNDX
XTI
XTO
VCCP2I
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCCI
AGNDP
VCCP1I
VOUTL
VOUTR
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
DGND
DOUT
DIN
VCCXI
AGNDX
XTI
XTO
VCCP2I
AGNDP
VCCP1I
VOUTL
VOUTR
P0007-05
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PCM2906
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
Table 1. PCM2904 TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
HID0
5
I
HID key state input (mute), active-high (2)
HID1
6
I
HID key state input (volume up), active-high (2)
HID2
7
I
HID key state input (volume down), active-high (2)
SEL0
8
I
Must be set to high (3)
SEL1
9
I
Must be set to high (3)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
TEST0
24
I
Test pin, must be connected to GND
TEST1
25
O
Test pin, must be left open
VBUS
3
–
Connect to USB power (VBUS)
VCCCI
10
–
Internal analog power supply for codec (4)
VCCP1I
17
–
Internal analog power supply for PLL (4)
VCCP2I
19
–
Internal analog power supply for PLL (4)
VCCXI
23
–
Internal analog power supply for oscillator (4)
VCOM
14
–
Common for ADC/DAC (VCCCI/2) (4)
VDDI
27
–
Internal digital power supply (4)
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (5)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
6
LV-TTL leveL
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
Table 2. PCM2906 TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
DIN
24
I
S/PDIF input (2)
DOUT
25
O
S/PDIF output
HID0
5
I
HID key state input (mute), active-high (3)
HID1
6
I
HID key state input (volume up), active-high (3)
HID2
7
I
HID key state input (volume down), active-high (3)
SEL0
8
I
Must be set to high (4)
SEL1
9
I
Must be set to high (4)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
VBUS
3
–
Connect to USB power (VBUS)
VCCCI
10
–
Internal analog power supply for codec (5)
VCCP1I
17
–
Internal analog power supply for PLL (5)
VCCP2I
19
–
Internal analog power supply for PLL (5)
VCCXI
23
–
Internal analog power supply for oscillator (5)
VCOM
14
–
Common for ADC/DAC (VCCCI/2) (5)
VDDI
27
–
Internal digital power supply (5)
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (6)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
(6)
LV-TTL level
3.3-V CMOS-level input with internal pulldown, 5-V tolerant
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input
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PCM2906
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
PCM2904 FUNCTIONAL BLOCK DIAGRAM
VCCCI
VCCP1I
VCCP2I
VCCXI
VDDI
AGNDC
AGNDP
AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Power
Manager
TEST0
SSPND
TEST1
VBUS
VINL
ISO-In
End-Point
USB SIE
VINR
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
D+
D–
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
ISO-Out
End-Point
VOUTR
HID
End-Point
HID0
HID1
HID2
USB
Protocol
Controller
96 MHz
PLL (´8)
XTI
12 MHz
Tracker
(SpAct)
XTO
B0238-01
8
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
PCM2906 FUNCTIONAL BLOCK DIAGRAM
VCCCI
VCCP1I
VCCP2I
VCCXI
VDDI
AGNDC
AGNDP
AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Lock
DIN
Power
Manager
SSPND
S/PDIF Decoder
VBUS
VINL
ISO-In
End-Point
USB SIE
VINR
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
D+
D–
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
ISO-Out
End-Point
VOUTR
DOUT
HID0
HID1
HID2
HID
End-Point
S/PDIF Encoder
USB
Protocol
Controller
96 MHz
PLL (´8)
XTI
12 MHz
Tracker
(SpAct)
XTO
B0239-01
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
BLOCK DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL)
4.7 mF
+
VINR
30 kW
–
13
–
(+)
+
+
(–)
Delta-Sigma
Modulator
VCOM
14
+
(VCCCI/2)
10 mF
Reference
S0011-06
10
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
ADC
TOTAL HARMONIC DISTORTION + NOISE
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.010
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
−50
−25
0
25
50
75
85
−50
100
TA – Free-Air Temperature – °C
−25
0
G001
Figure 1. THD+N at –0.5 dB vs Temperature
50
75
100
G002
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
0.010
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
25
TA – Free-Air Temperature – °C
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
4.0
4.5
5.0
5.5
VBUS – Supply Voltage – V
85
4.0
G003
Figure 3. THD+N at –0.5 dB vs Supply Voltage
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4.5
5.0
VBUS – Supply Voltage – V
5.5
G004
Figure 4.
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.010
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
30
35
40
45
85
50
fS – Sampling Frequency – kHz
30
35
40
45
50
fS – Sampling Frequency – kHz
G005
Figure 5. THD+N at –0.5 dB vs Sampling Frequency
G006
Figure 6.
DAC
TOTAL HARMONIC DISTORTION + NOISE
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
98
97
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.008
0.006
0.005
0.004
SNR
96
95
Dynamic Range
94
93
92
91
0.003
−50
−25
0
25
50
75
TA – Free-Air Temperature – °C
100
90
−50
−25
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G007
Figure 7. THD+N at 0 dB vs Temperature
12
0
50
TA – Free-Air Temperature – °C
75
100
G008
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
98
97
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.008
0.006
0.005
0.004
SNR
96
95
Dynamic Range
94
93
92
91
0.003
4.0
4.5
5.0
90
4.0
5.5
VBUS – Supply Voltage – V
4.5
G009
Figure 9. THD+N at 0 dB vs Supply Voltage
5.5
G010
Figure 10.
TOTAL HARMONIC DISTORTION + NOISE
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
98
0.008
97
SNR
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
5.0
VBUS – Supply Voltage – V
0.006
0.005
0.004
96
95
94
Dynamic Range
93
92
91
90
0.003
30
35
40
45
30
50
fS – Sampling Frequency – kHz
35
40
45
fS – Sampling Frequency – kHz
G011
Figure 11. THD+N at 0 dB vs Sampling Frequency
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50
G012
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
SUPPLY CURRENT
OPERATIONAL and SUSPEND SUPPLY CURRENT
vs
SUPPLY VOLTAGE
ICC – Operational Supply Current – mA
60
0.28
Operational
0.26
50
Suspend
40
0.24
30
0.22
20
4.00
4.25
4.50
4.75
5.00
ICC – Suspend Supply Current – mA
0.30
70
0.20
5.50
5.25
VBUS – Supply Voltage – V
G013
Figure 13.
OPERATIONAL SUPPLY CURRENT
vs
SAMPLING FREQUENCY
SUSPEND SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
0.40
ICC – Suspend Supply Current – mA
ICC – Operational Supply Current – mA
70
60
50
40
30
20
30
35
40
45
fS – Sampling Frequency – kHz
50
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0.30
USB Spec Limit for Device (0.3 mA)
0.25
0.20
0.15
0.10
−40
−20
0
20
40
60
80
100
TA – Free-Air Temperature – °C
G014
Figure 14. Supply Current vs Sampling Frequency,
ADC and DAC at Same fS
14
0.35
G015
Figure 15. Supply Current vs Temperature in
Suspend Mode
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
0
−10
−20
−20
−40
Amplitude – dB
Amplitude – dB
−30
−60
−80
−100
−40
−50
−60
−70
−120
−80
−140
−90
−160
0
8
16
24
Frequency [y fS]
−100
0.0
32
0.2
0.4
G016
Figure 16. Overall Characteristic
1.0
G017
AMPLITUDE
vs
FREQUENCY
0.2
0
0.0
−4
Amplitude – dB
Amplitude – dB
0.8
Figure 17. Stop-Band Attenuation
AMPLITUDE
vs
FREQUENCY
−0.2
−0.4
−0.6
−0.8
0.0
0.6
Frequency [y fS]
−8
−12
−16
0.1
0.2
0.3
0.4
Frequency [y fS]
0.5
−20
0.46
0.48
G018
Figure 18. Pass-Band Ripple
0.50
0.52
Frequency [y fS]
0.54
G019
Figure 19. Transition-Band Response
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
0.0
−10
−20
−0.2
Amplitude – dB
Amplitude – dB
−30
−40
−50
−60
−0.4
−0.6
−70
−80
−0.8
−90
−100
0.0
−1.0
0.1
0.2
0.3
Frequency [y fS/1000]
0.4
0
1
2
3
Frequency [y fS/1000]
G020
Figure 20. Stop-Band Characteristic
4
G021
Figure 21. Pass-Band Characteristic
ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
0
0.0
−10
−0.2
Amplitude – dB
Amplitude – dB
AMPLITUDE
vs
FREQUENCY
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
10
f – Frequency – kHz
G023
G022
Figure 22. Stop-Band Characteristic
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100
f – Frequency – kHz
Figure 23. Pass-Band haracteristic
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC DIGITAL INTERPOLATION AND DE-EMPHASIS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
0.2
−10
−20
0.0
Amplitude – dB
Amplitude – dB
−30
−40
−50
−60
−0.2
−0.4
−70
−80
−0.6
−90
−100
0
1
2
3
−0.8
0.0
4
Frequency [y fS]
0.1
0.2
0.3
0.4
Frequency [y fS]
G024
Figure 24. Stop-Band Attenuation
0.5
G025
Figure 25. Pass-Band Ripple
AMPLITUDE
vs
FREQUENCY
0
−2
−4
Amplitude – dB
−6
−8
−10
−12
−14
−16
−18
−20
0.46 0.47 0.48
0.49 0.50 0.51
0.52 0.53 0.54
Frequency [y fS]
G026
Figure 26. Transition-Band Response
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC ANALOG FIR FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
0
0.2
−10
0.0
Amplitude – dB
Amplitude – dB
AMPLITUDE
vs
FREQUENCY
−20
−30
−40
−0.2
−0.4
−0.6
−50
0
8
16
24
Frequency [y fS]
−0.8
0.0
32
0.1
0.2
0.3
0.4
Frequency [y fS]
G027
Figure 27. Stop-Band Characteristic
0.5
G028
Figure 28. Pass-Band Characteristic
DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
0
0.0
−10
−0.2
Amplitude – dB
Amplitude – dB
AMPLITUDE
vs
FREQUENCY
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
10
f – Frequency – kHz
G030
G029
Figure 29. Stop-Band Characteristic
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f – Frequency – kHz
Figure 30. Pass-Band Characteristic
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USB INTERFACE
Control data and audio data are transferred to the PCM2904/2906 via D+ (pin 1) and D– (pin 2). All data to/from
the PCM2904/2906 is transferred at full speed. The device descriptor contains the information described in
Table 3. The device descriptor can be modified on request; contact a Texas Instruments representative about the
details.
Table 3. Device Descriptor
USB revision
1.1 compliant
Device class
0x00 (device defined interface level)
Device sub class
0x00 (not specified)
Device protocol
0x00 (not specified)
Max packet size for end-point 0
8 byte
Vendor ID
0x08BB (default value, can be modified)
Product ID
0x2904/0x2906 (default value, can be modified)
Device release number
1.0 (0x0100)
Number of configurations
1
Vendor string
String #1 (see Table 5)
Product string
String #2 (see Table 5)
Serial number
Not supported
The configuration descriptor contains the information described in Table 4. The configuration descriptor can be
modified on request; contact a Texas Instruments representative about the details.
Table 4. Configuration Descriptor
Interface
Four interfaces
Power attribute
0x80 (Bus powered, no remote wakeup)
Max power
0xFA (500 mA. Default value, can be modified)
The string descriptor contains the information described in Table 5. The string descriptor can be modified on
request; contact a Texas Instruments representative about the details.
Table 5. String Descriptor
#0
0x0409
#1
Burr-Brown from TI (default value, can be modified)
#2
USB audio codec (default value, can be modified)
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DEVICE CONFIGURATION
Figure 31 illustrates the USB audio function topology. The PCM2904/2906 has four interfaces. Each interface is
constructed by alternative settings.
End-Point #0
Default End-Point
FU
Analog Out
End-Point #2
(IF #1)
IT
TID1
OT
TID2
Audio Streaming Interface
UID3
Analog In
End-Point #4
(IF #2)
IT
TID4
OT
TID5
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
PCM2904/2906
M0024-02
Figure 31. USB Audio Function Topology
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Interface #0
Interface #0 is the control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative
setting #0 describes the standard audio control interface. The audio control interface is constructed by a terminal.
The PCM2904/2906 has the following five terminals.
• Input terminal (IT #1) for isochronous-out stream
• Output terminal (OT #2) for audio analog output
• Feature unit (FU #3) for DAC digital attenuator
• Input terminal (IT #4) for audio analog input
• Output terminal (OT #5) for isochronous-in stream
Input terminal #1 is defined as a USB stream (terminal type 0x0101). Input terminal #1 can accept 2-channel
audio streams consisting of left and right channels. Output terminal #2 is defined as a speaker (terminal type
0x0301). Input terminal #4 is defined as a microphone (terminal type 0x0201). Output terminal #5 is defined as a
USB stream (terminal type 0x0101). Output terminal #5 can generate 2-channel audio streams consisting of left
and right channels. Feature unit #3 supports the following sound control features.
• Volume control
• Mute control
The built-in digital volume controller can be manipulated by an audio-class-specific request from 0 dB to –64 dB
in steps of 1 dB. Each channel can be set for different values. The master volume control is not supported. A
request to the master volume is stalled and ignored. The built-in digital mute controller can be manipulated by
audio-class-specific request. A master mute control request is acceptable. A request to an individual channel is
stalled and ignored.
Interface #1
Interface #1 is the audio streaming data-out interface. Interface #1 has the following seven alternative settings.
Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
ALTERNATIVE
SETTING
DATA FORMAT
00
TRANSFER MODE
SAMPLING RATE
(kHz)
Zero bandwidth
01
16 bit
Stereo
2s complement (PCM)
Adaptive
32, 44.1, 48
02
03
16 bit
Mono
2s complement (PCM)
Adaptive
32, 44.1, 48
8 bit
Stereo
2s complement (PCM)
Adaptive
32, 44.1, 48
04
8 bit
Mono
2s complement (PCM)
Adaptive
32, 44.1, 48
05
8 bit
Stereo
Offset binary (PCM8)
Adaptive
32, 44.1, 48
06
8 bit
Mono
Offset binary (PCM8)
Adaptive
32, 44.1, 48
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Interface #2
Interface #2 is the audio streaming data-in interface. Interface #2 has the following 19 alternative settings.
Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
ALTERNATIVE
SETTING
DATA FORMAT
00
TRANSFER MODE
SAMPLING RATE
(kHz)
ZERO BANDWIDTH
01
16 bit
Stereo
2s complement (PCM)
Asynchronous
48
02
16 bit
Mono
2s complement (PCM)
Asynchronous
48
03
16 bit
Stereo
2s complement (PCM)
Asynchronous
44.1
04
16 bit
Mono
2s complement (PCM)
Asynchronous
44.1
05
16 bit
Stereo
2s complement (PCM)
Asynchronous
32
06
16 bit
Mono
2s complement (PCM)
Asynchronous
32
07
16 bit
Stereo
2s complement (PCM)
Asynchronous
22.05
08
16 bit
Mono
2s complement (PCM)
Asynchronous
22.05
09
16 bit
Stereo
2s complement (PCM)
Asynchronous
16
0A
16 bit
Mono
2s complement (PCM)
Asynchronous
16
0B
8 bit
Stereo
2s complement (PCM)
Asynchronous
16
0C
8 bit
Mono
2s complement (PCM)
Asynchronous
16
0D
8 bit
Stereo
2s complement (PCM)
Asynchronous
8
0E
8 bit
Mono
2s complement (PCM)
Asynchronous
8
0F
16 bit
Stereo
2s complement (PCM)
Synchronous
11.025
10
16 bit
Mono
2s complement (PCM)
Synchronous
11.025
11
8 bit
Stereo
2s complement (PCM)
Synchronous
11.025
12
8 bit
Mono
2s complement (PCM)
Synchronous
11.025
Interface #3
Interface #3 is the interrupt data-in interface. Alternative setting #0 is the only possible setting for interface #3.
Interface #3 constructs the HID consumer control device. Interface #3 reports the following three key statuses.
• Mute (0xE209)
• Volume up (0xE909)
• Volume down (0xEA09)
End-Points
The PCM2904/2906 has the following four end-points.
• Control end-point (EP #0)
• Isochronous-out audio data stream end-point (EP #2)
• Isochronous-in audio data stream end-point (EP #4)
• HID end-point (EP #5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2904/2906 by the standard USB request and USB audio class specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point that transmits the PCM audio data. The isochronous-in audio data
stream end-point uses the asynchronous transfer mode. The HID end-point is an interrupt-in end-point. The HID
end-point reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. This means that the result obtained
from the HID operation depends on the host software. Typically, the HID function is used as a primary audio-out
device.
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Clock and Reset
The PCM2904/2906 requires a 12-MHz (±500 ppm) clock for the USB and audio functions. The clock can be
generated by a built-in oscillator with a 12-MHz crystal resonator. The 12-MHz crystal resonator must be
connected to XTI (pin 21) and XTO (pin 20) with one high-value (1-MΩ) resistor and two small capacitors, the
capacitance of which depends on the load capacitance of the crystal resonator. An external clock can be
supplied to XTI (pin 21). If an external clock is used, XTO (pin 20) must be left open. Because there is no clock
disabling signal, use of the external clock supply is not recommended. SSPND (pin 28) is unable to use clock
disabling.
The PCM2904/2906 has an internal power-on reset circuit, which is triggered automatically when VBUS (pin 3)
exceeds 2.5 V typical (2.7 V to 2.2 V). About 700 µs is required until internal reset release.
Digital Audio Interface (PCM2906)
The PCM2906 employs S/PDIF for both input and output. Isochronous-out data from the host is encoded to the
S/PDIF output and the DAC analog output. Input data is selected from either the S/PDIF or ADC analog input.
When the device detects S/PDIF input and successfully locks the received data, the isochronous-in transfer data
source automatically selected is S/PDIF; otherwise, the data source selected is the ADC analog input.
Supported Input Data (PCM2906)
The following data formats are accepted by S/PDIF for input and output. All other data formats are unusable as
S/PDIF.
• 48-kHz 16-bit stereo
• 44.1-kHz 16-bit stereo
• 32-kHz 16-bit stereo
Mismatch between the input data format and the host command may cause unexpected results, with the
following exceptions:
• Recording in monaural format from stereo data input at the same data rate
• Recording in 8-bit format from 16-bit data input at the same data rate
A combination of the two foregoing conditions is not accepted.
For playback, all possible data-rate sources are converted to the 16-bit stereo format at the same source data
rate.
Channel Status Information (PCM2906)
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0s except for the sample frequency, which is set automatically according to
the data received through the USB.
Copyright Management (PCM2906)
Isochronous-in data is affected by the serial copy management system (SCMS). When the control bit indicates
that the received digital audio data is original, the input digital audio data is transferred to the host. If the data is
indicated as first generation or higher, the transferred data is routed to the analog input.
Digital audio data output is always encoded as original with SCMS control.
The implementation of this feature is optional. It is the designer's responsibility to determine whether to
implement this feature in a product or not.
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INTERFACE SEQUENCE
Power-On, Attach, and Playback Sequence
The PCM2904/2906 is ready for setup when the reset sequence has finished and the USB device is attached.
After a connection has been established by setup, the PCM2904/PCM2906 is ready to accept USB audio data.
While waiting for the audio data (idle state), the analog output is set to bipolar zero (BPZ).
When receiving the audio data, the PCM2904/2906 stores the first audio packet, which contained 1-ms audio
data, into the internal storage buffer. The PCM2904/2906 starts playing the audio data when detecting the
following start-of-frame (SOF) packet.
5 V (Typ)
VBUS (Pin 3)
2.5 V (Typ)
0V
Bus Reset
st
1 Audio Data
Set Configuration
2
nd
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
T0055-02
Figure 32. Initial Sequence
Play, Stop, and Detach Sequence
When the host finishes or aborts the playback, the PCM2904/2906 stops playing after the last audio data has
played.
Record Sequence
The PCM2904/2906 starts audio capture into the internal memory after receiving the SET_INTERFACE
command.
Suspend and Resume Sequence
The PCM2904/2906 enters the suspend state after a constant idle state on the USB bus, approximately 5 ms.
While the PCM2904/2906 enters the suspend state, the SSPND flag (pin 28) is asserted. The PCM2904/2906
wakes up immediately on detecting a non-idle state on the USB.
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VBUS (Pin 3)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUTL
VOUTR
Detach
1 ms
T0056-02
Figure 33. Play, Stop, and Detach
Audio Data
SET_INTERFACE
IN Token
Audio Data
IN Token
Audio Data
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
T0259-01
Figure 34. Record Sequence
Idle
D+/D–
SSPND
Active
Suspend
5 ms
Active
T0057-02
Figure 35. Suspend and Resume
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PCM2904 TYPICAL CIRCUIT CONNECTION 1
Figure 36 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 3
1.5 kW
PCM2904
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
TEST1
25
5
HID0
TEST0
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
AGNDP
18
2.2 W
VBUS
1 mF
GND
IC1
IN OUT GND ADJ EN
5
3
4
1
2
C13
D1
C3
C4
C6
3.60 V–
3.85 V
+
12 MHz
C7
11
AGNDC
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
C1
C9
C10
+
27 kW
13 kW
+
C5
1 MW
C2
+
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0264-01
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 36. Bus-Powered Configuration for High-Performance PCM2904 Application
26
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Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
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SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
PCM2906 TYPICAL CIRCUIT CONNECTION 1
Figure 37 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 3
1.5 kW
PCM2906
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
AGNDP
18
2.2 W
VBUS
1 mF
GND
IC1
IN OUT GND ADJ EN
5
3
4
1
2
C13
C3
C4
C6
3.60 V–
3.85 V
+
D1
12 MHz
C7
11
AGNDC
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
C1
C9
C10
+
27 kW
C5
1 MW
13 kW
+
C2
+
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0264-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 37. Bus-Powered Configuration for High-Performance PCM2906 Application
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
Submit Documentation Feedback
27
PCM2904
PCM2906
www.ti.com
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
PCM2904 TYPICAL CIRCUIT CONNECTION 2
Figure 38 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 4
PCM2904
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
TEST1
25
5
HID0
TEST0
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
2.2 W
VBUS
1 mF
GND
C3
C4
C5
1 MW
C6
12 MHz
C1
+
C9
C10
+
+
C2
+
C7
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0265-01
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the A/D converter may be degraded.
Figure 38. PCM2904 Bus-Powered Configuration
28
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
PCM2906 TYPICAL CIRCUIT CONNECTION 2
Figure 39 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 4
PCM2906
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
2.2 W
VBUS
1 mF
GND
C3
C4
C5
1 MW
C6
12 MHz
C1
+
C9
C10
+
+
C2
+
C7
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0265-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the A/D converter may be degraded.
Figure 39. PCM2906 Bus-Powered Configuration
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
Submit Documentation Feedback
29
PCM2904
PCM2906
www.ti.com
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
APPLICATION INFORMATION
OPERATING ENVIRONMENT
For current information on the PCM2904/2906 operating environment, see the Updated Operating Environments
for PCM270X, PCM290X Applications application report, SLAA374.
30
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C – JUNE 2002 – REVISED NOVEMBER 2007
REVISION HISTORY
Changes from Revision B (March 2007) to Revision C .................................................................................................. Page
•
Deleted operating environment information from data sheet and added reference to application report ........................... 30
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
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31
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
PCM2904DB
ACTIVE
SSOP
DB
28
47
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2904
Samples
PCM2904DBR
ACTIVE
SSOP
DB
28
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2904
Samples
PCM2906DB
NRND
SSOP
DB
28
47
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
PCM2906
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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