PTH12060LAS

PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 10-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT ADJUST POWER MODULE FEATURES APPLICATIONS • Up to 10-A Output Current • 12-V Input Voltage • Wide-Output Voltage Adjust (1.2 V to 5.5 V/(0.8 V to 1.8 V) • Efficiencies up to 95% • 225 W/in3 Power Density • Output Voltage Sense • Margin Up/Down Controls • Undervoltage Lockout • Auto-Track™ Sequencing • Pre-Bias Start-up Capability using On/Off Inhibit • Output Overcurrent Protection (Non-latching, Auto-Reset) • Operating Temperature: –40°C to 85°C • Safety Agency Approvals: UL/IEC/CSA C22.2 60950-1 • Point-of-Load Alliance (POLA™) Compatible • 1 2 Complex Digital Systems Nominal Size = 1 in x 0.62 in (25,4 mm x 15,75 mm) DESCRIPTION The PTH12060 series is a non-isolated power module, and part of a new class of complete dc/dc converters from Texas Instruments. These modules are small in size, and are an alternative for applications requiring up to 10 A of load current. The small footprint, (1 inch × 0.62 inch) and industry leading features makes this module suitable for space conscious digital systems that incorporate multiple processors. This series of modules operate from a 12-V input bus voltage to provide step-down power conversion to a wide range of output voltages. The output voltage of the W-suffix device may be set to any voltage over the adjust range, 1.2 V to 5.5 V. The L-suffix device has an adjustment range of 0.8 V to 1.8 V. The output voltage is set within the adjust range using a single external resistor. This product includes Auto-Track™ Sequencing. Auto-Track simplifies the task of supply voltage sequencing in a power system, by enabling modules to track each other, or any other external voltage, during power up and power down. Other features include an on/off inhibit and margin up/down controls. An output voltage sense ensures tight load regulation. Non-latching overcurrent trip protects against load faults. For start-up into a non-prebiased output, review page 14 in the Application Information section. For start-up into a prebiased output, review page 18 in the Application Information section. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track, POLA, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2008, Texas Instruments Incorporated PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION Margin Down Track Margin Up VI 8 7 2 6 3 Inhibit CI 560 mF (Required) 4 5 VO VOSense RSET, 1% (Required) + 10 9 1 CO1 330 mF (Optional) + GND A. CO2 Ceramic (Optional) L O A D GND RSET = Required to set the output voltage to a value higher than the minimum value. See the Application Information section for values. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS voltages are with respect to GND UNIT VI Input voltage Track –0.3 V to VI +0.3 V TA Operating temperature range Over VI range Twave Wave solder temperature Surface temperature of module body or pins (5 seconds) Treflow Solder reflow temperature Surface temperature of module body or pins Tstg Storage temperature –40°C to 85°C (1) Per Mil-STD-883D, Method 2002.3, 1 msec, Sine, mounted Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz Weight (1) (2) (3) 2 (2) PTH12060WAS 235°C (2) PTH12060WAZ 260°C (2) PTH12060WAD –55°C to 125°C Mechanical shock Flammability 260°C PTH12060WAH (3) 500 G 20 G 5 grams Meets UL 94V-O For operation below 0°C, the external capacitors must have stable characteristics. Use either a low ESR tantalum, Os-Con, or ceramic capacitor. During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated maximum. The shipping tray or tape & reel cannot be used to bake parts at temperatures higher than 65°C. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 ELECTRICAL CHARACTERISTICS TA = 25C; VI = 12 V; VO = 3.3 V; CI = 560 µF, CO = 0 µF, and IO = IOmax (unless otherwise stated) PTH12060W PARAMETER MIN IO Output current VI Input voltage range VO Over ΔVadj range TA = 60°C, 200 LFM airflow TYP 0 TA = 25°C, natural convection Over IO range 10.8 Set-point voltage tolerance tol UNIT TEST CONDITIONS MAX 10 (1) A 10 (1) A 13.2 V ±2 (2) %VO ΔRegtemp Temperature variation –40°C < TA < 85°C ±0.5 %VO ΔRegline Line regulation Over Vin range ±10 mV ΔRegload Load regulation Over Io range ±12 ΔRegtot Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C ΔVadj Output voltage adjust range Over Vin range η Efficiency IO trip VO ripple (peak-to-peak) 20-MHz bandwidth, with CO2 = 10 µF ceramic Overcurrent threshold Reset, followed by auto-recovery Transient response 1 A/µs load step, 50 to 100% Iomax, CO1 = 330 µF ttr ΔVtr IO = 8 A VOadj Margin up/down adjust IILmargin Margin input current (pins 9/10) Pin to GND IILtrack Track input current (pin 8) Pin to GND dVtrack/dt Track slew rate capability CO ≤ CO (max) UVLO Undervoltage lockout 1.2 RSET = 280 Ω, VO = 5.0 V 94% %VO 5.5 V RSET = 2.0 kΩ, VO = 3.3 V 92% RSET = 4.32 kΩ, VO = 2.5 V 90% RSET = 11.5 kΩ, VO = 1.8 V 87% RSET = 24.3 kΩ, VO = 1.5 V 85% RSET = open circuit, VO = 1.2 V 83% VO ≤ 2.5 V 25 (3) mVPP VO > 2.5 V 1 (3) %VO 20 A Recovery time 70 µS Vo over/undershoot 100 mV ±5% –8 µA (4) –0.11 (5) 1 VI increasing 9.5 8.8 Open (5) V Inhibit Control (pin 3) IIL Input low voltage, Referenced to GND –0.2 Input low current, Pin 3 to GND II Input standby current Inhibit (pin 3) to GND, Track (pin 8) open fs Switching frequency Over VI and IO ranges CI External input capacitance 0.5 0.24 mA 10 300 mA 350 400 330 (7) 5500 (8) 560 (6) Nonceramic 0 External output capacitance MTBF (6) (7) (8) (9) Reliability kHz µF Capacitance value CO (3) (4) (5) V/ms 10.4 9 Input high voltage, Referenced to GND VIL (1) (2) mA V VI decreasing VIH mV ±3 µF Ceramic 0 300 (9) Equivalent series resistance (nonceramic) 4 Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign 6.4 mΩ 106 Hr See SOA curves or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C or better temperature stability. The peak-to-peak output ripple voltage is measured with an external 10-µF ceramic capacitor. See the standard application schematic. A small, low leakage (1723 2 ≤5 (3) TPSE337M019R0045(VO≤5.1V) 10 330 0.040 1800 ≤5 (3) T520X337M010AS ≤2 T53X337M010AS United Chemi-Con Nichicon Aluminum Panasonic, Poly-Aluminum S/SE (SMD) EEFSE0J181R(VO≤5.1V) Sanyo AVX 7,3 × 5,7 × 4,1 Kemet T520, Poly-Tantalum (SMD) T530, Tantalum/Organic N/R (2) 10 330 0.015 >3800 6.3 470 0.012 4200 Vishay-Sprague 594D, Tantalum (SMD) 10 470 0.100 1440 7,2 × 6 × 4,1 N/R (2) 94SP, Organic (Radial) 16 270 0.018 4200 10 × 10,5 2 (4) ≤3 94SP277X0016FBP 94SVP, Organic (SMD) 16 330 0.017 4500 10 × 12.7 2 ≤2 94SVP337X0016F12 Kemet, Ceramic X5R (SMD) 16 10 0.002 1210 case 1 (5) ≤5 C1210C106M4PAC 6.3 47 0.002 3225 mm N/R (2) ≤5 C1210C476K9PAC 1210 case N/R (2) ≤3 GRM32ER60J107M 3225 mm N/R (2) ≤5 GRM32ER60J476M Murata, Ceramic X5R (SMD) TDK, Ceramic X5R (SMD) (1) (2) (3) (4) (5) 12 0.002 4,3 × 7,3 × 4,0 N/R (2) N/R (2) ≤2 (3) T530X477M0061S(VO≤5.1V) 595D477X0010R2T(VO≤5.1V) 6.3 100 6.3 47 16 22 1 (5) ≤5 GRM32ER61C226K 16 10 1 (5) ≤5 GRM32DR61C106K 6.3 100 1210 case N/R (2) ≤3 C3225X5R0J107MT 6.3 47 3225 mm N/R (2) ≤5 C3225X5R0J476MT 16 22 1 (5) ≤5 C3225X5R1C226MT 16 10 1 (5) ≤5 C3225X5R1C106MT 0.002 Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. N/R – Not recommended. The capacitor voltage rating does not meet the minimum operating limits. The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 V. A total capacitance of 540 µF is acceptable based on the combined ripple current rating. Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 Designing for Very Fast Load Transients The transient response of the dc/dc converter is characterized using a load transient with a di/dt of 1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter's regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement is met with additional output capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed that specified in this data sheet, or the total amount of load capacitance is above 3,000 µF, the selection of output capacitors becomes more important. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 13 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com Features of the PTH Family of Non-Isolated Wide Output Adjust Power Modules Introduction The PTH/PTV family of non-isolated, wide-output adjustable power modules are optimized for applications that require a flexible, high performance module that is small in size. Each of these products are POLA™ compatible. POLA-compatible products are produced by a number of manufacturers, and offer customers advanced, nonisolated modules with the same footprint and form factor. POLA parts are also ensured to be interoperable, thereby, providing customers with second-source availability. From the basic, Just Plug it In functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030, these products were designed to be very flexible, yet simple to use. The features vary with each product. Table 5 provides a quick reference to the features by product series and input bus voltage. Table 5. Operating Features by Series and Input Bus Voltage Series PTHxx050 PTHxx060 PTHxx010 PTVxx010 PTHxx020 PTVxx020 PTHxx030 Input Bus (V) IO (A) Adjust (Trim) On/Off Inhibit OverCurrent Prebias Startup AutoTrack™ 3.3 6 • • • • • 5 6 • • • • • Margin Up/Down Output Sense Thermal Shutdown 12 6 • • • • • 3.3 / 5 10 • • • • • • • 12 10 • • • • • • • 3.3 / 5 15 • • • • • • • 12 12 • • • • • • • 5 8 • • • • • 12 8 • • • • • 3.3 / 5 22 • • • • • • • • 12 18 • • • • • • • • 3.3 / 5 18 • • • • • • • 12 16 • • • • • • • 3.3 / 5 30 • • • • • • • • 12 26 • • • • • • • • For simple point-of-use applications, the PTH12050 (6 A) provides operating features such as an on/off inhibit, output voltage trim, prebias start-up and overcurrent protection. The PTH12060 (10 A), and PTH12010 (12 A) include an output voltage sense, and margin up/down controls. Then the higher output current, PTH12020 (18 A) and PTH12030 (26 A) products incorporate overtemperature shutdown protection. The PTV12010 and PTV12020 are similar parts offered in a vertical, single in-line pin (SIP) profile, at slightly lower current ratings. All of the products referenced in Table 5 include Auto-Track™. This feature was specifically designed to simplify the task of sequencing the supply voltages in a power system. This and other features are described in the following sections. 14 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 POWER-UP INTO A NON-PREBIASED OUTPUT — AUTO-TRACK™ FUNCTION The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP family, microprocessors, and ASICs. Basic Power-Up using Auto-Track™ For applications requiring output voltage on/off control, each series of the PTH family incorporates the track control pin. The Auto-Track feature should be used instead of the inhibit feature wherever there is a requirement for the output voltage from the regulator to be turned on/off. Figure 10 shows the typical application for basic start-up. Note the discrete transistor (Q1). The track input has its own internal pull-up to a potential of 5 V to 13.2 V The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor or supply voltage supervisor (TPS3808 or TPS7712) is recommended for control. 10 Margin Up 9 3 5 Margin Down Inhibit VOSense VO 2 Track GND GND VoAdj 8 1 7 4 + CI 560 µF 1=Turn−Off VO PTH12060W VI 6 RSET 2 kΩ 0.1 W 1% Q1 BSS138 L O A D + CO 330 µF GND UDG−06074 Figure 10. Basic Start-up Control Circuit Turning on Q1 applies a low voltage to the track control pin and disables the output of the module. If Q1 is then turned off, the output ramps immediately to the regulated output voltage. A regulated output voltage is produced within 35 ms. With the initial application of the input source voltage, the track pin must be held low (Q1 turned ON) for at least 40 ms. Figure 11 shows the typical rise in both the output voltage and input current, following the turn off of Q1. The turn off of Q1 corresponds to the rise in the waveform, Q1 Vds. The waveforms were measured with a 10-A constant current load. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 15 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com Q1VDS (2 V/div) VO (2 V/div) II (2 A/div) t − Time − 40 ms/div Figure 11. Power-Up from Track Control NOTE: If a prebias condition is not present, it is highly recommended that the Track control pin be used for controlled power-up and power-down. If Track control is not used, the output voltage starts up and overshoots by as much as 10%, before settling at the output voltage setpoint. How Auto-Track™ Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. 16 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 Typical Auto-Track Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 12. To coordinate a power-up sequence, the Track control must first be pulled to ground potential through RTRK as defined in Figure 12. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 40 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 12 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of two 12-V input Auto-Track modules. The output of the TL7712A supervisor becomes active above an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 43 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The 43-ms time period is controlled by the capacitor C3. The value of 3.3 µF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 13 shows the output voltage waveforms from the circuit of Figure 12 after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively. VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure 14. In order for a simultaneous power-down to occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the Auto-Track slew rate. If the Track pin is pulled low at a slew rate greater than 1 V/ms, the discharge of the output capacitors will induce large currents which could exceed the peak current rating of the module. This will result in a reduction in the maximum allowable output capacitance as listed in the Electrical Characteristics table. When controlling the Track pin of the PTH12060W using a voltage supervisor IC, the slew rate is increased, therefore COmax is reduced to 2200 µF. Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 40 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 17 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com 2 U1 Track VI = 12 V 3 Vo 1 = 3.3 V 6 VI VO PTH12050W Inhibit GND 4 1 Adjust 5 + + CI1 CO1 RSET1 2.0 kΩ 8 U3 VCC 7 SENSE RESET 2 5 RTRK # RESIN 1 3 50 Ω TL7712A REF 0.1 µF 9 Up Dn RESET 8 5 Track Sense CT 2 GND CREF 10 U2 6 CT 3.3 µF 4 VI VO PTH12060W Vo 2 = 1.8 V 6 RRST 10 kΩ Inhibit 3 Adjust GND 1 7 4 + # RTRK = 100 Ω / N N = Number of Track pins connected together C I2 RSET2 + CO2 11.5 kΩ Figure 12. Sequenced Power Up and Power Down Using Auto-Track VTRK (1 V/div) VTRK (1 V/div) V01 (1 V/div) V01 (1 V/div) V02 (1 V/div) V02 (1 V/div) t − Time − 400 µs/div t − Time − 20 ms/div Figure 13. Simultaneous Power Up With Auto-Track Control 18 Figure 14. Simultaneous Power Down with Auto-Track Control Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 POWER-UP INTO A PREBIASED OUTPUT — START-UP USING INHIBIT CONTROL The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series of power modules. (Note that this is a feature enhancement for the many of the W-suffix products) [1]. A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The 12-V input PTH modules all incorporate synchronous rectifiers, but does not sink current during startup, or whenever the Inhibit pin is held low. Conditions for Prebias Holdoff In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output is allowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled [2]. To further ensure that the regulator doesn’t sink output current, (even with a ground signal applied to its Inhibit), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence [3]. The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete the module functions as normal, and sinks current if a voltage higher than the nominal regulation value is applied to its output. Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module's Track control pin, whichever is lowest. to its output. Prebias Demonstration Circuit Figure 15 shows the startup waveforms for the demonstration circuit shown in Figure 16. The initial rise in VO2 is the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the output current from the PTH12010L module (IO2) is negligible until its output voltage rises above the applied prebias. VO1 (1 V/div) VO2 (1 V/div) IO2 (5 V/div) t − Time − 10 ms/div Figure 15. Prebias Startup Waveforms Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 19 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com 10 9 Up VI = 12 V 2 VI 5 Sense GND 1 7 C1 330 mF 10 9 R3 11 k0 TL7702B 8 7 R4 100 kW C5 0.1 mF PTH12010L Inhibit 3 8 VCC SENSE 5 RESET 2 RESIN 1 REF 6 RESET 3 CT GND 4 R5 C6 10 k0 0.68 mF VI GND 1 7 6 Adjust 4 R1 2 kW Tra ck 2 VO PTH12020W Inhibit 3 + 8 Dn Tra ck VO1 = 3.3 V + C2 330 mF 5 Sense VO 6 Vadj 4 VO2 = 1.8 V + IO2 R1 130 W + C3 330 mF VC ORE + C4 330 mF VC CI O ASIC Figure 16. Application Circuit Demonstrating Prebias Startup Notes: 1. Output prebias holdoff is an inherent feature to all PTH120x0L and PTV120x0W/L modules. It has now been incorporated into all modules (including W-suffix modules with part numbers of the form PTH120x0W), with a production lot date code of 0423 or later. 2. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the voltage applied to the Track control pin, the output sinks current during the period that the track control voltage is below that of the back-feeding source. For this reason, it is recommended that Auto-Track be disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, VI. This raises the Track pin voltage well above the set-point voltage prior to the module’s start up, thereby, defeating the Auto-Track feature. 3. To further ensure that the regulator's output does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence of the power system. 20 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 Remote Sense Products with this feature incorporate an output voltage sense pin, VO Sense. A remote sense improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace resistance. To use this feature simply connect the VO Sense pin to the VO node, close to the load circuit (see data sheet standard application circuit). If a sense pin is left open-circuit, an internal low-value resistor (15-Ω or less) connected between the pin and the output node, ensures the output remains in regulation. With the sense pin connected, the difference between the voltage measured directly between the VO and GND pins, and that measured from VO Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. Overcurrent Protection For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, a module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby, the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Overtemperature Protection (OTP) The PTH12020, PTV12020, and PTH12030 products have overtemperature protection. These products have an on-board temperature sensor that protects the module's internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module's Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about 10°C below the trip point. Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and will reduce the long-term reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 21 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com Margin Up/Down Controls The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Down control inputs. These controls allow the output voltage to be momentarily adjusted [1], either up or down, by a nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. It can also be used to verify the function of supply voltage supervisors. The ±5% change is applied to the adjusted output voltage, as set by the external resistor, RSET at the VO Adjust pin. The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal [2]. A low-leakage, open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this purpose [3]. Adjustments of less than 5% can also be accommodated by adding series resistors to the control inputs. The value of the resistor can be selected from Table 6, or calculated using Equation 2. Margin Up/Down Adjust Resistance Calculation To reduce the margin adjustment to a value less than 5%, series resistors are required (See RD and RU in Equation 2). For the same amount of adjustment, the resistor value calculated for RU and RD is the same. The formula is as follows. æ 499 ö RU = ç ÷ - 99.8 kW è D% ø æ 499 ö RD = ç ÷ - 99.8 kW è D% ø (2) Where Δ% = The desired amount of margin adjust in percent. Notes: 1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are activated simultaneously, the affect on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in the output voltage set point. 2. The ground reference should be a direct connection to the module GND. This produces a more accurate adjustment at the load circuit terminals. The transistors Q1 and Q2 should be located close to the regulator. 3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device (preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current. Each input sources 8 µA when grounded, and has an open-circuit voltage of 0.8 V. Table 6. Margin Up/Down Resistor Values 22 % Adjust 5% 4% 3% 2% 1% RU / RD(kΩ) 0.0 24.9 66.5 150.0 397.0 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PTH12060W/L www.ti.com .................................................................................................................................................... SLTS217H – MAY 2003 – REVISED DECEMBER 2008 1 10 9 8 7 +VO 0V PT H12010W (Top View) VI 2 3 + RD RU CI +VO 6 4 5 RSET 0.1 W, 1% + L O A D CO Q1 Margin Down Q2 Margin Up GND GND Figure 17. Margin Up/Down Application Schematic Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L 23 PTH12060W/L SLTS217H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com TAPE AND REEL SPECIFICATIONS TRAY SPECIFICATIONS 24 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): PTH12060W/L PACKAGE OPTION ADDENDUM www.ti.com 25-Dec-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) PTH12060LAH ACTIVE ThroughHole Module EUW 10 36 RoHS Exempt & Green SN N / A for Pkg Type -40 to 85 PTH12060LAS ACTIVE Surface Mount Module EUY 10 36 Non-RoHS & Green SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060LAST ACTIVE Surface Mount Module EUY 10 250 Non-RoHS & Green SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060LAZ ACTIVE Surface Mount Module EUY 10 36 RoHS (In Work) & Green SNAGCU Level-3-260C-168 HR -40 to 85 PTH12060LAZT ACTIVE Surface Mount Module EUY 10 250 RoHS (In Work) & Green SNAGCU Level-3-260C-168 HR -40 to 85 PTH12060WAD ACTIVE ThroughHole Module EUW 10 36 RoHS Exempt & Green SN Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060WAH ACTIVE ThroughHole Module EUW 10 36 RoHS Exempt & Green SN Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060WAS ACTIVE Surface Mount Module EUY 10 36 Non-RoHS & Green SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060WAST ACTIVE Surface Mount Module EUY 10 250 Non-RoHS & Green SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12060WAZ ACTIVE Surface Mount Module EUY 10 36 RoHS (In Work) & Green SNAGCU Level-3-260C-168 HR -40 to 85 PTH12060WAZT ACTIVE Surface Mount Module EUY 10 250 RoHS (In Work) & Green SNAGCU Level-3-260C-168 HR -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Dec-2021 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of