REF102AU/2K5G4

REF102 REF 102 REF 102 SBVS022B – SEPTEMBER 2000 – REVISED JUNE 2009 10V Precision Voltage Reference FEATURES APPLICATIONS ● +10V ±0.0025V OUTPUT ● VERY LOW DRIFT: 2.5ppm/°C max ● EXCELLENT STABILITY: 5ppm/1000hr typ ● EXCELLENT LINE REGULATION: 1ppm/V max ● EXCELLENT LOAD REGULATION: 10ppm/mA max ● LOW NOISE: 5µVPP typ, 0.1Hz to 10Hz ● PRECISION-CALIBRATED VOLTAGE STANDARD ● D/A AND A/D CONVERTER REFERENCE ● PRECISION CURRENT REFERENCE ● ACCURATE COMPARATOR THRESHOLD REFERENCE ● DIGITAL VOLTMETER ● TEST EQUIPMENT ● PC-BASED INSTRUMENTATION ● WIDE SUPPLY RANGE: 11.4VDC to 36VDC ● LOW QUIESCENT CURRENT: 1.4mA max ● PACKAGE OPTIONS: PLASTIC DIP, SO-8 DESCRIPTION V+ Trim 5 The REF102 is a precision 10V voltage reference. The drift is laser-trimmed to 2.5ppm/°C max C-grade over the industrial temperature range. The REF102 achieves its precision without a heater. This results in low power, fast warm-up, excellent stability, and low noise. The output voltage is extremely insensitive to both line and load variations and can be externally adjusted with minimal effect on drift and stability. Single-supply operation from 11.4V to 36V and excellent overall specifications make the REF102 an ideal choice for demanding instrumentation and system reference applications. R5 2 50kΩ R2 R3 14kΩ R1 8kΩ – 22kΩ 6 A1 VOUT + R6 7kΩ R4 DZ1 8 4kΩ 4 Noise Common Reduction Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2000-2009, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Input Voltage ...................................................................................... +40V Operating Temperature P, U ................................................................................. –25°C to +85°C Storage Temperature Range P, U ............................................................................... –40°C to +125°C Short-Circuit Protection to Common or V+ .............................. Continuous NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT MAX INITIAL ERROR (mV) MAX DRIFT (PPM/°C) PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING REF102AU REF102AP ±10 ±10 ±10 ±10 SO-8 DIP-8 D P REF102AU REF102AP REF102BU REF102BP ±5 ±5 ±5 ±5 SO-8 DIP-8 D P REF102BU REF102BP REF102CU REF102CP ±2.5 ±2.5 ±2.5 ±2.5 SO-8 DIP-8 D P REF102CU REF102CP NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI website at www.ti.com. PIN CONFIGURATIONS Top View DIP, SO NC 1 8 Noise Reduction V+ 2 7 NC NC 3 6 VOUT Com 4 5 Trim NC = Not Connected 2 REF102 www.ti.com SBVS022B ELECTRICAL CHARACTERISTICS At TA = +25°C and VS = +15V power supply, unless otherwise noted. REF102A PARAMETER OUTPUT VOLTAGE Initial vs Temperature (1) vs Supply (Line Regulation) vs Output Current (Load Regulation) vs Time M Package P, U Packages (2) Trim Range (3) Capacitive Load, max NOISE CONDITIONS MIN TA = 25°C 9.99 TYP REF102B MAX MIN 10.01 10 9.995 TYP REF102C MAX MIN 10.005 5 9.9975 TYP MAX UNITS 10.0025 2.5 V ppm/°C VS = 11.4V to 36V 2 1 1 ppm/V IL = 0mA to +10mA IL = 0mA to –5mA TA = +25°C 20 40 10 20 10 20 ppm/mA ppm/mA ✻ ✻ 5 20 ±3 0.1Hz to 10Hz OUTPUT CURRENT ✻ ✻ 5 ✻ ✻ +11.4 QUIESCENT CURRENT IOUT = 0 WARM-UP TIME (4) To 0.1% TEMPERATURE RANGE Specification REF102A, B, C +36 ✻ µVPP ✻ mA ✻ ✻ ✻ 15 +85 ✻ ✻ +1.4 –25 ✻ ppm/1000hr ppm/1000hr % pF ✻ 1000 +10, –5 INPUT VOLTAGE RANGE ✻ ✻ ✻ V ✻ mA µs ✻ ✻ ✻ ✻ °C ✻ Specifications same as REF102A. NOTES: (1) The box method is used to specify output voltage drift vs temperature; see the Discussion of Performance section. (2) Typically 5ppm/1000hrs after 168hr powered stabilization. (3) Trimming the offset voltage affects drift slightly. See Installation and Operating Instructions for details. (4) With noise reduction pin floating. See Typical Characteristics for details. REF102 SBVS022B www.ti.com 3 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +15V, unless otherwise noted. POWER TURN-ON RESPONSE with 1µF CN POWER TURN-ON RESPONSE VOUT VOUT VIN VIN Time (10ms/div) Time (5µs/div) Power Turn-On Power Turn-On POWER SUPPLY REJECTION vs FREQUENCY LOAD REGULATION +1.5 120 Output Voltage Change (mV) Power Supply Rejection (dB) 130 110 100 90 80 70 +1.0 +0.5 0 −0.5 −1.0 −1.5 60 1 100 1k 10k –5 0 1.6 Quiescent Current (mA) Output Voltage Change (µV) +10 QUIESCENT CURRENT vs TEMPERATURE RESPONSE TO THERMAL SHOCK +600 +300 0 –300 REF102C Immersed in +85°C Fluorinert Bath TA = +25°C –600 1.4 1.2 1.0 TA = +85°C 0.8 0 15 30 45 −75 60 −50 −25 0 +25 +50 +75 +100 +125 Temperature (°C) Time (s) 4 +5 Output Current (mA) Frequency (Hz) REF102 www.ti.com SBVS022B TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +15V, unless otherwise noted. TYPICAL REF102 REFERENCE NOISE 20Ω 2kΩ Oscilloscope Noise Voltage (µV) 6 4 – 2 100µF DUT 0 15.8kΩ −2 2µF Gain = 100V/V f −3dB = 0.1Hz and 10Hz −4 −6 8kΩ OPA227 + Noise Test Circuit. Low Frequency Noise (1s/div) (See Noise Test Circuit) Refer to the diagram on the first page of this data sheet. The 10V output is derived from a compensated buried zener diode DZ1, op amp A1, and resistor network R1 – R6. Approximately 8.2V is applied to the non-inverting input of A1 by DZ1. R1, R2, and R3 are laser-trimmed to produce an exact 10V output. The zener bias current is established from the regulated output voltage through R4. R5 allows user-trimming of the output voltage by providing for small external adjustment of the amplifier gain. Because the temperature coefficient (TCR) of of R5 closely matches the TCR of R1, R2 and R3 , the voltage trim has minimal effect on the reference drift. The output voltage noise of the REF102 is dominated by the noise of the zener diode. A capacitor can be connected between the Noise Reduction pin and ground to form a lowpass filter with R6 and roll off the high-frequency noise of the zener. REF102 is specified by the more commonly-used box method. The box is formed by the high and low specification temperatures and a diagonal, the slope of which is equal to the maximum specified drift. Since the shape of the actual drift curve is not known, the vertical position of the box is not known, either. It is, however, bounded by VUPPER BOUND and VLOWER BOUND (see Figure 1). Figure 1 uses the REF102CU as an example. It has a drift specification of 2.5ppm/°C maximum and a specification temperature range of –25°C to +85°C. The box height, V1 to V2, is 2.75mV. REF102CU VUPPER BOUND +10.00275 Output Voltage (V) THEORY OF OPERATION DISCUSSION OF PERFORMANCE 2.75mV Worst-case ∆VOUT for REF102CU VNOMINAL +10.0000 V2 +9.99725 The REF102 is designed for applications requiring a precision voltage reference where both the initial value at room temperature and the drift over temperature are of importance to the user. Two basic methods of specifying voltage reference drift versus temperature are in common usage in the industry—the butterfly method and the box method. The REF102CU VLOWER BOUND −25 0 +25 +50 Temperature (°C) +85 FIGURE 1. REF102CU Output Voltage Drift. REF102 SBVS022B V1 www.ti.com 5 INSTALLATION AND OPERATING INSTRUCTIONS BASIC CIRCUIT CONNECTION Figure 2 shows the proper connection of the REF102. To achieve the specified performance, pay careful attention to layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected as indicated, being sure to minimize interconnection resistances. used. The circuit in Figure 3 has a minimum trim range of ±300mV. The circuit in Figure 4 has less range but provides higher resolution. The mismatch in TCR between RS and the internal resistors can introduce some slight drift. This effect is minimized if RS is kept significantly larger than the 50kΩ internal resistor. A TCR of 100ppm/°C is normally sufficient. V+ + 1µF Tantalum 2 VOUT 6 (1) 2 V+ (2) REF102 VTRIM 5 6 + 1µF Tantalum REF102 RL 1 RL 2 RL 3 20k Ω Output Voltage Adjust +10V 4 Minimum range (±300mV) and minimal degradation of drift. 4 (1) (2) FIGURE 3. REF102 Optional Output Voltage Adjust. NOTES: (1) Lead resistances here of up to a few ohms have negligible effect on performance. (2) A resistance of 0.1Ω in series with these leads will cause a 1mV error when the load current is at its maximum of 10mA. This results in a 0.01% error of 10V. V+ + 1µF Tantalum 2 FIGURE 2. REF102 Installation. VOUT 6 OPTIONAL OUTPUT VOLTAGE ADJUSTMENT REF102 Optional output voltage adjustment circuits are shown in Figures 3 and 4. Trimming the output voltage will change the voltage drift by approximately 0.008ppm/°C per mV of trimmed voltage. In the circuit in Figure 3, any mismatch in TCR between the two sections of the potentiometer will also affect drift, but the effect of the ∆TCR is reduced by a factor of five by the internal resistor divider. A high quality potentiometer, with good mechanical stability, such as a cermet, should be VTRIM 5 RS 1M Ω 20k Ω Output Voltage Adjust +10V 4 Higher resolution, reduced range (typically ±25mV). FIGURE 4. REF102 Optional Output Voltage, Fine Adjust. 6 REF102 www.ti.com SBVS022B APPLICATIONS INFORMATION OPTIONAL NOISE REDUCTION The high-frequency noise of the REF102 is dominated by the zener diode noise. This noise can be greatly reduced by connecting a capacitor between the Noise Reduction pin and ground. The capacitor forms a low-pass filter with R6 (refer to the figure on page 1) and attenuates the high-frequency noise generated by the zener. Figure 5 shows the effect of a 1µF noise reduction capacitor on the high-frequency noise of the REF102. R6 is typically 7kΩ so the filter has a –3dB frequency of about 22Hz. The result is a reduction in noise from about 800µVPP to under 200µVPP. If further noise reduction is required, use the circuit in Figure 14. High accuracy, extremely low drift, outstanding stability, and low cost make the REF102 an ideal choice for all instrumentation and system reference applications. Figures 6 through 14 show a variety of useful application circuits. V+ (1.4V to 26V) 2 6 REF102 1.4mA < (5V −IL) RS 4 IL RS NO CN −15V < 5.4mA −10V Out V+ (1.4V to 26V) 2 a) Resistor Biased –10V Reference R1 2kΩ REF102 6 10V C1 1000pF CN = 1µF 4 OPA227 FIGURE 5. Effect of 1µF Noise Reduction Capacitor on Broadband Noise (f–3dB = 1MHz) −10V Out b) Precision –10V Reference. See SBVA008 for more detail. FIGURE 6. –10V Reference Using a) Resistor or b) OPA227. REF102 SBVS022B www.ti.com 7 V+ V+ V+ 2 220Ω – 6 REF102 2N2905 +10V OPA227 + 2 IL 2 R1 = VCC − 10V IL (TYP) 6 REF102 4 6 +10V +10V REF102 IL IL 4 a) −20mA < IL < +20mA (OPA227 also improves transient immunity) 4 b) −5mA < IL < +100mA c) IL (MAX) = IL (TYP) +10mA IL (MIN) = IL (TYP) −5mA FIGURE 7. +10V Reference With Output Current Boosted to: a) ±20mA, b) +100mA, and c) IL (TYP) +10mA, –5A. +15V 28mA 357Ω 1/2W 2 28.5mA 6 +5V 350 Ω Strain Gauge Bridge REF102 5 4 RG – INA126 2 10 6 – 8 V OUT x100 + OPA227 + 3 −5V 357Ω 1/2W –15V FIGURE 8. Strain Gauge Conditioner for 350Ω Bridge. V+ 2 V+ 2 6 REF102 5 2 25kΩ 25kΩ REF102 +10V Out −10V Out R 4 4 3 1 6 25kΩ – I OUT OPA277 + LOAD 25kΩ INA105 IOUT = FIGURE 9. ±10V Reference. 10V , R ≥ 1kΩ R Can be connected to ground or −VS . See SBVA001 for more details and ISINK Circuit. See SBVA007 for more details. 8 6 FIGURE 10. Positive Precision Current Source. REF102 www.ti.com SBVS022B 31.4V to 56V 2 V+ 2 +30V 6 REF102 6 +10V REF102 INA105 2 4 2 5 4 REF102 +20V 6 – 6 3 +5V + 4 2 1 REF102 +10V 6 FIGURE 13. +5V and +10V Reference. 4 V+ 2 NOTES: (1) REF102s can be stacked to obtain voltages in multiples of 10V. (2) The supply voltage should be between 10n + 1.4 and 10n + 26, where n is the number of REF102s. (3) Output current of each REF102 must not exceed its rated output current of +10, −5mA. This includes the current delivered to the lower REF102. 6 REF102 (1) 2kΩ VOUT 1 R2 2kΩ FIGURE 11. Stacked References. 4 C2 V+ V+ 1µF 2 2 – 2 6 6 REF102 +5V REF102 (2) Out 2kΩ VOUT 2 2 OPA227 3 + R1 1k Ω +10V C1 INA105 VREF 1µF 4 5 4 –5V Out V+ VREF = (V01 + V02 … VOUT N) 2 – N 6 6 + REF102 (N) VOUT N 2kΩ eN = 5µVPP (f = 0.1Hz to 1MHz) √N See SBVA002 for more details. 1 3 FIGURE 12. ±5V Reference. 4 FIGURE 14. Precision Voltage Reference with Extremely Low Noise. REF102 SBVS022B www.ti.com 9 Revision History DATE REVISION PAGE 6/09 B 2 SECTION DESCRIPTION Absolute Maximum Ratings Deleted lead temperature rating. Package/Ordering Information Changed Package Ordering Information table. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 10 REF102 www.ti.com SBVS022B PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) REF102AU ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR REF 102U A REF102AU/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR REF 102U A REF102AUG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR REF 102U A REF102BU ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U B REF102CU ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U C REF102CU/2K5 ACTIVE SOIC D 8 2500 RoHS & Green Call TI Level-2-260C-1 YEAR -25 to 85 REF 102U C REF102CUG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of